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Linux/arch/arm/mach-omap2/sleep24xx.S

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Diff markup

Differences between /arch/arm/mach-omap2/sleep24xx.S (Version linux-6.12-rc7) and /arch/m68k/mach-omap2/sleep24xx.S (Version linux-5.11.22)


  1 /* SPDX-License-Identifier: GPL-2.0-or-later *    
  2 /*                                                
  3  * linux/arch/arm/mach-omap2/sleep.S              
  4  *                                                
  5  * (C) Copyright 2004                             
  6  * Texas Instruments, <www.ti.com>                
  7  * Richard Woodruff <r-woodruff2@ti.com>           
  8  *                                                
  9  * (C) Copyright 2006 Nokia Corporation           
 10  * Fixed idle loop sleep                          
 11  * Igor Stoppa <igor.stoppa@nokia.com>             
 12  */                                               
 13                                                   
 14 #include <linux/linkage.h>                        
 15 #include <asm/assembler.h>                        
 16                                                   
 17 #include "omap24xx.h"                             
 18 #include "sdrc.h"                                 
 19                                                   
 20 /* First address of reserved address space?  a    
 21 #define A_SDRC0_V               (0xC0000000)      
 22                                                   
 23         .text                                     
 24                                                   
 25 /*                                                
 26  * omap24xx_cpu_suspend() - Forces OMAP into d    
 27  * SDRC shutdown then ARM shutdown.  Upon wake    
 28  * SDRC.                                          
 29  *                                                
 30  * Input:                                         
 31  * R0 : DLL ctrl value pre-Sleep                  
 32  * R1 : SDRC_DLLA_CTRL                            
 33  * R2 : SDRC_POWER                                
 34  *                                                
 35  * The if the DPLL is going to AutoIdle. It se    
 36  * when we get called, but the DLL probably is    
 37  * case the DPLL isn't quite there yet. The co    
 38  * if in unlocked mode.                           
 39  *                                                
 40  * For less than 242x-ES2.2 upon wake from a s    
 41  * oscillator was stopped, a timing bug exists    
 42  * clock can pass into the PRCM can cause prob    
 43  * To work around this the code will switch to    
 44  * Post sleep we will shift back to using the     
 45  * CM_IDLEST_CLKGEN does not reflect the full     
 46  * 3x12MHz + 3x32kHz clocks for a full switch.    
 47  *                                                
 48  * The DLL load value is not kept in RETENTION    
 49  * at wake                                        
 50  */                                               
 51         .align  3                                 
 52 ENTRY(omap24xx_cpu_suspend)                       
 53         stmfd   sp!, {r0 - r12, lr}     @ save    
 54         mov     r3, #0x0                @ clea    
 55         mcr     p15, 0, r3, c7, c10, 4  @ memo    
 56         nop                                       
 57         nop                                       
 58         ldr     r4, [r2]                @ read    
 59         orr     r4, r4, #0x40           @ enab    
 60         mov     r5, #0x2000             @ set     
 61         str     r4, [r2]                @ make    
 62         nop                                       
 63         mcr     p15, 0, r3, c7, c0, 4   @ wait    
 64         nop                                       
 65 loop:                                             
 66         subs    r5, r5, #0x1            @ awak    
 67         bne     loop                              
 68                                                   
 69         /* The DPLL has to be on before we tak    
 70         bic     r4, r4, #0x40           @ now     
 71         str     r4, [r2]                @ writ    
 72         ldr     r4, A_SDRC0             @ make    
 73         ldr     r4, [r4]                @ read    
 74         nop                             @ star    
 75         movs    r0, r0                  @ see     
 76         strne   r0, [r1]                @ rewr    
 77         addne   r1, r1, #0x8            @ move    
 78         strne   r0, [r1]                @ rewr    
 79                                                   
 80         mov     r5, #0x1000                       
 81 loop2:                                            
 82         subs    r5, r5, #0x1                      
 83         bne     loop2                             
 84         /* resume*/                               
 85         ldmfd   sp!, {r0 - r12, pc}     @ rest    
 86                                                   
 87 A_SDRC0:                                          
 88         .word A_SDRC0_V                           
 89                                                   
 90 ENTRY(omap24xx_cpu_suspend_sz)                    
 91         .word   . - omap24xx_cpu_suspend          
                                                      

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