1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 2 /* 3 * Copyright 2008 Openmoko, Inc. 4 * Copyright 2008 Simtec Electronics 5 * http://armlinux.simtec.co.uk/ 6 * Ben Dooks <ben@simtec.co.uk> 7 * 8 * S3C - USB2.0 Highspeed/OtG device PHY regis 9 */ 10 11 /* Note, this is a separate header file as som 12 * needs to touch this if the clk_48m is used 13 * peripheral source. 14 */ 15 16 #ifndef __PLAT_S3C64XX_REGS_USB_HSOTG_PHY_H 17 #define __PLAT_S3C64XX_REGS_USB_HSOTG_PHY_H __ 18 19 /* S3C64XX_PA_USB_HSPHY */ 20 21 #define S3C_HSOTG_PHYREG(x) ((x) + S3C_VA_ 22 23 #define S3C_PHYPWR 24 #define S3C_PHYPWR_NORMAL_MASK 25 #define S3C_PHYPWR_OTG_DISABLE 26 #define S3C_PHYPWR_ANALOG_POWERDOWN 27 #define SRC_PHYPWR_FORCE_SUSPEND 28 29 #define S3C_PHYCLK 30 #define S3C_PHYCLK_MODE_USB11 31 #define S3C_PHYCLK_EXT_OSC 32 #define S3C_PHYCLK_CLK_FORCE 33 #define S3C_PHYCLK_ID_PULL 34 #define S3C_PHYCLK_CLKSEL_MASK 35 #define S3C_PHYCLK_CLKSEL_SHIFT 36 #define S3C_PHYCLK_CLKSEL_48M 37 #define S3C_PHYCLK_CLKSEL_12M 38 #define S3C_PHYCLK_CLKSEL_24M 39 40 #define S3C_RSTCON 41 #define S3C_RSTCON_PHYCLK 42 #define S3C_RSTCON_HCLK 43 #define S3C_RSTCON_PHY 44 45 #define S3C_PHYTUNE 46 47 #endif /* __PLAT_S3C64XX_REGS_USB_HSOTG_PHY_H 48
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