1 /* SPDX-License-Identifier: GPL-2.0 */ 1 2 /* 3 * arch/arm/mach-sa1100/include/mach/irqs.h 4 * 5 * Copyright (C) 1996 Russell King 6 * Copyright (C) 1998 Deborah Wallach (updates 7 * Copyright (C) 1999 Nicolas Pitre (full GPIO 8 * 9 * 2001/11/14 RMK Cleaned up and standar 10 */ 11 12 #define IRQ_GPIO0_SC 1 13 #define IRQ_GPIO1_SC 2 14 #define IRQ_GPIO2_SC 3 15 #define IRQ_GPIO3_SC 4 16 #define IRQ_GPIO4_SC 5 17 #define IRQ_GPIO5_SC 6 18 #define IRQ_GPIO6_SC 7 19 #define IRQ_GPIO7_SC 8 20 #define IRQ_GPIO8_SC 9 21 #define IRQ_GPIO9_SC 10 22 #define IRQ_GPIO10_SC 11 23 #define IRQ_GPIO11_27 12 24 #define IRQ_LCD 13 /* LCD 25 #define IRQ_Ser0UDC 14 /* Ser 26 #define IRQ_Ser1SDLC 15 /* Ser 27 #define IRQ_Ser1UART 16 /* Ser 28 #define IRQ_Ser2ICP 17 /* Ser 29 #define IRQ_Ser3UART 18 /* Ser 30 #define IRQ_Ser4MCP 19 /* Ser 31 #define IRQ_Ser4SSP 20 /* Ser 32 #define IRQ_DMA0 21 /* DMA 33 #define IRQ_DMA1 22 /* DMA 34 #define IRQ_DMA2 23 /* DMA 35 #define IRQ_DMA3 24 /* DMA 36 #define IRQ_DMA4 25 /* DMA 37 #define IRQ_DMA5 26 /* DMA 38 #define IRQ_OST0 27 /* OS 39 #define IRQ_OST1 28 /* OS 40 #define IRQ_OST2 29 /* OS 41 #define IRQ_OST3 30 /* OS 42 #define IRQ_RTC1Hz 31 /* RTC 43 #define IRQ_RTCAlrm 32 /* RTC 44 45 #define IRQ_GPIO0 33 46 #define IRQ_GPIO1 34 47 #define IRQ_GPIO2 35 48 #define IRQ_GPIO3 36 49 #define IRQ_GPIO4 37 50 #define IRQ_GPIO5 38 51 #define IRQ_GPIO6 39 52 #define IRQ_GPIO7 40 53 #define IRQ_GPIO8 41 54 #define IRQ_GPIO9 42 55 #define IRQ_GPIO10 43 56 #define IRQ_GPIO11 44 57 #define IRQ_GPIO12 45 58 #define IRQ_GPIO13 46 59 #define IRQ_GPIO14 47 60 #define IRQ_GPIO15 48 61 #define IRQ_GPIO16 49 62 #define IRQ_GPIO17 50 63 #define IRQ_GPIO18 51 64 #define IRQ_GPIO19 52 65 #define IRQ_GPIO20 53 66 #define IRQ_GPIO21 54 67 #define IRQ_GPIO22 55 68 #define IRQ_GPIO23 56 69 #define IRQ_GPIO24 57 70 #define IRQ_GPIO25 58 71 #define IRQ_GPIO26 59 72 #define IRQ_GPIO27 60 73 74 /* 75 * The next 16 interrupts are for board specif 76 * the kernel can only run on one machine at a 77 * these. If you need more, increase IRQ_BOAR 78 * within sensible limits. IRQs 61 to 76 are 79 */ 80 #define IRQ_BOARD_START 61 81 #define IRQ_BOARD_END 77 82 83 /* 84 * Figure out the MAX IRQ number. 85 * 86 * Neponset, SA1111 and UCB1x00 are sparse IRQ 87 * allocate their IRQs above NR_IRQS. 88 * 89 * LoCoMo has 4 additional IRQs, but is not sp 90 * to be included in the NR_IRQS calculation. 91 */ 92 #ifdef CONFIG_SHARP_LOCOMO 93 #define NR_IRQS_LOCOMO 4 94 #else 95 #define NR_IRQS_LOCOMO 0 96 #endif 97 98 #ifndef NR_IRQS 99 #define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOC 100 #endif 101 #define SA1100_NR_IRQS (IRQ_BOARD_START + NR_I 102
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