1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * linux/arch/arm/mm/tlb-v7.S
4 *
5 * Copyright (C) 1997-2002 Russell King
6 * Modified for ARMv7 by Catalin Marinas
7 *
8 * ARM architecture version 6 TLB handling fu
9 * These assume a split I/D TLB.
10 */
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <linux/cfi_types.h>
14 #include <asm/assembler.h>
15 #include <asm/asm-offsets.h>
16 #include <asm/page.h>
17 #include <asm/tlbflush.h>
18 #include "proc-macros.S"
19
20 .arch armv7-a
21
22 /*
23 * v7wbi_flush_user_tlb_range(start, end,
24 *
25 * Invalidate a range of TLB entries in t
26 *
27 * - start - start address (may not be al
28 * - end - end address (exclusive, may
29 * - vma - vm_area_struct describing ad
30 *
31 * It is assumed that:
32 * - the "Invalidate single entry" instru
33 * both the I and the D TLBs on Harvard
34 */
35 SYM_TYPED_FUNC_START(v7wbi_flush_user_tlb_rang
36 vma_vm_mm r3, r2
37 mmid r3, r3
38 dsb ish
39 mov r0, r0, lsr #PAGE_SHIFT
40 mov r1, r1, lsr #PAGE_SHIFT
41 asid r3, r3
42 #ifdef CONFIG_ARM_ERRATA_720789
43 ALT_SMP(W(mov) r3, #0 )
44 ALT_UP(W(nop) )
45 #endif
46 orr r0, r3, r0, lsl #PAGE_SHIFT
47 mov r1, r1, lsl #PAGE_SHIFT
48 1:
49 #ifdef CONFIG_ARM_ERRATA_720789
50 ALT_SMP(mcr p15, 0, r0, c8, c3, 3)
51 #else
52 ALT_SMP(mcr p15, 0, r0, c8, c3, 1)
53 #endif
54 ALT_UP(mcr p15, 0, r0, c8, c7, 1)
55
56 add r0, r0, #PAGE_SZ
57 cmp r0, r1
58 blo 1b
59 dsb ish
60 ret lr
61 SYM_FUNC_END(v7wbi_flush_user_tlb_range)
62
63 /*
64 * v7wbi_flush_kern_tlb_range(start,end)
65 *
66 * Invalidate a range of kernel TLB entri
67 *
68 * - start - start address (may not be al
69 * - end - end address (exclusive, may
70 */
71 SYM_TYPED_FUNC_START(v7wbi_flush_kern_tlb_rang
72 dsb ish
73 mov r0, r0, lsr #PAGE_SHIFT
74 mov r1, r1, lsr #PAGE_SHIFT
75 mov r0, r0, lsl #PAGE_SHIFT
76 mov r1, r1, lsl #PAGE_SHIFT
77 1:
78 #ifdef CONFIG_ARM_ERRATA_720789
79 ALT_SMP(mcr p15, 0, r0, c8, c3, 3)
80 #else
81 ALT_SMP(mcr p15, 0, r0, c8, c3, 1)
82 #endif
83 ALT_UP(mcr p15, 0, r0, c8, c7, 1)
84 add r0, r0, #PAGE_SZ
85 cmp r0, r1
86 blo 1b
87 dsb ish
88 isb
89 ret lr
90 SYM_FUNC_END(v7wbi_flush_kern_tlb_range)
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