1 /* 1
2 * arch/arm/plat-orion/mpp.c
3 *
4 * MPP functions for Marvell orion SoCs
5 *
6 * This file is licensed under the terms of th
7 * License version 2. This program is license
8 * warranty of any kind, whether express or im
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/mbus.h>
14 #include <linux/io.h>
15 #include <linux/gpio.h>
16 #include <plat/orion-gpio.h>
17 #include <plat/mpp.h>
18
19 /* Address of the ith MPP control register */
20 static __init void __iomem *mpp_ctrl_addr(unsi
21 void
22 {
23 return dev_bus + (i) * 4;
24 }
25
26
27 void __init orion_mpp_conf(unsigned int *mpp_l
28 unsigned int mpp_ma
29 {
30 unsigned int mpp_nr_regs = (1 + mpp_ma
31 u32 mpp_ctrl[8];
32 int i;
33
34 printk(KERN_DEBUG "initial MPP regs:")
35 if (mpp_nr_regs > ARRAY_SIZE(mpp_ctrl)
36 printk(KERN_ERR "orion_mpp_con
37 return;
38 }
39
40 for (i = 0; i < mpp_nr_regs; i++) {
41 mpp_ctrl[i] = readl(mpp_ctrl_a
42 printk(" %08x", mpp_ctrl[i]);
43 }
44 printk("\n");
45
46 for ( ; *mpp_list; mpp_list++) {
47 unsigned int num = MPP_NUM(*mp
48 unsigned int sel = MPP_SEL(*mp
49 int shift, gpio_mode;
50
51 if (num > mpp_max) {
52 printk(KERN_ERR "orion
53 "numbe
54 continue;
55 }
56 if (variant_mask && !(*mpp_lis
57 printk(KERN_WARNING
58 "orion_mpp_conf
59 "unavailable on
60 continue;
61 }
62
63 shift = (num & 7) << 2;
64 mpp_ctrl[num / 8] &= ~(0xf <<
65 mpp_ctrl[num / 8] |= sel << sh
66
67 gpio_mode = 0;
68 if (*mpp_list & MPP_INPUT_MASK
69 gpio_mode |= GPIO_INPU
70 if (*mpp_list & MPP_OUTPUT_MAS
71 gpio_mode |= GPIO_OUTP
72
73 orion_gpio_set_valid(num, gpio
74 }
75
76 printk(KERN_DEBUG " final MPP regs:")
77 for (i = 0; i < mpp_nr_regs; i++) {
78 writel(mpp_ctrl[i], mpp_ctrl_a
79 printk(" %08x", mpp_ctrl[i]);
80 }
81 printk("\n");
82 }
83
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