1 // SPDX-License-Identifier: GPL-2.0-only 1
2 /*
3 * arch/arm/probes/decode-thumb.c
4 *
5 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.
6 */
7
8 #include <linux/stddef.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11
12 #include "decode.h"
13 #include "decode-thumb.h"
14
15
16 static const union decode_item t32_table_1110_
17 /* Load/store multiple instructions */
18
19 /* Rn is PC 1110 100x x0xx
20 DECODE_REJECT (0xfe4f0000, 0xe80f000
21
22 /* SRS 1110 1000 00x0
23 /* RFE 1110 1000 00x1
24 DECODE_REJECT (0xffc00000, 0xe800000
25 /* SRS 1110 1001 10x0
26 /* RFE 1110 1001 10x1
27 DECODE_REJECT (0xffc00000, 0xe980000
28
29 /* STM Rn, {...pc} 1110 100x x0x0
30 DECODE_REJECT (0xfe508000, 0xe800800
31 /* LDM Rn, {...lr,pc} 1110 100x x0x1
32 DECODE_REJECT (0xfe50c000, 0xe810c00
33 /* LDM/STM Rn, {...sp} 1110 100x x0xx
34 DECODE_REJECT (0xfe402000, 0xe800200
35
36 /* STMIA 1110 1000 10x0
37 /* LDMIA 1110 1000 10x1
38 /* STMDB 1110 1001 00x0
39 /* LDMDB 1110 1001 00x1
40 DECODE_CUSTOM (0xfe400000, 0xe800000
41
42 DECODE_END
43 };
44
45 static const union decode_item t32_table_1110_
46 /* Load/store dual, load/store exclusi
47
48 /* STRD (immediate) 1110 1000 x110
49 /* LDRD (immediate) 1110 1000 x111
50 DECODE_OR (0xff600000, 0xe860000
51 /* STRD (immediate) 1110 1001 x1x0
52 /* LDRD (immediate) 1110 1001 x1x1
53 DECODE_EMULATEX (0xff400000, 0xe940000
54
55
56 /* TBB 1110 1000 1101
57 /* TBH 1110 1000 1101
58 DECODE_SIMULATEX(0xfff000e0, 0xe8d0000
59
60
61 /* STREX 1110 1000 0100
62 /* LDREX 1110 1000 0101
63 /* STREXB 1110 1000 1100
64 /* STREXH 1110 1000 1100
65 /* STREXD 1110 1000 1100
66 /* LDREXB 1110 1000 1101
67 /* LDREXH 1110 1000 1101
68 /* LDREXD 1110 1000 1101
69 /* And unallocated instructions...
70 DECODE_END
71 };
72
73 static const union decode_item t32_table_1110_
74 /* Data-processing (shifted register)
75
76 /* TST 1110 1010 0001
77 /* TEQ 1110 1010 1001
78 DECODE_EMULATEX (0xff700f00, 0xea100f0
79
80
81 /* CMN 1110 1011 0001
82 DECODE_OR (0xfff00f00, 0xeb100f0
83 /* CMP 1110 1011 1011
84 DECODE_EMULATEX (0xfff00f00, 0xebb00f0
85
86
87 /* MOV 1110 1010 010x
88 /* MVN 1110 1010 011x
89 DECODE_EMULATEX (0xffcf0000, 0xea4f000
90
91
92 /* ??? 1110 1010 101x
93 /* ??? 1110 1010 111x
94 DECODE_REJECT (0xffa00000, 0xeaa0000
95 /* ??? 1110 1011 001x
96 DECODE_REJECT (0xffe00000, 0xeb20000
97 /* ??? 1110 1011 100x
98 DECODE_REJECT (0xffe00000, 0xeb80000
99 /* ??? 1110 1011 111x
100 DECODE_REJECT (0xffe00000, 0xebe0000
101
102 /* ADD/SUB SP, SP, Rm, LSL #0..3
103 /* 1110 1011 x0xx
104 DECODE_EMULATEX (0xff4f7f30, 0xeb0d0d0
105
106
107 /* ADD/SUB SP, SP, Rm, shift
108 /* 1110 1011 x0xx
109 DECODE_REJECT (0xff4f0f00, 0xeb0d0d0
110
111 /* ADD/SUB Rd, SP, Rm, shift
112 /* 1110 1011 x0xx
113 DECODE_EMULATEX (0xff4f0000, 0xeb0d000
114
115
116 /* AND 1110 1010 000x
117 /* BIC 1110 1010 001x
118 /* ORR 1110 1010 010x
119 /* ORN 1110 1010 011x
120 /* EOR 1110 1010 100x
121 /* PKH 1110 1010 110x
122 /* ADD 1110 1011 000x
123 /* ADC 1110 1011 010x
124 /* SBC 1110 1011 011x
125 /* SUB 1110 1011 101x
126 /* RSB 1110 1011 110x
127 DECODE_EMULATEX (0xfe000000, 0xea00000
128
129
130 DECODE_END
131 };
132
133 static const union decode_item t32_table_1111_
134 /* Data-processing (modified immediate
135
136 /* TST 1111 0x00 0001
137 /* TEQ 1111 0x00 1001
138 DECODE_EMULATEX (0xfb708f00, 0xf0100f0
139
140
141 /* CMN 1111 0x01 0001
142 DECODE_OR (0xfbf08f00, 0xf1100f0
143 /* CMP 1111 0x01 1011
144 DECODE_EMULATEX (0xfbf08f00, 0xf1b00f0
145
146
147 /* MOV 1111 0x00 010x
148 /* MVN 1111 0x00 011x
149 DECODE_EMULATEX (0xfbcf8000, 0xf04f000
150
151
152 /* ??? 1111 0x00 101x
153 DECODE_REJECT (0xfbe08000, 0xf0a0000
154 /* ??? 1111 0x00 110x
155 /* ??? 1111 0x00 111x
156 DECODE_REJECT (0xfbc08000, 0xf0c0000
157 /* ??? 1111 0x01 001x
158 DECODE_REJECT (0xfbe08000, 0xf120000
159 /* ??? 1111 0x01 100x
160 DECODE_REJECT (0xfbe08000, 0xf180000
161 /* ??? 1111 0x01 111x
162 DECODE_REJECT (0xfbe08000, 0xf1e0000
163
164 /* ADD Rd, SP, #imm 1111 0x01 000x
165 /* SUB Rd, SP, #imm 1111 0x01 101x
166 DECODE_EMULATEX (0xfb4f8000, 0xf10d000
167
168
169 /* AND 1111 0x00 000x
170 /* BIC 1111 0x00 001x
171 /* ORR 1111 0x00 010x
172 /* ORN 1111 0x00 011x
173 /* EOR 1111 0x00 100x
174 /* ADD 1111 0x01 000x
175 /* ADC 1111 0x01 010x
176 /* SBC 1111 0x01 011x
177 /* SUB 1111 0x01 101x
178 /* RSB 1111 0x01 110x
179 DECODE_EMULATEX (0xfa008000, 0xf000000
180
181
182 DECODE_END
183 };
184
185 static const union decode_item t32_table_1111_
186 /* Data-processing (plain binary immed
187
188 /* ADDW Rd, PC, #imm 1111 0x10 0000
189 DECODE_OR (0xfbff8000, 0xf20f000
190 /* SUBW Rd, PC, #imm 1111 0x10 1010
191 DECODE_EMULATEX (0xfbff8000, 0xf2af000
192
193
194 /* ADDW SP, SP, #imm 1111 0x10 0000
195 DECODE_OR (0xfbff8f00, 0xf20d0d0
196 /* SUBW SP, SP, #imm 1111 0x10 1010
197 DECODE_EMULATEX (0xfbff8f00, 0xf2ad0d0
198
199
200 /* ADDW 1111 0x10 0000
201 DECODE_OR (0xfbf08000, 0xf200000
202 /* SUBW 1111 0x10 1010
203 DECODE_EMULATEX (0xfbf08000, 0xf2a0000
204
205
206 /* MOVW 1111 0x10 0100
207 /* MOVT 1111 0x10 1100
208 DECODE_EMULATEX (0xfb708000, 0xf240000
209
210
211 /* SSAT16 1111 0x11 0010
212 /* SSAT 1111 0x11 00x0
213 /* USAT16 1111 0x11 1010
214 /* USAT 1111 0x11 10x0
215 DECODE_EMULATEX (0xfb508000, 0xf300000
216
217
218 /* SFBX 1111 0x11 0100
219 /* UFBX 1111 0x11 1100
220 DECODE_EMULATEX (0xfb708000, 0xf340000
221
222
223 /* BFC 1111 0x11 0110
224 DECODE_EMULATEX (0xfbff8000, 0xf36f000
225
226
227 /* BFI 1111 0x11 0110
228 DECODE_EMULATEX (0xfbf08000, 0xf360000
229
230
231 DECODE_END
232 };
233
234 static const union decode_item t32_table_1111_
235 /* Branches and miscellaneous control
236
237 /* YIELD 1111 0011 1010
238 DECODE_OR (0xfff0d7ff, 0xf3a0800
239 /* SEV 1111 0011 1010
240 DECODE_EMULATE (0xfff0d7ff, 0xf3a0800
241 /* NOP 1111 0011 1010
242 /* WFE 1111 0011 1010
243 /* WFI 1111 0011 1010
244 DECODE_SIMULATE (0xfff0d7fc, 0xf3a0800
245
246 /* MRS Rd, CPSR 1111 0011 1110
247 DECODE_SIMULATEX(0xfff0d000, 0xf3e0800
248
249
250 /*
251 * Unsupported instructions
252 * 1111 0x11 1xxx
253 *
254 * MSR 1111 0011 100x
255 * DBG hint 1111 0011 1010
256 * Unallocated hints 1111 0011 1010
257 * CPS 1111 0011 1010
258 * CLREX/DSB/DMB/ISB 1111 0011 1011
259 * BXJ 1111 0011 1100
260 * SUBS PC,LR,#<imm8> 1111 0011 1101
261 * MRS Rd, SPSR 1111 0011 1111
262 * SMC 1111 0111 1111
263 * UNDEFINED 1111 0111 1111
264 * ??? 1111 0111 1xxx
265 */
266 DECODE_REJECT (0xfb80d000, 0xf380800
267
268 /* Bcc 1111 0xxx xxxx
269 DECODE_CUSTOM (0xf800d000, 0xf000800
270
271 /* BLX 1111 0xxx xxxx
272 DECODE_OR (0xf800d001, 0xf000c00
273 /* B 1111 0xxx xxxx
274 /* BL 1111 0xxx xxxx
275 DECODE_SIMULATE (0xf8009000, 0xf000900
276
277 DECODE_END
278 };
279
280 static const union decode_item t32_table_1111_
281 /* Memory hints
282
283 /* PLD (literal) 1111 1000 x001
284 /* PLI (literal) 1111 1001 x001
285 DECODE_SIMULATE (0xfe7ff000, 0xf81ff00
286
287 /* PLD{W} (immediate) 1111 1000 10x1
288 DECODE_OR (0xffd0f000, 0xf890f00
289 /* PLD{W} (immediate) 1111 1000 00x1
290 DECODE_OR (0xffd0ff00, 0xf810fc0
291 /* PLI (immediate) 1111 1001 1001
292 DECODE_OR (0xfff0f000, 0xf990f00
293 /* PLI (immediate) 1111 1001 0001
294 DECODE_SIMULATEX(0xfff0ff00, 0xf910fc0
295
296
297 /* PLD{W} (register) 1111 1000 00x1
298 DECODE_OR (0xffd0ffc0, 0xf810f00
299 /* PLI (register) 1111 1001 0001
300 DECODE_SIMULATEX(0xfff0ffc0, 0xf910f00
301
302
303 /* Other unallocated instructions...
304 DECODE_END
305 };
306
307 static const union decode_item t32_table_1111_
308 /* Store/Load single data item
309
310 /* ??? 1111 100x x11x
311 DECODE_REJECT (0xfe600000, 0xf860000
312
313 /* ??? 1111 1001 0101
314 DECODE_REJECT (0xfff00000, 0xf950000
315
316 /* ??? 1111 100x 0xxx
317 DECODE_REJECT (0xfe800d00, 0xf800080
318
319 /* STRBT 1111 1000 0000
320 /* STRHT 1111 1000 0010
321 /* STRT 1111 1000 0100
322 /* LDRBT 1111 1000 0001
323 /* LDRSBT 1111 1001 0001
324 /* LDRHT 1111 1000 0011
325 /* LDRSHT 1111 1001 0011
326 /* LDRT 1111 1000 0101
327 DECODE_REJECT (0xfe800f00, 0xf8000e0
328
329 /* STR{,B,H} Rn,[PC...] 1111 1000 xxx0
330 DECODE_REJECT (0xff1f0000, 0xf80f000
331
332 /* STR{,B,H} PC,[Rn...] 1111 1000 xxx0
333 DECODE_REJECT (0xff10f000, 0xf800f00
334
335 /* LDR (literal) 1111 1000 x101
336 DECODE_SIMULATEX(0xff7f0000, 0xf85f000
337
338
339 /* STR (immediate) 1111 1000 0100
340 /* LDR (immediate) 1111 1000 0101
341 DECODE_OR (0xffe00800, 0xf840080
342 /* STR (immediate) 1111 1000 1100
343 /* LDR (immediate) 1111 1000 1101
344 DECODE_EMULATEX (0xffe00000, 0xf8c0000
345
346
347 /* STR (register) 1111 1000 0100
348 /* LDR (register) 1111 1000 0101
349 DECODE_EMULATEX (0xffe00fc0, 0xf840000
350
351
352 /* LDRB (literal) 1111 1000 x001
353 /* LDRSB (literal) 1111 1001 x001
354 /* LDRH (literal) 1111 1000 x011
355 /* LDRSH (literal) 1111 1001 x011
356 DECODE_SIMULATEX(0xfe5f0000, 0xf81f000
357
358
359 /* STRB (immediate) 1111 1000 0000
360 /* STRH (immediate) 1111 1000 0010
361 /* LDRB (immediate) 1111 1000 0001
362 /* LDRSB (immediate) 1111 1001 0001
363 /* LDRH (immediate) 1111 1000 0011
364 /* LDRSH (immediate) 1111 1001 0011
365 DECODE_OR (0xfec00800, 0xf800080
366 /* STRB (immediate) 1111 1000 1000
367 /* STRH (immediate) 1111 1000 1010
368 /* LDRB (immediate) 1111 1000 1001
369 /* LDRSB (immediate) 1111 1001 1001
370 /* LDRH (immediate) 1111 1000 1011
371 /* LDRSH (immediate) 1111 1001 1011
372 DECODE_EMULATEX (0xfec00000, 0xf880000
373
374
375 /* STRB (register) 1111 1000 0000
376 /* STRH (register) 1111 1000 0010
377 /* LDRB (register) 1111 1000 0001
378 /* LDRSB (register) 1111 1001 0001
379 /* LDRH (register) 1111 1000 0011
380 /* LDRSH (register) 1111 1001 0011
381 DECODE_EMULATEX (0xfe800fc0, 0xf800000
382
383
384 /* Other unallocated instructions...
385 DECODE_END
386 };
387
388 static const union decode_item t32_table_1111_
389 /* Data-processing (register)
390
391 /* ??? 1111 1010 011x
392 DECODE_REJECT (0xffe0f080, 0xfa60f08
393
394 /* SXTH 1111 1010 0000
395 /* UXTH 1111 1010 0001
396 /* SXTB16 1111 1010 0010
397 /* UXTB16 1111 1010 0011
398 /* SXTB 1111 1010 0100
399 /* UXTB 1111 1010 0101
400 DECODE_EMULATEX (0xff8ff080, 0xfa0ff08
401
402
403
404 /* ??? 1111 1010 1xxx
405 DECODE_REJECT (0xff80f0b0, 0xfa80f03
406 /* ??? 1111 1010 1x11
407 DECODE_REJECT (0xffb0f080, 0xfab0f00
408
409 /* SADD16 1111 1010 1001
410 /* SASX 1111 1010 1010
411 /* SSAX 1111 1010 1110
412 /* SSUB16 1111 1010 1101
413 /* SADD8 1111 1010 1000
414 /* SSUB8 1111 1010 1100
415
416 /* QADD16 1111 1010 1001
417 /* QASX 1111 1010 1010
418 /* QSAX 1111 1010 1110
419 /* QSUB16 1111 1010 1101
420 /* QADD8 1111 1010 1000
421 /* QSUB8 1111 1010 1100
422
423 /* SHADD16 1111 1010 1001
424 /* SHASX 1111 1010 1010
425 /* SHSAX 1111 1010 1110
426 /* SHSUB16 1111 1010 1101
427 /* SHADD8 1111 1010 1000
428 /* SHSUB8 1111 1010 1100
429
430 /* UADD16 1111 1010 1001
431 /* UASX 1111 1010 1010
432 /* USAX 1111 1010 1110
433 /* USUB16 1111 1010 1101
434 /* UADD8 1111 1010 1000
435 /* USUB8 1111 1010 1100
436
437 /* UQADD16 1111 1010 1001
438 /* UQASX 1111 1010 1010
439 /* UQSAX 1111 1010 1110
440 /* UQSUB16 1111 1010 1101
441 /* UQADD8 1111 1010 1000
442 /* UQSUB8 1111 1010 1100
443
444 /* UHADD16 1111 1010 1001
445 /* UHASX 1111 1010 1010
446 /* UHSAX 1111 1010 1110
447 /* UHSUB16 1111 1010 1101
448 /* UHADD8 1111 1010 1000
449 /* UHSUB8 1111 1010 1100
450 DECODE_OR (0xff80f080, 0xfa80f00
451
452 /* SXTAH 1111 1010 0000
453 /* UXTAH 1111 1010 0001
454 /* SXTAB16 1111 1010 0010
455 /* UXTAB16 1111 1010 0011
456 /* SXTAB 1111 1010 0100
457 /* UXTAB 1111 1010 0101
458 DECODE_OR (0xff80f080, 0xfa00f08
459
460 /* QADD 1111 1010 1000
461 /* QDADD 1111 1010 1000
462 /* QSUB 1111 1010 1000
463 /* QDSUB 1111 1010 1000
464 DECODE_OR (0xfff0f0c0, 0xfa80f08
465
466 /* SEL 1111 1010 1010
467 DECODE_OR (0xfff0f0f0, 0xfaa0f08
468
469 /* LSL 1111 1010 000x
470 /* LSR 1111 1010 001x
471 /* ASR 1111 1010 010x
472 /* ROR 1111 1010 011x
473 DECODE_EMULATEX (0xff80f0f0, 0xfa00f00
474
475
476 /* CLZ 1111 1010 1010
477 DECODE_OR (0xfff0f0f0, 0xfab0f08
478
479 /* REV 1111 1010 1001
480 /* REV16 1111 1010 1001
481 /* RBIT 1111 1010 1001
482 /* REVSH 1111 1010 1001
483 DECODE_EMULATEX (0xfff0f0c0, 0xfa90f08
484
485
486 /* Other unallocated instructions...
487 DECODE_END
488 };
489
490 static const union decode_item t32_table_1111_
491 /* Multiply, multiply accumulate, and
492
493 /* ??? 1111 1011 0000
494 DECODE_REJECT (0xfff0f0f0, 0xfb00f01
495 /* ??? 1111 1011 0111
496 DECODE_REJECT (0xfff0f0f0, 0xfb70f01
497
498 /* SMULxy 1111 1011 0001
499 DECODE_OR (0xfff0f0c0, 0xfb10f00
500 /* MUL 1111 1011 0000
501 /* SMUAD{X} 1111 1011 0010
502 /* SMULWy 1111 1011 0011
503 /* SMUSD{X} 1111 1011 0100
504 /* SMMUL{R} 1111 1011 0101
505 /* USAD8 1111 1011 0111
506 DECODE_EMULATEX (0xff80f0e0, 0xfb00f00
507
508
509 /* ??? 1111 1011 0111
510 DECODE_REJECT (0xfff000f0, 0xfb70001
511
512 /* SMLAxy 1111 1011 0001
513 DECODE_OR (0xfff000c0, 0xfb10000
514 /* MLA 1111 1011 0000
515 /* MLS 1111 1011 0000
516 /* SMLAD{X} 1111 1011 0010
517 /* SMLAWy 1111 1011 0011
518 /* SMLSD{X} 1111 1011 0100
519 /* SMMLA{R} 1111 1011 0101
520 /* SMMLS{R} 1111 1011 0110
521 /* USADA8 1111 1011 0111
522 DECODE_EMULATEX (0xff8000c0, 0xfb00000
523
524
525 /* Other unallocated instructions...
526 DECODE_END
527 };
528
529 static const union decode_item t32_table_1111_
530 /* Long multiply, long multiply accumu
531
532 /* UMAAL 1111 1011 1110
533 DECODE_OR (0xfff000f0, 0xfbe0006
534 /* SMLALxy 1111 1011 1100
535 DECODE_OR (0xfff000c0, 0xfbc0008
536 /* SMLALD{X} 1111 1011 1100
537 /* SMLSLD{X} 1111 1011 1101
538 DECODE_OR (0xffe000e0, 0xfbc000c
539 /* SMULL 1111 1011 1000
540 /* UMULL 1111 1011 1010
541 /* SMLAL 1111 1011 1100
542 /* UMLAL 1111 1011 1110
543 DECODE_EMULATEX (0xff9000f0, 0xfb80000
544
545
546 /* SDIV 1111 1011 1001
547 /* UDIV 1111 1011 1011
548 /* Other unallocated instructions...
549 DECODE_END
550 };
551
552 const union decode_item probes_decode_thumb32_
553
554 /*
555 * Load/store multiple instructions
556 * 1110 100x x0xx
557 */
558 DECODE_TABLE (0xfe400000, 0xe800000
559
560 /*
561 * Load/store dual, load/store exclusi
562 * 1110 100x x1xx
563 */
564 DECODE_TABLE (0xfe400000, 0xe840000
565
566 /*
567 * Data-processing (shifted register)
568 * 1110 101x xxxx
569 */
570 DECODE_TABLE (0xfe000000, 0xea00000
571
572 /*
573 * Coprocessor instructions
574 * 1110 11xx xxxx
575 */
576 DECODE_REJECT (0xfc000000, 0xec00000
577
578 /*
579 * Data-processing (modified immediate
580 * 1111 0x0x xxxx
581 */
582 DECODE_TABLE (0xfa008000, 0xf000000
583
584 /*
585 * Data-processing (plain binary immed
586 * 1111 0x1x xxxx
587 */
588 DECODE_TABLE (0xfa008000, 0xf200000
589
590 /*
591 * Branches and miscellaneous control
592 * 1111 0xxx xxxx
593 */
594 DECODE_TABLE (0xf8008000, 0xf000800
595
596 /*
597 * Advanced SIMD element or structure
598 * 1111 1001 xxx0
599 */
600 DECODE_REJECT (0xff100000, 0xf900000
601
602 /*
603 * Memory hints
604 * 1111 100x x0x1
605 */
606 DECODE_TABLE (0xfe50f000, 0xf810f00
607
608 /*
609 * Store single data item
610 * 1111 1000 xxx0
611 * Load single data items
612 * 1111 100x xxx1
613 */
614 DECODE_TABLE (0xfe000000, 0xf800000
615
616 /*
617 * Data-processing (register)
618 * 1111 1010 xxxx
619 */
620 DECODE_TABLE (0xff00f000, 0xfa00f00
621
622 /*
623 * Multiply, multiply accumulate, and
624 * 1111 1011 0xxx
625 */
626 DECODE_TABLE (0xff800000, 0xfb00000
627
628 /*
629 * Long multiply, long multiply accumu
630 * 1111 1011 1xxx
631 */
632 DECODE_TABLE (0xff800000, 0xfb80000
633
634 /*
635 * Coprocessor instructions
636 * 1111 11xx xxxx
637 */
638 DECODE_END
639 };
640 #ifdef CONFIG_ARM_KPROBES_TEST_MODULE
641 EXPORT_SYMBOL_GPL(probes_decode_thumb32_table)
642 #endif
643
644 static const union decode_item t16_table_1011[
645 /* Miscellaneous 16-bit instructions
646
647 /* ADD (SP plus immediate) 1011 0
648 /* SUB (SP minus immediate) 1011 0
649 DECODE_SIMULATE (0xff00, 0xb000, PROBE
650
651 /* CBZ 1011 0
652 /* CBNZ 1011 1
653 DECODE_SIMULATE (0xf500, 0xb100, PROBE
654
655 /* SXTH 1011 0
656 /* SXTB 1011 0
657 /* UXTH 1011 0
658 /* UXTB 1011 0
659 /* REV 1011 1
660 /* REV16 1011 1
661 /* ??? 1011 1
662 /* REVSH 1011 1
663 DECODE_REJECT (0xffc0, 0xba80),
664 DECODE_EMULATE (0xf500, 0xb000, PROBE
665
666 /* PUSH 1011 0
667 DECODE_CUSTOM (0xfe00, 0xb400, PROBE
668 /* POP 1011 1
669 DECODE_CUSTOM (0xfe00, 0xbc00, PROBE
670
671 /*
672 * If-Then, and hints
673 * 1011 1
674 */
675
676 /* YIELD 1011 1
677 DECODE_OR (0xffff, 0xbf10),
678 /* SEV 1011 1
679 DECODE_EMULATE (0xffff, 0xbf40, PROBE
680 /* NOP 1011 1
681 /* WFE 1011 1
682 /* WFI 1011 1
683 DECODE_SIMULATE (0xffcf, 0xbf00, PROBE
684 /* Unassigned hints 1011 1
685 DECODE_REJECT (0xff0f, 0xbf00),
686 /* IT 1011 1
687 DECODE_CUSTOM (0xff00, 0xbf00, PROBE
688
689 /* SETEND 1011 0
690 /* CPS 1011 0
691 /* BKPT 1011 1
692 /* And unallocated instructions...
693 DECODE_END
694 };
695
696 const union decode_item probes_decode_thumb16_
697
698 /*
699 * Shift (immediate), add, subtract, m
700 * 00xx x
701 */
702
703 /* CMP (immediate) 0010 1
704 DECODE_EMULATE (0xf800, 0x2800, PROBE
705
706 /* ADD (register) 0001 1
707 /* SUB (register) 0001 1
708 /* LSL (immediate) 0000 0
709 /* LSR (immediate) 0000 1
710 /* ASR (immediate) 0001 0
711 /* ADD (immediate, Thumb) 0001 1
712 /* SUB (immediate, Thumb) 0001 1
713 /* MOV (immediate) 0010 0
714 /* ADD (immediate, Thumb) 0011 0
715 /* SUB (immediate, Thumb) 0011 1
716 DECODE_EMULATE (0xc000, 0x0000, PROBE
717
718 /*
719 * 16-bit Thumb data-processing instru
720 * 0100 0
721 */
722
723 /* TST (register) 0100 0
724 DECODE_EMULATE (0xffc0, 0x4200, PROBE
725 /* CMP (register) 0100 0
726 /* CMN (register) 0100 0
727 DECODE_EMULATE (0xff80, 0x4280, PROBE
728 /* AND (register) 0100 0
729 /* EOR (register) 0100 0
730 /* LSL (register) 0100 0
731 /* LSR (register) 0100 0
732 /* ASR (register) 0100 0
733 /* ADC (register) 0100 0
734 /* SBC (register) 0100 0
735 /* ROR (register) 0100 0
736 /* RSB (immediate) 0100 0
737 /* ORR (register) 0100 0
738 /* MUL 0100 0
739 /* BIC (register) 0100 0
740 /* MVN (register) 0100 0
741 DECODE_EMULATE (0xfc00, 0x4000, PROBE
742
743 /*
744 * Special data instructions and branc
745 * 0100 0
746 */
747
748 /* BLX pc 0100 0
749 DECODE_REJECT (0xfff8, 0x47f8),
750
751 /* BX (register) 0100 0
752 /* BLX (register) 0100 0
753 DECODE_SIMULATE (0xff00, 0x4700, PROBE
754
755 /* ADD pc, pc 0100 0
756 DECODE_REJECT (0xffff, 0x44ff),
757
758 /* ADD (register) 0100 0
759 /* CMP (register) 0100 0
760 /* MOV (register) 0100 0
761 DECODE_CUSTOM (0xfc00, 0x4400, PROBE
762
763 /*
764 * Load from Literal Pool
765 * LDR (literal) 0100 1
766 */
767 DECODE_SIMULATE (0xf800, 0x4800, PROBE
768
769 /*
770 * 16-bit Thumb Load/store instruction
771 * 0101 x
772 * 011x x
773 * 100x x
774 */
775
776 /* STR (register) 0101 0
777 /* STRH (register) 0101 0
778 /* STRB (register) 0101 0
779 /* LDRSB (register) 0101 0
780 /* LDR (register) 0101 1
781 /* LDRH (register) 0101 1
782 /* LDRB (register) 0101 1
783 /* LDRSH (register) 0101 1
784 /* STR (immediate, Thumb) 0110 0
785 /* LDR (immediate, Thumb) 0110 1
786 /* STRB (immediate, Thumb) 0111 0
787 /* LDRB (immediate, Thumb) 0111 1
788 DECODE_EMULATE (0xc000, 0x4000, PROBE
789 /* STRH (immediate, Thumb) 1000 0
790 /* LDRH (immediate, Thumb) 1000 1
791 DECODE_EMULATE (0xf000, 0x8000, PROBE
792 /* STR (immediate, Thumb) 1001 0
793 /* LDR (immediate, Thumb) 1001 1
794 DECODE_SIMULATE (0xf000, 0x9000, PROBE
795
796 /*
797 * Generate PC-/SP-relative address
798 * ADR (literal) 1010 0
799 * ADD (SP plus immediate) 1010 1
800 */
801 DECODE_SIMULATE (0xf000, 0xa000, PROBE
802
803 /*
804 * Miscellaneous 16-bit instructions
805 * 1011 x
806 */
807 DECODE_TABLE (0xf000, 0xb000, t16_t
808
809 /* STM 1100 0
810 /* LDM 1100 1
811 DECODE_EMULATE (0xf000, 0xc000, PROBE
812
813 /*
814 * Conditional branch, and Supervisor
815 */
816
817 /* Permanently UNDEFINED 1101 1
818 /* SVC 1101 1
819 DECODE_REJECT (0xfe00, 0xde00),
820
821 /* Conditional branch 1101 x
822 DECODE_CUSTOM (0xf000, 0xd000, PROBE
823
824 /*
825 * Unconditional branch
826 * B 1110 0
827 */
828 DECODE_SIMULATE (0xf800, 0xe000, PROBE
829
830 DECODE_END
831 };
832 #ifdef CONFIG_ARM_KPROBES_TEST_MODULE
833 EXPORT_SYMBOL_GPL(probes_decode_thumb16_table)
834 #endif
835
836 static unsigned long __kprobes thumb_check_cc(
837 {
838 if (unlikely(in_it_block(cpsr)))
839 return probes_condition_checks
840 return true;
841 }
842
843 static void __kprobes thumb16_singlestep(probe
844 struct arch_probes_insn *asi,
845 struct pt_regs *regs)
846 {
847 regs->ARM_pc += 2;
848 asi->insn_handler(opcode, asi, regs);
849 regs->ARM_cpsr = it_advance(regs->ARM_
850 }
851
852 static void __kprobes thumb32_singlestep(probe
853 struct arch_probes_insn *asi,
854 struct pt_regs *regs)
855 {
856 regs->ARM_pc += 4;
857 asi->insn_handler(opcode, asi, regs);
858 regs->ARM_cpsr = it_advance(regs->ARM_
859 }
860
861 enum probes_insn __kprobes
862 thumb16_probes_decode_insn(probes_opcode_t ins
863 bool emulate, const
864 const struct decode
865 {
866 asi->insn_singlestep = thumb16_singles
867 asi->insn_check_cc = thumb_check_cc;
868 return probes_decode_insn(insn, asi, p
869 emulate, act
870 }
871
872 enum probes_insn __kprobes
873 thumb32_probes_decode_insn(probes_opcode_t ins
874 bool emulate, const
875 const struct decode
876 {
877 asi->insn_singlestep = thumb32_singles
878 asi->insn_check_cc = thumb_check_cc;
879 return probes_decode_insn(insn, asi, p
880 emulate, act
881 }
882
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