1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2023 Neil Armstrong <neil.arms
4 */
5
6 #include "meson-g12b-a311d.dtsi"
7 #include <dt-bindings/gpio/meson-g12a-gpio.h>
8
9 / {
10 aliases {
11 serial0 = &uart_AO;
12 rtc1 = &vrtc;
13 };
14
15 chosen {
16 stdout-path = "serial0:115200n
17 };
18
19 emmc_pwrseq: emmc-pwrseq {
20 compatible = "mmc-pwrseq-emmc"
21 reset-gpios = <&gpio BOOT_12 G
22 };
23
24 memory@0 {
25 device_type = "memory";
26 reg = <0x0 0x0 0x0 0x40000000>
27 };
28
29 sdio_pwrseq: sdio-pwrseq {
30 compatible = "mmc-pwrseq-simpl
31 reset-gpios = <&gpio GPIOAO_6
32 clocks = <&wifi32k>;
33 clock-names = "ext_clock";
34 };
35
36 emmc_1v8: regulator-emmc-1v8 {
37 compatible = "regulator-fixed"
38 regulator-name = "EMMC_1V8";
39 regulator-min-microvolt = <180
40 regulator-max-microvolt = <180
41 vin-supply = <&vddao_3v3>;
42 regulator-always-on;
43 };
44
45 dc_in: regulator-dc-in {
46 compatible = "regulator-fixed"
47 regulator-name = "DC_IN";
48 regulator-min-microvolt = <500
49 regulator-max-microvolt = <500
50 regulator-always-on;
51 };
52
53 vddio_c: regulator-vddio-c {
54 compatible = "regulator-gpio";
55 regulator-name = "VDDIO_C";
56 regulator-min-microvolt = <180
57 regulator-max-microvolt = <330
58
59 enable-gpios = <&gpio_ao GPIOA
60 enable-active-high;
61 regulator-always-on;
62
63 gpios = <&gpio_ao GPIOAO_9 GPI
64 gpios-states = <1>;
65
66 states = <1800000 0>,
67 <3300000 1>;
68 };
69
70 vddao_1v8: regulator-vddao-1v8 {
71 compatible = "regulator-fixed"
72 regulator-name = "VDDAO_1V8";
73 regulator-min-microvolt = <180
74 regulator-max-microvolt = <180
75 vin-supply = <&vddao_3v3>;
76 regulator-always-on;
77 };
78
79 vddao_3v3: regulator-vddao-3v3 {
80 compatible = "regulator-fixed"
81 regulator-name = "VDDAO_3V3";
82 regulator-min-microvolt = <330
83 regulator-max-microvolt = <330
84 vin-supply = <&dc_in>;
85 regulator-always-on;
86 };
87
88 vddcpu_a: regulator-vddcpu-a {
89 /*
90 * MP8756GD DC/DC Regulator.
91 */
92 compatible = "pwm-regulator";
93
94 regulator-name = "VDDCPU_A";
95 regulator-min-microvolt = <680
96 regulator-max-microvolt = <104
97
98 pwm-supply = <&dc_in>;
99
100 pwms = <&pwm_ab 0 1250 0>;
101 pwm-dutycycle-range = <100 0>;
102
103 regulator-boot-on;
104 regulator-always-on;
105 };
106
107 vddcpu_b: regulator-vddcpu-b {
108 /*
109 * SY8120B1ABC DC/DC Regulator
110 */
111 compatible = "pwm-regulator";
112
113 regulator-name = "VDDCPU_B";
114 regulator-min-microvolt = <680
115 regulator-max-microvolt = <104
116
117 pwm-supply = <&dc_in>;
118
119 pwms = <&pwm_AO_cd 1 1250 0>;
120 pwm-dutycycle-range = <100 0>;
121
122 regulator-boot-on;
123 regulator-always-on;
124 };
125
126 wifi32k: wifi32k {
127 compatible = "pwm-clock";
128 #clock-cells = <0>;
129 clock-frequency = <32768>;
130 pwms = <&pwm_ef 0 30518 0>; /*
131 };
132 };
133
134 &arb {
135 status = "okay";
136 };
137
138 &clkc_audio {
139 status = "okay";
140 };
141
142 &cec_AO {
143 pinctrl-0 = <&cec_ao_a_h_pins>;
144 pinctrl-names = "default";
145 hdmi-phandle = <&hdmi_tx>;
146 };
147
148 &cecb_AO {
149 pinctrl-0 = <&cec_ao_b_h_pins>;
150 pinctrl-names = "default";
151 hdmi-phandle = <&hdmi_tx>;
152 };
153
154 &cpu0 {
155 cpu-supply = <&vddcpu_b>;
156 operating-points-v2 = <&cpu_opp_table_
157 clocks = <&clkc CLKID_CPU_CLK>;
158 clock-latency = <50000>;
159 };
160
161 &cpu1 {
162 cpu-supply = <&vddcpu_b>;
163 operating-points-v2 = <&cpu_opp_table_
164 clocks = <&clkc CLKID_CPU_CLK>;
165 clock-latency = <50000>;
166 };
167
168 &cpu100 {
169 cpu-supply = <&vddcpu_a>;
170 operating-points-v2 = <&cpub_opp_table
171 clocks = <&clkc CLKID_CPUB_CLK>;
172 clock-latency = <50000>;
173 };
174
175 &cpu101 {
176 cpu-supply = <&vddcpu_a>;
177 operating-points-v2 = <&cpub_opp_table
178 clocks = <&clkc CLKID_CPUB_CLK>;
179 clock-latency = <50000>;
180 };
181
182 &cpu102 {
183 cpu-supply = <&vddcpu_a>;
184 operating-points-v2 = <&cpub_opp_table
185 clocks = <&clkc CLKID_CPUB_CLK>;
186 clock-latency = <50000>;
187 };
188
189 &cpu103 {
190 cpu-supply = <&vddcpu_a>;
191 operating-points-v2 = <&cpub_opp_table
192 clocks = <&clkc CLKID_CPUB_CLK>;
193 clock-latency = <50000>;
194 };
195
196 &ext_mdio {
197 external_phy: ethernet-phy@0 {
198 /* Realtek RTL8211F (0x001cc91
199 reg = <0>;
200 max-speed = <1000>;
201
202 interrupt-parent = <&gpio_intc
203 /* MAC_INTR on GPIOZ_14 */
204 interrupts = <IRQID_GPIOZ_14 I
205 };
206 };
207
208 /* Ethernet to be enabled in baseboard DT */
209 ðmac {
210 pinctrl-0 = <ð_pins>, <ð_rgmii_p
211 pinctrl-names = "default";
212 phy-mode = "rgmii-txid";
213 phy-handle = <&external_phy>;
214 };
215
216 &frddr_a {
217 status = "okay";
218 };
219
220 &frddr_b {
221 status = "okay";
222 };
223
224 &frddr_c {
225 status = "okay";
226 };
227
228 /* HDMI to be enabled in baseboard DT */
229 &hdmi_tx {
230 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmi
231 pinctrl-names = "default";
232 hdmi-supply = <&dc_in>;
233 };
234
235 /* "Camera" I2C bus */
236 &i2c1 {
237 pinctrl-0 = <&i2c1_sda_h6_pins>, <&i2c
238 pinctrl-names = "default";
239 };
240
241 /* Main I2C bus */
242 &i2c2 {
243 pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2
244 pinctrl-names = "default";
245 };
246
247 /* "ID" I2C bus */
248 &i2c3 {
249 pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3
250 pinctrl-names = "default";
251 };
252
253 &pcie {
254 reset-gpios = <&gpio GPIOA_8 GPIO_ACTI
255 };
256
257 &pwm_ab {
258 pinctrl-0 = <&pwm_a_e_pins>;
259 pinctrl-names = "default";
260 clocks = <&xtal>;
261 clock-names = "clkin0";
262
263 status = "okay";
264 };
265
266 &pwm_ef {
267 pinctrl-0 = <&pwm_e_pins>;
268 pinctrl-names = "default";
269
270 status = "okay";
271 };
272
273 &pwm_AO_cd {
274 pinctrl-0 = <&pwm_ao_d_e_pins>;
275 pinctrl-names = "default";
276 clocks = <&xtal>;
277 clock-names = "clkin1";
278
279 status = "okay";
280 };
281
282 &saradc {
283 vref-supply = <&vddao_1v8>;
284
285 status = "okay";
286 };
287
288 /* on-module SDIO WiFi */
289 &sd_emmc_a {
290 pinctrl-0 = <&sdio_pins>;
291 pinctrl-1 = <&sdio_clk_gate_pins>;
292 pinctrl-names = "default", "clk-gate";
293 #address-cells = <1>;
294 #size-cells = <0>;
295
296 bus-width = <4>;
297 sd-uhs-sdr104;
298 max-frequency = <50000000>;
299
300 non-removable;
301 disable-wp;
302
303 /* WiFi firmware requires power in sus
304 keep-power-in-suspend;
305
306 mmc-pwrseq = <&sdio_pwrseq>;
307
308 vmmc-supply = <&vddao_3v3>;
309 vqmmc-supply = <&vddao_3v3>;
310
311 status = "okay";
312
313 rtl8822cs: wifi@1 {
314 reg = <1>;
315 };
316 };
317
318 /* SD card to be enabled in baseboard DT */
319 &sd_emmc_b {
320 pinctrl-0 = <&sdcard_c_pins>;
321 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
322 pinctrl-names = "default", "clk-gate";
323
324 bus-width = <4>;
325 cap-sd-highspeed;
326 max-frequency = <50000000>;
327 disable-wp;
328
329 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_
330 vmmc-supply = <&vddao_3v3>;
331 vqmmc-supply = <&vddio_c>;
332 };
333
334 /* on-module eMMC */
335 &sd_emmc_c {
336 pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_
337 pinctrl-1 = <&emmc_clk_gate_pins>;
338 pinctrl-names = "default", "clk-gate";
339
340 bus-width = <8>;
341 cap-mmc-highspeed;
342 mmc-ddr-1_8v;
343 mmc-hs200-1_8v;
344 max-frequency = <200000000>;
345 disable-wp;
346
347 mmc-pwrseq = <&emmc_pwrseq>;
348 vmmc-supply = <&vddao_3v3>;
349 vqmmc-supply = <&vddao_1v8>;
350
351 status = "okay";
352 };
353
354 &tdmif_b {
355 status = "okay";
356 };
357
358 &tdmout_b {
359 status = "okay";
360 };
361
362 /* on-module UART BT */
363 &uart_A {
364 pinctrl-0 = <&uart_a_pins>, <&uart_a_c
365 pinctrl-names = "default";
366 uart-has-rtscts;
367
368 status = "okay";
369
370 bluetooth {
371 compatible = "realtek,rtl8822c
372 enable-gpios = <&gpio GPIOX_17
373 host-wake-gpios = <&gpio GPIOX
374 device-wake-gpios = <&gpio GPI
375 };
376 };
377
378 &uart_AO {
379 pinctrl-0 = <&uart_ao_a_pins>;
380 pinctrl-names = "default";
381
382 status = "okay";
383 };
384
385 &usb {
386 phys = <&usb2_phy0>, <&usb2_phy1>;
387 phy-names = "usb2-phy0", "usb2-phy1";
388 };
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