1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 3 * Copyright (c) 2023 BayLibre, SAS. 4 * Author: Jerome Brunet <jbrunet@baylibre.com> 5 */ 6 7 /dts-v1/; 8 9 #include <dt-bindings/clock/g12a-clkc.h> 10 #include "meson-sm1.dtsi" 11 #include "meson-libretech-cottonwood.dtsi" 12 13 / { 14 compatible = "libretech,aml-s905d3-cc" 15 model = "Libre Computer AML-S905D3-CC 16 17 sound { 18 model = "LC-SOLITUDE"; 19 audio-routing = "TDMOUT_A IN 0 20 "TDMOUT_A IN 1 21 "TDMOUT_A IN 2 22 "TDM_A Playbac 23 "TDMOUT_B IN 0 24 "TDMOUT_B IN 1 25 "TDMOUT_B IN 2 26 "TDM_B Playbac 27 "TDMOUT_C IN 0 28 "TDMOUT_C IN 1 29 "TDMOUT_C IN 2 30 "TDM_C Playbac 31 "TDMIN_A IN 0" 32 "TDMIN_B IN 0" 33 "TDMIN_C IN 0" 34 "TDMIN_A IN 13 35 "TDMIN_B IN 13 36 "TDMIN_C IN 13 37 "TDMIN_A IN 1" 38 "TDMIN_B IN 1" 39 "TDMIN_C IN 1" 40 "TDMIN_A IN 14 41 "TDMIN_B IN 14 42 "TDMIN_C IN 14 43 "TDMIN_A IN 2" 44 "TDMIN_B IN 2" 45 "TDMIN_C IN 2" 46 "TDMIN_A IN 15 47 "TDMIN_B IN 15 48 "TDMIN_C IN 15 49 "TODDR_A IN 0" 50 "TODDR_B IN 0" 51 "TODDR_C IN 0" 52 "TODDR_A IN 1" 53 "TODDR_B IN 1" 54 "TODDR_C IN 1" 55 "TODDR_A IN 2" 56 "TODDR_B IN 2" 57 "TODDR_C IN 2" 58 "Lineout", "AC 59 "Lineout", "AC 60 }; 61 }; 62 63 &cpu0 { 64 cpu-supply = <&vddcpu_b>; 65 operating-points-v2 = <&cpu_opp_table> 66 clocks = <&clkc CLKID_CPU_CLK>; 67 clock-latency = <50000>; 68 }; 69 70 &cpu1 { 71 cpu-supply = <&vddcpu_b>; 72 operating-points-v2 = <&cpu_opp_table> 73 clocks = <&clkc CLKID_CPU1_CLK>; 74 clock-latency = <50000>; 75 }; 76 77 &cpu2 { 78 cpu-supply = <&vddcpu_b>; 79 operating-points-v2 = <&cpu_opp_table> 80 clocks = <&clkc CLKID_CPU2_CLK>; 81 clock-latency = <50000>; 82 }; 83 84 &cpu3 { 85 cpu-supply = <&vddcpu_b>; 86 operating-points-v2 = <&cpu_opp_table> 87 clocks = <&clkc CLKID_CPU3_CLK>; 88 clock-latency = <50000>; 89 };
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