1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Samsung Exynos7 Espresso board device tree
4 *
5 * Copyright (c) 2014 Samsung Electronics Co.,
6 * http://www.samsung.com
7 */
8
9 /dts-v1/;
10 #include "exynos7.dtsi"
11 #include <dt-bindings/interrupt-controller/irq
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
14
15 / {
16 model = "Samsung Exynos7 Espresso boar
17 compatible = "samsung,exynos7-espresso
18
19 aliases {
20 mmc0 = &mmc_0;
21 mmc2 = &mmc_2;
22 serial0 = &serial_2;
23 };
24
25 chosen {
26 stdout-path = &serial_2;
27 };
28
29 memory@40000000 {
30 device_type = "memory";
31 reg = <0x0 0x40000000 0x0 0xc0
32 };
33
34 usb30_vbus_reg: regulator-usb30 {
35 compatible = "regulator-fixed"
36 regulator-name = "VBUS_5V";
37 regulator-min-microvolt = <500
38 regulator-max-microvolt = <500
39 gpio = <&gph1 1 GPIO_ACTIVE_HI
40 pinctrl-names = "default";
41 pinctrl-0 = <&usb30_vbus_en>;
42 enable-active-high;
43 };
44
45 usb3drd_boost_5v: regulator-usb3drd-bo
46 compatible = "regulator-fixed"
47 regulator-name = "VUSB_VBUS_5V
48 regulator-min-microvolt = <500
49 regulator-max-microvolt = <500
50 gpio = <&gpf4 1 GPIO_ACTIVE_HI
51 pinctrl-names = "default";
52 pinctrl-0 = <&usb3drd_boost_en
53 enable-active-high;
54 };
55
56 };
57
58 &fin_pll {
59 clock-frequency = <24000000>;
60 };
61
62 &gpu {
63 mali-supply = <&buck6_reg>;
64 };
65
66 &serial_2 {
67 status = "okay";
68 };
69
70 &rtc {
71 status = "okay";
72 clocks = <&clock_ccore PCLK_RTC>, <&s2
73 clock-names = "rtc", "rtc_src";
74 };
75
76 &watchdog {
77 status = "okay";
78 };
79
80 &adc {
81 vdd-supply = <&ldo3_reg>;
82 status = "okay";
83 };
84
85 &hsi2c_4 {
86 status = "okay";
87
88 pmic@66 {
89 compatible = "samsung,s2mps15-
90 reg = <0x66>;
91 interrupts = <2 IRQ_TYPE_LEVEL
92 interrupt-parent = <&gpa0>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pmic_irq>;
95 wakeup-source;
96
97 s2mps15_osc: clocks {
98 compatible = "samsung,
99 #clock-cells = <1>;
100 clock-output-names = "
101 "s2mps13_bt";
102 };
103
104 regulators {
105 ldo1_reg: LDO1 {
106 regulator-name
107 regulator-min-
108 regulator-max-
109 regulator-alwa
110 regulator-enab
111 };
112
113 ldo2_reg: LDO2 {
114 regulator-name
115 regulator-min-
116 regulator-max-
117 regulator-alwa
118 regulator-enab
119 };
120
121 ldo3_reg: LDO3 {
122 regulator-name
123 regulator-min-
124 regulator-max-
125 regulator-alwa
126 regulator-boot
127 regulator-enab
128 };
129
130 ldo4_reg: LDO4 {
131 regulator-name
132 regulator-min-
133 regulator-max-
134 regulator-alwa
135 regulator-enab
136 };
137
138 ldo5_reg: LDO5 {
139 regulator-name
140 regulator-min-
141 regulator-max-
142 regulator-alwa
143 regulator-enab
144 };
145
146 ldo6_reg: LDO6 {
147 regulator-name
148 regulator-min-
149 regulator-max-
150 regulator-enab
151 };
152
153 ldo7_reg: LDO7 {
154 regulator-name
155 regulator-min-
156 regulator-max-
157 regulator-enab
158 regulator-alwa
159 };
160
161 ldo8_reg: LDO8 {
162 regulator-name
163 regulator-min-
164 regulator-max-
165 regulator-enab
166 };
167
168 ldo9_reg: LDO9 {
169 regulator-name
170 regulator-min-
171 regulator-max-
172 regulator-enab
173 };
174
175 ldo10_reg: LDO10 {
176 regulator-name
177 regulator-min-
178 regulator-max-
179 regulator-enab
180 };
181
182 ldo11_reg: LDO11 {
183 regulator-name
184 regulator-min-
185 regulator-max-
186 regulator-alwa
187 regulator-enab
188 };
189
190 ldo12_reg: LDO12 {
191 regulator-name
192 regulator-min-
193 regulator-max-
194 regulator-enab
195 regulator-alwa
196 };
197
198 ldo13_reg: LDO13 {
199 regulator-name
200 regulator-min-
201 regulator-max-
202 regulator-alwa
203 regulator-enab
204 };
205
206 ldo14_reg: LDO14 {
207 regulator-name
208 regulator-min-
209 regulator-max-
210 regulator-enab
211 };
212
213 ldo17_reg: LDO17 {
214 regulator-name
215 regulator-min-
216 regulator-max-
217 regulator-enab
218 };
219
220 ldo18_reg: LDO18 {
221 regulator-name
222 regulator-min-
223 regulator-max-
224 regulator-enab
225 };
226
227 ldo19_reg: LDO19 {
228 regulator-name
229 regulator-min-
230 regulator-max-
231 regulator-enab
232 };
233
234 ldo21_reg: LDO21 {
235 regulator-name
236 regulator-min-
237 regulator-max-
238 regulator-enab
239 };
240
241 ldo23_reg: LDO23 {
242 regulator-name
243 regulator-min-
244 regulator-max-
245 regulator-enab
246 };
247
248 ldo25_reg: LDO25 {
249 regulator-name
250 regulator-min-
251 regulator-max-
252 regulator-enab
253 };
254
255 ldo26_reg: LDO26 {
256 regulator-name
257 regulator-min-
258 regulator-max-
259 regulator-enab
260 };
261
262 ldo27_reg: LDO27 {
263 regulator-name
264 regulator-min-
265 regulator-max-
266 regulator-enab
267 };
268
269 buck1_reg: BUCK1 {
270 regulator-name
271 regulator-min-
272 regulator-max-
273 regulator-alwa
274 regulator-boot
275 regulator-ramp
276 regulator-enab
277 };
278
279 buck2_reg: BUCK2 {
280 regulator-name
281 regulator-min-
282 regulator-max-
283 regulator-alwa
284 regulator-boot
285 regulator-ramp
286 regulator-enab
287 };
288
289 buck4_reg: BUCK4 {
290 regulator-name
291 regulator-min-
292 regulator-max-
293 regulator-alwa
294 regulator-boot
295 regulator-ramp
296 regulator-enab
297 };
298
299 buck5_reg: BUCK5 {
300 regulator-name
301 regulator-min-
302 regulator-max-
303 regulator-ramp
304 regulator-enab
305 };
306
307 buck6_reg: BUCK6 {
308 regulator-name
309 regulator-min-
310 regulator-max-
311 regulator-ramp
312 regulator-enab
313 };
314
315 buck7_reg: BUCK7 {
316 regulator-name
317 regulator-min-
318 regulator-max-
319 regulator-alwa
320 regulator-ramp
321 regulator-enab
322 };
323
324 buck8_reg: BUCK8 {
325 regulator-name
326 regulator-min-
327 regulator-max-
328 regulator-alwa
329 regulator-ramp
330 regulator-enab
331 };
332
333 buck9_reg: BUCK9 {
334 regulator-name
335 regulator-min-
336 regulator-max-
337 regulator-alwa
338 regulator-ramp
339 regulator-enab
340 };
341
342 buck10_reg: BUCK10 {
343 regulator-name
344 regulator-min-
345 regulator-max-
346 regulator-alwa
347 regulator-ramp
348 regulator-enab
349 };
350 };
351 };
352 };
353
354 &pinctrl_alive {
355 pmic_irq: pmic-irq-pins {
356 samsung,pins = "gpa0-2";
357 samsung,pin-pud = <EXYNOS_PIN_
358 samsung,pin-drv = <EXYNOS7_PIN
359 };
360 };
361
362 &mmc_0 {
363 status = "okay";
364 cap-mmc-highspeed;
365 mmc-ddr-1_8v;
366 mmc-hs200-1_8v;
367 non-removable;
368 card-detect-delay = <200>;
369 clock-frequency = <800000000>;
370 samsung,dw-mshc-ciu-div = <3>;
371 samsung,dw-mshc-sdr-timing = <0 4>;
372 samsung,dw-mshc-ddr-timing = <0 2>;
373 pinctrl-names = "default";
374 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qr
375 bus-width = <8>;
376 };
377
378 &mmc_2 {
379 status = "okay";
380 cap-sd-highspeed;
381 card-detect-delay = <200>;
382 clock-frequency = <400000000>;
383 samsung,dw-mshc-ciu-div = <3>;
384 samsung,dw-mshc-sdr-timing = <2 3>;
385 samsung,dw-mshc-ddr-timing = <1 2>;
386 pinctrl-names = "default";
387 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd
388 bus-width = <4>;
389 vmmc-supply = <&ldo17_reg>;
390 vqmmc-supply = <&ldo2_reg>;
391 disable-wp;
392 };
393
394 &pinctrl_bus1 {
395 usb30_vbus_en: usb30-vbus-en-pins {
396 samsung,pins = "gph1-1";
397 samsung,pin-function = <EXYNOS
398 samsung,pin-pud = <EXYNOS_PIN_
399 samsung,pin-drv = <EXYNOS7_PIN
400 };
401
402 usb3drd_boost_en: usb3drd-boost-en-pin
403 samsung,pins = "gpf4-1";
404 samsung,pin-function = <EXYNOS
405 samsung,pin-pud = <EXYNOS_PIN_
406 samsung,pin-drv = <EXYNOS7_PIN
407 };
408 };
409
410 &ufs {
411 status = "okay";
412 };
413
414 &usbdrd {
415 vdd10-supply = <&ldo4_reg>;
416 vdd33-supply = <&ldo6_reg>;
417 };
418
419 &usbdrd_phy {
420 vbus-supply = <&usb30_vbus_reg>;
421 vbus-boost-supply = <&usb3drd_boost_5v
422 };
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