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Linux/arch/arm64/boot/dts/freescale/imx8mn.dtsi

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Diff markup

Differences between /arch/arm64/boot/dts/freescale/imx8mn.dtsi (Architecture i386) and /arch/alpha/boot/dts/freescale/imx8mn.dtsi (Architecture alpha)


  1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)     
  2 /*                                                
  3  * Copyright 2019 NXP                             
  4  */                                               
  5                                                   
  6 #include <dt-bindings/clock/imx8mn-clock.h>       
  7 #include <dt-bindings/power/imx8mn-power.h>       
  8 #include <dt-bindings/reset/imx8mq-reset.h>       
  9 #include <dt-bindings/gpio/gpio.h>                
 10 #include <dt-bindings/input/input.h>              
 11 #include <dt-bindings/interrupt-controller/arm    
 12 #include <dt-bindings/thermal/thermal.h>          
 13                                                   
 14 #include "imx8mn-pinfunc.h"                       
 15                                                   
 16 / {                                               
 17         interrupt-parent = <&gic>;                
 18         #address-cells = <2>;                     
 19         #size-cells = <2>;                        
 20                                                   
 21         aliases {                                 
 22                 ethernet0 = &fec1;                
 23                 gpio0 = &gpio1;                   
 24                 gpio1 = &gpio2;                   
 25                 gpio2 = &gpio3;                   
 26                 gpio3 = &gpio4;                   
 27                 gpio4 = &gpio5;                   
 28                 i2c0 = &i2c1;                     
 29                 i2c1 = &i2c2;                     
 30                 i2c2 = &i2c3;                     
 31                 i2c3 = &i2c4;                     
 32                 mmc0 = &usdhc1;                   
 33                 mmc1 = &usdhc2;                   
 34                 mmc2 = &usdhc3;                   
 35                 serial0 = &uart1;                 
 36                 serial1 = &uart2;                 
 37                 serial2 = &uart3;                 
 38                 serial3 = &uart4;                 
 39                 spi0 = &ecspi1;                   
 40                 spi1 = &ecspi2;                   
 41                 spi2 = &ecspi3;                   
 42         };                                        
 43                                                   
 44         cpus {                                    
 45                 #address-cells = <1>;             
 46                 #size-cells = <0>;                
 47                                                   
 48                 idle-states {                     
 49                         entry-method = "psci";    
 50                                                   
 51                         cpu_pd_wait: cpu-pd-wa    
 52                                 compatible = "    
 53                                 arm,psci-suspe    
 54                                 local-timer-st    
 55                                 entry-latency-    
 56                                 exit-latency-u    
 57                                 min-residency-    
 58                         };                        
 59                 };                                
 60                                                   
 61                 A53_0: cpu@0 {                    
 62                         device_type = "cpu";      
 63                         compatible = "arm,cort    
 64                         reg = <0x0>;              
 65                         clock-latency = <61036    
 66                         clocks = <&clk IMX8MN_    
 67                         enable-method = "psci"    
 68                         i-cache-size = <0x8000    
 69                         i-cache-line-size = <6    
 70                         i-cache-sets = <256>;     
 71                         d-cache-size = <0x8000    
 72                         d-cache-line-size = <6    
 73                         d-cache-sets = <128>;     
 74                         next-level-cache = <&A    
 75                         operating-points-v2 =     
 76                         nvmem-cells = <&cpu_sp    
 77                         nvmem-cell-names = "sp    
 78                         cpu-idle-states = <&cp    
 79                         #cooling-cells = <2>;     
 80                 };                                
 81                                                   
 82                 A53_1: cpu@1 {                    
 83                         device_type = "cpu";      
 84                         compatible = "arm,cort    
 85                         reg = <0x1>;              
 86                         clock-latency = <61036    
 87                         clocks = <&clk IMX8MN_    
 88                         enable-method = "psci"    
 89                         i-cache-size = <0x8000    
 90                         i-cache-line-size = <6    
 91                         i-cache-sets = <256>;     
 92                         d-cache-size = <0x8000    
 93                         d-cache-line-size = <6    
 94                         d-cache-sets = <128>;     
 95                         next-level-cache = <&A    
 96                         operating-points-v2 =     
 97                         cpu-idle-states = <&cp    
 98                         #cooling-cells = <2>;     
 99                 };                                
100                                                   
101                 A53_2: cpu@2 {                    
102                         device_type = "cpu";      
103                         compatible = "arm,cort    
104                         reg = <0x2>;              
105                         clock-latency = <61036    
106                         clocks = <&clk IMX8MN_    
107                         enable-method = "psci"    
108                         i-cache-size = <0x8000    
109                         i-cache-line-size = <6    
110                         i-cache-sets = <256>;     
111                         d-cache-size = <0x8000    
112                         d-cache-line-size = <6    
113                         d-cache-sets = <128>;     
114                         next-level-cache = <&A    
115                         operating-points-v2 =     
116                         cpu-idle-states = <&cp    
117                         #cooling-cells = <2>;     
118                 };                                
119                                                   
120                 A53_3: cpu@3 {                    
121                         device_type = "cpu";      
122                         compatible = "arm,cort    
123                         reg = <0x3>;              
124                         clock-latency = <61036    
125                         clocks = <&clk IMX8MN_    
126                         enable-method = "psci"    
127                         i-cache-size = <0x8000    
128                         i-cache-line-size = <6    
129                         i-cache-sets = <256>;     
130                         d-cache-size = <0x8000    
131                         d-cache-line-size = <6    
132                         d-cache-sets = <128>;     
133                         next-level-cache = <&A    
134                         operating-points-v2 =     
135                         cpu-idle-states = <&cp    
136                         #cooling-cells = <2>;     
137                 };                                
138                                                   
139                 A53_L2: l2-cache0 {               
140                         compatible = "cache";     
141                         cache-level = <2>;        
142                         cache-unified;            
143                         cache-size = <0x80000>    
144                         cache-line-size = <64>    
145                         cache-sets = <512>;       
146                 };                                
147         };                                        
148                                                   
149         a53_opp_table: opp-table {                
150                 compatible = "operating-points    
151                 opp-shared;                       
152                                                   
153                 opp-1200000000 {                  
154                         opp-hz = /bits/ 64 <12    
155                         opp-microvolt = <85000    
156                         opp-supported-hw = <0x    
157                         clock-latency-ns = <15    
158                         opp-suspend;              
159                 };                                
160                                                   
161                 opp-1400000000 {                  
162                         opp-hz = /bits/ 64 <14    
163                         opp-microvolt = <95000    
164                         opp-supported-hw = <0x    
165                         clock-latency-ns = <15    
166                         opp-suspend;              
167                 };                                
168                                                   
169                 opp-1500000000 {                  
170                         opp-hz = /bits/ 64 <15    
171                         opp-microvolt = <10000    
172                         opp-supported-hw = <0x    
173                         clock-latency-ns = <15    
174                         opp-suspend;              
175                 };                                
176         };                                        
177                                                   
178         osc_32k: clock-osc-32k {                  
179                 compatible = "fixed-clock";       
180                 #clock-cells = <0>;               
181                 clock-frequency = <32768>;        
182                 clock-output-names = "osc_32k"    
183         };                                        
184                                                   
185         osc_24m: clock-osc-24m {                  
186                 compatible = "fixed-clock";       
187                 #clock-cells = <0>;               
188                 clock-frequency = <24000000>;     
189                 clock-output-names = "osc_24m"    
190         };                                        
191                                                   
192         clk_ext1: clock-ext1 {                    
193                 compatible = "fixed-clock";       
194                 #clock-cells = <0>;               
195                 clock-frequency = <133000000>;    
196                 clock-output-names = "clk_ext1    
197         };                                        
198                                                   
199         clk_ext2: clock-ext2 {                    
200                 compatible = "fixed-clock";       
201                 #clock-cells = <0>;               
202                 clock-frequency = <133000000>;    
203                 clock-output-names = "clk_ext2    
204         };                                        
205                                                   
206         clk_ext3: clock-ext3 {                    
207                 compatible = "fixed-clock";       
208                 #clock-cells = <0>;               
209                 clock-frequency = <133000000>;    
210                 clock-output-names = "clk_ext3    
211         };                                        
212                                                   
213         clk_ext4: clock-ext4 {                    
214                 compatible = "fixed-clock";       
215                 #clock-cells = <0>;               
216                 clock-frequency = <133000000>;    
217                 clock-output-names = "clk_ext4    
218         };                                        
219                                                   
220         pmu {                                     
221                 compatible = "arm,cortex-a53-p    
222                 interrupts = <GIC_PPI 7           
223                              (GIC_CPU_MASK_SIM    
224         };                                        
225                                                   
226         psci {                                    
227                 compatible = "arm,psci-1.0";      
228                 method = "smc";                   
229         };                                        
230                                                   
231         thermal-zones {                           
232                 cpu-thermal {                     
233                         polling-delay-passive     
234                         polling-delay = <2000>    
235                         thermal-sensors = <&tm    
236                         trips {                   
237                                 cpu_alert0: tr    
238                                         temper    
239                                         hyster    
240                                         type =    
241                                 };                
242                                                   
243                                 cpu_crit0: tri    
244                                         temper    
245                                         hyster    
246                                         type =    
247                                 };                
248                         };                        
249                                                   
250                         cooling-maps {            
251                                 map0 {            
252                                         trip =    
253                                         coolin    
254                                                   
255                                                   
256                                                   
257                                                   
258                                 };                
259                         };                        
260                 };                                
261         };                                        
262                                                   
263         timer {                                   
264                 compatible = "arm,armv8-timer"    
265                 interrupts = <GIC_PPI 13 (GIC_    
266                              <GIC_PPI 14 (GIC_    
267                              <GIC_PPI 11 (GIC_    
268                              <GIC_PPI 10 (GIC_    
269                 clock-frequency = <8000000>;      
270                 arm,no-tick-in-suspend;           
271         };                                        
272                                                   
273         soc: soc@0 {                              
274                 compatible = "fsl,imx8mn-soc",    
275                 #address-cells = <1>;             
276                 #size-cells = <1>;                
277                 ranges = <0x0 0x0 0x0 0x3e0000    
278                 dma-ranges = <0x40000000 0x0 0    
279                 nvmem-cells = <&imx8mn_uid>;      
280                 nvmem-cell-names = "soc_unique    
281                                                   
282                 aips1: bus@30000000 {             
283                         compatible = "fsl,aips    
284                         reg = <0x30000000 0x40    
285                         #address-cells = <1>;     
286                         #size-cells = <1>;        
287                         ranges;                   
288                                                   
289                         spba2: spba-bus@300000    
290                                 compatible = "    
291                                 #address-cells    
292                                 #size-cells =     
293                                 reg = <0x30000    
294                                 ranges;           
295                                                   
296                                 sai2: sai@3002    
297                                         compat    
298                                         reg =     
299                                         #sound    
300                                         interr    
301                                         clocks    
302                                                   
303                                                   
304                                                   
305                                         clock-    
306                                         dmas =    
307                                         dma-na    
308                                         status    
309                                 };                
310                                                   
311                                 sai3: sai@3003    
312                                         compat    
313                                         reg =     
314                                         #sound    
315                                         interr    
316                                         clocks    
317                                                   
318                                                   
319                                                   
320                                         clock-    
321                                         dmas =    
322                                         dma-na    
323                                         status    
324                                 };                
325                                                   
326                                 sai5: sai@3005    
327                                         compat    
328                                         reg =     
329                                         #sound    
330                                         interr    
331                                         clocks    
332                                                   
333                                                   
334                                                   
335                                         clock-    
336                                         dmas =    
337                                         dma-na    
338                                         fsl,sh    
339                                         fsl,da    
340                                         status    
341                                 };                
342                                                   
343                                 sai6: sai@3006    
344                                         compat    
345                                         reg =     
346                                         #sound    
347                                         interr    
348                                         clocks    
349                                                   
350                                                   
351                                                   
352                                         clock-    
353                                         dmas =    
354                                         dma-na    
355                                         status    
356                                 };                
357                                                   
358                                 micfil: audio-    
359                                         compat    
360                                         reg =     
361                                         interr    
362                                                   
363                                                   
364                                                   
365                                         clocks    
366                                                   
367                                                   
368                                                   
369                                                   
370                                         clock-    
371                                                   
372                                         dmas =    
373                                         dma-na    
374                                         #sound    
375                                         status    
376                                 };                
377                                                   
378                                 spdif1: spdif@    
379                                         compat    
380                                         reg =     
381                                         interr    
382                                         clocks    
383                                                   
384                                                   
385                                                   
386                                                   
387                                                   
388                                                   
389                                                   
390                                                   
391                                                   
392                                         clock-    
393                                                   
394                                                   
395                                                   
396                                                   
397                                         dmas =    
398                                         dma-na    
399                                         status    
400                                 };                
401                                                   
402                                 sai7: sai@300b    
403                                         compat    
404                                         reg =     
405                                         #sound    
406                                         interr    
407                                         clocks    
408                                                   
409                                                   
410                                                   
411                                         clock-    
412                                         dmas =    
413                                         dma-na    
414                                         status    
415                                 };                
416                                                   
417                                 easrc: easrc@3    
418                                         compat    
419                                         reg =     
420                                         interr    
421                                         clocks    
422                                         clock-    
423                                         dmas =    
424                                                   
425                                                   
426                                                   
427                                         dma-na    
428                                                   
429                                                   
430                                                   
431                                         firmwa    
432                                         fsl,as    
433                                         fsl,as    
434                                         status    
435                                 };                
436                         };                        
437                                                   
438                         gpio1: gpio@30200000 {    
439                                 compatible = "    
440                                 reg = <0x30200    
441                                 interrupts = <    
442                                              <    
443                                 clocks = <&clk    
444                                 gpio-controlle    
445                                 #gpio-cells =     
446                                 interrupt-cont    
447                                 #interrupt-cel    
448                                 gpio-ranges =     
449                         };                        
450                                                   
451                         gpio2: gpio@30210000 {    
452                                 compatible = "    
453                                 reg = <0x30210    
454                                 interrupts = <    
455                                              <    
456                                 clocks = <&clk    
457                                 gpio-controlle    
458                                 #gpio-cells =     
459                                 interrupt-cont    
460                                 #interrupt-cel    
461                                 gpio-ranges =     
462                         };                        
463                                                   
464                         gpio3: gpio@30220000 {    
465                                 compatible = "    
466                                 reg = <0x30220    
467                                 interrupts = <    
468                                              <    
469                                 clocks = <&clk    
470                                 gpio-controlle    
471                                 #gpio-cells =     
472                                 interrupt-cont    
473                                 #interrupt-cel    
474                                 gpio-ranges =     
475                         };                        
476                                                   
477                         gpio4: gpio@30230000 {    
478                                 compatible = "    
479                                 reg = <0x30230    
480                                 interrupts = <    
481                                              <    
482                                 clocks = <&clk    
483                                 gpio-controlle    
484                                 #gpio-cells =     
485                                 interrupt-cont    
486                                 #interrupt-cel    
487                                 gpio-ranges =     
488                         };                        
489                                                   
490                         gpio5: gpio@30240000 {    
491                                 compatible = "    
492                                 reg = <0x30240    
493                                 interrupts = <    
494                                              <    
495                                 clocks = <&clk    
496                                 gpio-controlle    
497                                 #gpio-cells =     
498                                 interrupt-cont    
499                                 #interrupt-cel    
500                                 gpio-ranges =     
501                         };                        
502                                                   
503                         tmu: tmu@30260000 {       
504                                 compatible = "    
505                                 reg = <0x30260    
506                                 clocks = <&clk    
507                                 nvmem-cells =     
508                                 nvmem-cell-nam    
509                                 #thermal-senso    
510                         };                        
511                                                   
512                         wdog1: watchdog@302800    
513                                 compatible = "    
514                                 reg = <0x30280    
515                                 interrupts = <    
516                                 clocks = <&clk    
517                                 status = "disa    
518                         };                        
519                                                   
520                         wdog2: watchdog@302900    
521                                 compatible = "    
522                                 reg = <0x30290    
523                                 interrupts = <    
524                                 clocks = <&clk    
525                                 status = "disa    
526                         };                        
527                                                   
528                         wdog3: watchdog@302a00    
529                                 compatible = "    
530                                 reg = <0x302a0    
531                                 interrupts = <    
532                                 clocks = <&clk    
533                                 status = "disa    
534                         };                        
535                                                   
536                         sdma3: dma-controller@    
537                                 compatible = "    
538                                 reg = <0x302b0    
539                                 interrupts = <    
540                                 clocks = <&clk    
541                                  <&clk IMX8MN_    
542                                 clock-names =     
543                                 #dma-cells = <    
544                                 fsl,sdma-ram-s    
545                         };                        
546                                                   
547                         sdma2: dma-controller@    
548                                 compatible = "    
549                                 reg = <0x302c0    
550                                 interrupts = <    
551                                 clocks = <&clk    
552                                          <&clk    
553                                 clock-names =     
554                                 #dma-cells = <    
555                                 fsl,sdma-ram-s    
556                         };                        
557                                                   
558                         iomuxc: pinctrl@303300    
559                                 compatible = "    
560                                 reg = <0x30330    
561                         };                        
562                                                   
563                         gpr: syscon@30340000 {    
564                                 compatible = "    
565                                 reg = <0x30340    
566                         };                        
567                                                   
568                         ocotp: efuse@30350000     
569                                 compatible = "    
570                                 reg = <0x30350    
571                                 clocks = <&clk    
572                                 #address-cells    
573                                 #size-cells =     
574                                                   
575                                 /*                
576                                  * The registe    
577                                  * Fusemap Des    
578                                  * Assuming       
579                                  *   reg = <AD    
580                                  * then           
581                                  *   Fuse Addr    
582                                  * Note that i    
583                                  * each subseq    
584                                  * +0x10 in Fu    
585                                  * reg = <0x4     
586                                  * 0x420).        
587                                  */               
588                                 imx8mn_uid: un    
589                                         reg =     
590                                 };                
591                                                   
592                                 cpu_speed_grad    
593                                         reg =     
594                                 };                
595                                                   
596                                 tmu_calib: cal    
597                                         reg =     
598                                 };                
599                                                   
600                                 fec_mac_addres    
601                                         reg =     
602                                 };                
603                         };                        
604                                                   
605                         anatop: clock-controll    
606                                 compatible = "    
607                                 reg = <0x30360    
608                                 #clock-cells =    
609                         };                        
610                                                   
611                         snvs: snvs@30370000 {     
612                                 compatible = "    
613                                 reg = <0x30370    
614                                                   
615                                 snvs_rtc: snvs    
616                                         compat    
617                                         regmap    
618                                         offset    
619                                         interr    
620                                                   
621                                         clocks    
622                                         clock-    
623                                 };                
624                                                   
625                                 snvs_pwrkey: s    
626                                         compat    
627                                         regmap    
628                                         interr    
629                                         clocks    
630                                         clock-    
631                                         linux,    
632                                         wakeup    
633                                         status    
634                                 };                
635                         };                        
636                                                   
637                         clk: clock-controller@    
638                                 compatible = "    
639                                 reg = <0x30380    
640                                 interrupts = <    
641                                              <    
642                                 #clock-cells =    
643                                 clocks = <&osc    
644                                          <&clk    
645                                 clock-names =     
646                                                   
647                                 assigned-clock    
648                                                   
649                                                   
650                                                   
651                                                   
652                                                   
653                                                   
654                                                   
655                                 assigned-clock    
656                                                   
657                                                   
658                                                   
659                                 assigned-clock    
660                                                   
661                                                   
662                                                   
663                                                   
664                                                   
665                         };                        
666                                                   
667                         src: reset-controller@    
668                                 compatible = "    
669                                 reg = <0x30390    
670                                 interrupts = <    
671                                 #reset-cells =    
672                         };                        
673                                                   
674                         gpc: gpc@303a0000 {       
675                                 compatible = "    
676                                 reg = <0x303a0    
677                                 interrupt-pare    
678                                 interrupts = <    
679                                                   
680                                 pgc {             
681                                         #addre    
682                                         #size-    
683                                                   
684                                         pgc_hs    
685                                                   
686                                                   
687                                                   
688                                         };        
689                                                   
690                                         pgc_ot    
691                                                   
692                                                   
693                                         };        
694                                                   
695                                         pgc_gp    
696                                                   
697                                                   
698                                                   
699                                                   
700                                                   
701                                                   
702                                         };        
703                                                   
704                                         pgc_di    
705                                                   
706                                                   
707                                                   
708                                                   
709                                         };        
710                                                   
711                                         pgc_mi    
712                                                   
713                                                   
714                                                   
715                                         };        
716                                 };                
717                         };                        
718                 };                                
719                                                   
720                 aips2: bus@30400000 {             
721                         compatible = "fsl,aips    
722                         reg = <0x30400000 0x40    
723                         #address-cells = <1>;     
724                         #size-cells = <1>;        
725                         ranges;                   
726                                                   
727                         pwm1: pwm@30660000 {      
728                                 compatible = "    
729                                 reg = <0x30660    
730                                 interrupts = <    
731                                 clocks = <&clk    
732                                         <&clk     
733                                 clock-names =     
734                                 #pwm-cells = <    
735                                 status = "disa    
736                         };                        
737                                                   
738                         pwm2: pwm@30670000 {      
739                                 compatible = "    
740                                 reg = <0x30670    
741                                 interrupts = <    
742                                 clocks = <&clk    
743                                          <&clk    
744                                 clock-names =     
745                                 #pwm-cells = <    
746                                 status = "disa    
747                         };                        
748                                                   
749                         pwm3: pwm@30680000 {      
750                                 compatible = "    
751                                 reg = <0x30680    
752                                 interrupts = <    
753                                 clocks = <&clk    
754                                          <&clk    
755                                 clock-names =     
756                                 #pwm-cells = <    
757                                 status = "disa    
758                         };                        
759                                                   
760                         pwm4: pwm@30690000 {      
761                                 compatible = "    
762                                 reg = <0x30690    
763                                 interrupts = <    
764                                 clocks = <&clk    
765                                          <&clk    
766                                 clock-names =     
767                                 #pwm-cells = <    
768                                 status = "disa    
769                         };                        
770                                                   
771                         system_counter: timer@    
772                                 compatible = "    
773                                 reg = <0x306a0    
774                                 interrupts = <    
775                                 clocks = <&osc    
776                                 clock-names =     
777                         };                        
778                 };                                
779                                                   
780                 aips3: bus@30800000 {             
781                         compatible = "fsl,aips    
782                         reg = <0x30800000 0x40    
783                         #address-cells = <1>;     
784                         #size-cells = <1>;        
785                         ranges;                   
786                                                   
787                         spba1: spba-bus@308000    
788                                 compatible = "    
789                                 #address-cells    
790                                 #size-cells =     
791                                 reg = <0x30800    
792                                 ranges;           
793                                                   
794                                 ecspi1: spi@30    
795                                         compat    
796                                         #addre    
797                                         #size-    
798                                         reg =     
799                                         interr    
800                                         clocks    
801                                                   
802                                         clock-    
803                                         dmas =    
804                                         dma-na    
805                                         status    
806                                 };                
807                                                   
808                                 ecspi2: spi@30    
809                                         compat    
810                                         #addre    
811                                         #size-    
812                                         reg =     
813                                         interr    
814                                         clocks    
815                                                   
816                                         clock-    
817                                         dmas =    
818                                         dma-na    
819                                         status    
820                                 };                
821                                                   
822                                 ecspi3: spi@30    
823                                         compat    
824                                         #addre    
825                                         #size-    
826                                         reg =     
827                                         interr    
828                                         clocks    
829                                                   
830                                         clock-    
831                                         dmas =    
832                                         dma-na    
833                                         status    
834                                 };                
835                                                   
836                                 uart1: serial@    
837                                         compat    
838                                         reg =     
839                                         interr    
840                                         clocks    
841                                                   
842                                         clock-    
843                                         dmas =    
844                                         dma-na    
845                                         status    
846                                 };                
847                                                   
848                                 uart3: serial@    
849                                         compat    
850                                         reg =     
851                                         interr    
852                                         clocks    
853                                                   
854                                         clock-    
855                                         dmas =    
856                                         dma-na    
857                                         status    
858                                 };                
859                                                   
860                                 uart2: serial@    
861                                         compat    
862                                         reg =     
863                                         interr    
864                                         clocks    
865                                                   
866                                         clock-    
867                                         status    
868                                 };                
869                         };                        
870                                                   
871                         crypto: crypto@3090000    
872                                 compatible = "    
873                                 #address-cells    
874                                 #size-cells =     
875                                 reg = <0x30900    
876                                 ranges = <0 0x    
877                                 interrupts = <    
878                                 clocks = <&clk    
879                                          <&clk    
880                                 clock-names =     
881                                                   
882                                 sec_jr0: jr@10    
883                                          compa    
884                                          reg =    
885                                          inter    
886                                          statu    
887                                 };                
888                                                   
889                                 sec_jr1: jr@20    
890                                          compa    
891                                          reg =    
892                                          inter    
893                                 };                
894                                                   
895                                 sec_jr2: jr@30    
896                                          compa    
897                                          reg =    
898                                          inter    
899                                 };                
900                         };                        
901                                                   
902                         i2c1: i2c@30a20000 {      
903                                 compatible = "    
904                                 #address-cells    
905                                 #size-cells =     
906                                 reg = <0x30a20    
907                                 interrupts = <    
908                                 clocks = <&clk    
909                                 status = "disa    
910                         };                        
911                                                   
912                         i2c2: i2c@30a30000 {      
913                                 compatible = "    
914                                 #address-cells    
915                                 #size-cells =     
916                                 reg = <0x30a30    
917                                 interrupts = <    
918                                 clocks = <&clk    
919                                 status = "disa    
920                         };                        
921                                                   
922                         i2c3: i2c@30a40000 {      
923                                 #address-cells    
924                                 #size-cells =     
925                                 compatible = "    
926                                 reg = <0x30a40    
927                                 interrupts = <    
928                                 clocks = <&clk    
929                                 status = "disa    
930                         };                        
931                                                   
932                         i2c4: i2c@30a50000 {      
933                                 compatible = "    
934                                 #address-cells    
935                                 #size-cells =     
936                                 reg = <0x30a50    
937                                 interrupts = <    
938                                 clocks = <&clk    
939                                 status = "disa    
940                         };                        
941                                                   
942                         uart4: serial@30a60000    
943                                 compatible = "    
944                                 reg = <0x30a60    
945                                 interrupts = <    
946                                 clocks = <&clk    
947                                          <&clk    
948                                 clock-names =     
949                                 dmas = <&sdma1    
950                                 dma-names = "r    
951                                 status = "disa    
952                         };                        
953                                                   
954                         mu: mailbox@30aa0000 {    
955                                 compatible = "    
956                                 reg = <0x30aa0    
957                                 interrupts = <    
958                                 clocks = <&clk    
959                                 #mbox-cells =     
960                         };                        
961                                                   
962                         usdhc1: mmc@30b40000 {    
963                                 compatible = "    
964                                 reg = <0x30b40    
965                                 interrupts = <    
966                                 clocks = <&clk    
967                                          <&clk    
968                                          <&clk    
969                                 clock-names =     
970                                 fsl,tuning-sta    
971                                 fsl,tuning-ste    
972                                 bus-width = <4    
973                                 status = "disa    
974                         };                        
975                                                   
976                         usdhc2: mmc@30b50000 {    
977                                 compatible = "    
978                                 reg = <0x30b50    
979                                 interrupts = <    
980                                 clocks = <&clk    
981                                          <&clk    
982                                          <&clk    
983                                 clock-names =     
984                                 fsl,tuning-sta    
985                                 fsl,tuning-ste    
986                                 bus-width = <4    
987                                 status = "disa    
988                         };                        
989                                                   
990                         usdhc3: mmc@30b60000 {    
991                                 compatible = "    
992                                 reg = <0x30b60    
993                                 interrupts = <    
994                                 clocks = <&clk    
995                                          <&clk    
996                                          <&clk    
997                                 clock-names =     
998                                 fsl,tuning-sta    
999                                 fsl,tuning-ste    
1000                                 bus-width = <    
1001                                 status = "dis    
1002                         };                       
1003                                                  
1004                         flexspi: spi@30bb0000    
1005                                 #address-cell    
1006                                 #size-cells =    
1007                                 compatible =     
1008                                 reg = <0x30bb    
1009                                 reg-names = "    
1010                                 interrupts =     
1011                                 clocks = <&cl    
1012                                          <&cl    
1013                                 clock-names =    
1014                                 status = "dis    
1015                         };                       
1016                                                  
1017                         sdma1: dma-controller    
1018                                 compatible =     
1019                                 reg = <0x30bd    
1020                                 interrupts =     
1021                                 clocks = <&cl    
1022                                          <&cl    
1023                                 clock-names =    
1024                                 #dma-cells =     
1025                                 fsl,sdma-ram-    
1026                         };                       
1027                                                  
1028                         fec1: ethernet@30be00    
1029                                 compatible =     
1030                                 reg = <0x30be    
1031                                 interrupts =     
1032                                                  
1033                                                  
1034                                                  
1035                                 clocks = <&cl    
1036                                          <&cl    
1037                                          <&cl    
1038                                          <&cl    
1039                                          <&cl    
1040                                 clock-names =    
1041                                                  
1042                                 assigned-cloc    
1043                                                  
1044                                                  
1045                                                  
1046                                 assigned-cloc    
1047                                                  
1048                                                  
1049                                                  
1050                                 assigned-cloc    
1051                                 fsl,num-tx-qu    
1052                                 fsl,num-rx-qu    
1053                                 nvmem-cells =    
1054                                 nvmem-cell-na    
1055                                 fsl,stop-mode    
1056                                 status = "dis    
1057                         };                       
1058                                                  
1059                 };                               
1060                                                  
1061                 aips4: bus@32c00000 {            
1062                         compatible = "fsl,aip    
1063                         reg = <0x32c00000 0x4    
1064                         #address-cells = <1>;    
1065                         #size-cells = <1>;       
1066                         ranges;                  
1067                                                  
1068                         lcdif: lcdif@32e00000    
1069                                 compatible =     
1070                                 reg = <0x32e0    
1071                                 clocks = <&cl    
1072                                          <&cl    
1073                                          <&cl    
1074                                 clock-names =    
1075                                 interrupts =     
1076                                 power-domains    
1077                                 status = "dis    
1078                                                  
1079                                 port {           
1080                                         lcdif    
1081                                                  
1082                                         };       
1083                                 };               
1084                         };                       
1085                                                  
1086                         mipi_dsi: dsi@32e1000    
1087                                 compatible =     
1088                                 reg = <0x32e1    
1089                                 clocks = <&cl    
1090                                          <&cl    
1091                                 clock-names =    
1092                                 interrupts =     
1093                                 power-domains    
1094                                 status = "dis    
1095                                                  
1096                                 ports {          
1097                                         #addr    
1098                                         #size    
1099                                                  
1100                                         port@    
1101                                                  
1102                                                  
1103                                                  
1104                                                  
1105                                                  
1106                                         };       
1107                                                  
1108                                         port@    
1109                                                  
1110                                                  
1111                                                  
1112                                                  
1113                                         };       
1114                                 };               
1115                         };                       
1116                                                  
1117                         isi: isi@32e20000 {      
1118                                 compatible =     
1119                                 reg = <0x32e2    
1120                                 interrupts =     
1121                                 clocks = <&cl    
1122                                          <&cl    
1123                                 clock-names =    
1124                                 fsl,blk-ctrl     
1125                                 power-domains    
1126                                 status = "dis    
1127                                                  
1128                                 ports {          
1129                                         #addr    
1130                                         #size    
1131                                                  
1132                                         port@    
1133                                                  
1134                                                  
1135                                                  
1136                                                  
1137                                         };       
1138                                 };               
1139                         };                       
1140                                                  
1141                         disp_blk_ctrl: blk-ct    
1142                                 compatible =     
1143                                 reg = <0x32e2    
1144                                 power-domains    
1145                                                  
1146                                                  
1147                                 power-domain-    
1148                                                  
1149                                                  
1150                                 clocks = <&cl    
1151                                          <&cl    
1152                                          <&cl    
1153                                          <&cl    
1154                                          <&cl    
1155                                          <&cl    
1156                                          <&cl    
1157                                          <&cl    
1158                                          <&cl    
1159                                          <&cl    
1160                                          <&cl    
1161                                 clock-names =    
1162                                                  
1163                                                  
1164                                                  
1165                                                  
1166                                 assigned-cloc    
1167                                                  
1168                                                  
1169                                                  
1170                                                  
1171                                 assigned-cloc    
1172                                                  
1173                                                  
1174                                                  
1175                                                  
1176                                 assigned-cloc    
1177                                                  
1178                                                  
1179                                                  
1180                                                  
1181                                 #power-domain    
1182                         };                       
1183                                                  
1184                         mipi_csi: mipi-csi@32    
1185                                 compatible =     
1186                                 reg = <0x32e3    
1187                                 interrupts =     
1188                                 assigned-cloc    
1189                                 assigned-cloc    
1190                                 assigned-cloc    
1191                                 clock-frequen    
1192                                 clocks = <&cl    
1193                                          <&cl    
1194                                          <&cl    
1195                                          <&cl    
1196                                 clock-names =    
1197                                 power-domains    
1198                                 status = "dis    
1199                                                  
1200                                 ports {          
1201                                         #addr    
1202                                         #size    
1203                                                  
1204                                         port@    
1205                                                  
1206                                         };       
1207                                                  
1208                                         port@    
1209                                                  
1210                                                  
1211                                                  
1212                                                  
1213                                                  
1214                                         };       
1215                                 };               
1216                         };                       
1217                                                  
1218                         usbotg1: usb@32e40000    
1219                                 compatible =     
1220                                 reg = <0x32e4    
1221                                 interrupts =     
1222                                 clocks = <&cl    
1223                                 assigned-cloc    
1224                                 assigned-cloc    
1225                                 phys = <&usbp    
1226                                 fsl,usbmisc =    
1227                                 power-domains    
1228                                 status = "dis    
1229                         };                       
1230                                                  
1231                         usbmisc1: usbmisc@32e    
1232                                 compatible =     
1233                                                  
1234                                 #index-cells     
1235                                 reg = <0x32e4    
1236                         };                       
1237                 };                               
1238                                                  
1239                 dma_apbh: dma-controller@3300    
1240                         compatible = "fsl,imx    
1241                         reg = <0x33000000 0x2    
1242                         interrupts = <GIC_SPI    
1243                                      <GIC_SPI    
1244                                      <GIC_SPI    
1245                                      <GIC_SPI    
1246                         #dma-cells = <1>;        
1247                         dma-channels = <4>;      
1248                         clocks = <&clk IMX8MN    
1249                 };                               
1250                                                  
1251                 gpmi: nand-controller@3300200    
1252                         compatible = "fsl,imx    
1253                         #address-cells = <1>;    
1254                         #size-cells = <0>;       
1255                         reg = <0x33002000 0x2    
1256                         reg-names = "gpmi-nan    
1257                         interrupts = <GIC_SPI    
1258                         interrupt-names = "bc    
1259                         clocks = <&clk IMX8MN    
1260                                  <&clk IMX8MN    
1261                         clock-names = "gpmi_i    
1262                         dmas = <&dma_apbh 0>;    
1263                         dma-names = "rx-tx";     
1264                         status = "disabled";     
1265                 };                               
1266                                                  
1267                 gpu: gpu@38000000 {              
1268                         compatible = "vivante    
1269                         reg = <0x38000000 0x8    
1270                         interrupts = <GIC_SPI    
1271                         clocks = <&clk IMX8MN    
1272                                 <&clk IMX8MN_    
1273                                 <&clk IMX8MN_    
1274                                 <&clk IMX8MN_    
1275                         clock-names = "reg",     
1276                         assigned-clocks = <&c    
1277                                           <&c    
1278                                           <&c    
1279                                           <&c    
1280                                           <&c    
1281                         assigned-clock-parent    
1282                                                  
1283                                                  
1284                                                  
1285                         assigned-clock-rates     
1286                                                  
1287                                                  
1288                                                  
1289                                                  
1290                         power-domains = <&pgc    
1291                 };                               
1292                                                  
1293                 gic: interrupt-controller@388    
1294                         compatible = "arm,gic    
1295                         reg = <0x38800000 0x1    
1296                               <0x38880000 0xc    
1297                         #interrupt-cells = <3    
1298                         interrupt-controller;    
1299                         interrupts = <GIC_PPI    
1300                 };                               
1301                                                  
1302                 ddrc: memory-controller@3d400    
1303                         compatible = "fsl,imx    
1304                         reg = <0x3d400000 0x4    
1305                         clock-names = "core",    
1306                         clocks = <&clk IMX8MN    
1307                                  <&clk IMX8MN    
1308                                  <&clk IMX8MN    
1309                                  <&clk IMX8MN    
1310                 };                               
1311                                                  
1312                 ddr-pmu@3d800000 {               
1313                         compatible = "fsl,imx    
1314                         reg = <0x3d800000 0x4    
1315                         interrupts = <GIC_SPI    
1316                 };                               
1317         };                                       
1318                                                  
1319         usbphynop1: usbphynop1 {                 
1320                 #phy-cells = <0>;                
1321                 compatible = "usb-nop-xceiv";    
1322                 clocks = <&clk IMX8MN_CLK_USB    
1323                 assigned-clocks = <&clk IMX8M    
1324                 assigned-clock-parents = <&cl    
1325                 clock-names = "main_clk";        
1326                 power-domains = <&pgc_otg1>;     
1327         };                                       
1328 };                                               
                                                      

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