1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Pinctrl dts file for HiSilicon HiKey970 dev
4 */
5
6 #include <dt-bindings/pinctrl/hisi.h>
7
8 / {
9 soc {
10 range: gpio-range {
11 #pinctrl-single,gpio-r
12 };
13
14 pmx0: pinmux@e896c000 {
15 compatible = "pinctrl-
16 reg = <0x0 0xe896c000
17 #pinctrl-cells = <1>;
18 #gpio-range-cells = <0
19 pinctrl-single,registe
20 pinctrl-single,functio
21 /* pin base, nr pins &
22 pinctrl-single,gpio-ra
23
24 uart0_pmx_func: uart0-
25 pinctrl-single
26 0x054
27 0x058
28 >;
29 };
30
31 uart2_pmx_func: uart2-
32 pinctrl-single
33 0x700
34 0x704
35 0x708
36 0x70c
37 >;
38 };
39
40 uart3_pmx_func: uart3-
41 pinctrl-single
42 0x064
43 0x068
44 0x06c
45 0x070
46 >;
47 };
48
49 uart4_pmx_func: uart4-
50 pinctrl-single
51 0x074
52 0x078
53 0x07c
54 0x080
55 >;
56 };
57
58 uart6_pmx_func: uart6-
59 pinctrl-single
60 0x05c
61 0x060
62 >;
63 };
64
65 i2c3_pmx_func: i2c3-pi
66 pinctrl-single
67 0x010
68 0x014
69 >;
70 };
71
72 i2c4_pmx_func: i2c4-pi
73 pinctrl-single
74 0x03c
75 0x040
76 >;
77 };
78
79 cam0_rst_pmx_func: cam
80 pinctrl-single
81 0x714
82 >;
83 };
84
85 cam1_rst_pmx_func: cam
86 pinctrl-single
87 0x048
88 >;
89 };
90
91 cam0_pwd_n_pmx_func: c
92 pinctrl-single
93 0x098
94 >;
95 };
96
97 cam1_pwd_n_pmx_func: c
98 pinctrl-single
99 0x044
100 >;
101 };
102
103 isp0_pmx_func: isp0-pi
104 pinctrl-single
105 0x018
106 0x024
107 0x028
108 >;
109 };
110
111 isp1_pmx_func: isp1-pi
112 pinctrl-single
113 0x01c
114 0x02c
115 0x030
116 >;
117 };
118 };
119
120 pmx1: pinmux@fff11000 {
121 compatible = "pinctrl-
122 reg = <0x0 0xfff11000
123 #gpio-range-cells = <0
124 #pinctrl-cells = <1>;
125 pinctrl-single,registe
126 pinctrl-single,functio
127 /* pin base, nr pins &
128 pinctrl-single,gpio-ra
129
130 pwr_key_pmx_func: pwr-
131 pinctrl-single
132 0x064
133 >;
134 };
135
136 pd_pmx_func: pd-pins {
137 pinctrl-single
138 0x080
139 >;
140 };
141
142 i2s2_pmx_func: i2s2-pi
143 pinctrl-single,pin
144 0x050
145 0x054
146 0x058
147 0x05c
148 >;
149 };
150
151 spi0_pmx_func: spi0-pi
152 pinctrl-single
153 0x094
154 0x098
155 0x09c
156 0x0a0
157 >;
158 };
159
160 spi2_pmx_func: spi2-pi
161 pinctrl-single
162 0x710
163 0x714
164 0x718
165 0x71c
166 >;
167 };
168
169 spi3_pmx_func: spi3-pi
170 pinctrl-single
171 0x72c
172 0x730
173 0x734
174 0x738
175 >;
176 };
177
178 i2c0_pmx_func: i2c0-pi
179 pinctrl-single
180 0x020
181 0x024
182 >;
183 };
184
185 i2c1_pmx_func: i2c1-pi
186 pinctrl-single
187 0x028
188 0x02c
189 >;
190 };
191 i2c2_pmx_func: i2c2-pi
192 pinctrl-single
193 0x030
194 0x034
195 >;
196 };
197
198 pcie_clkreq_pmx_func:
199 pinctrl-single
200 0x084
201 >;
202 };
203
204 gpio185_pmx_func: gpio
205 pinctrl-single
206 };
207
208 gpio185_pmx_idle: gpio
209 pinctrl-single
210 };
211 };
212
213 pmx2: pinmux@e896c800 {
214 compatible = "pinconf-
215 reg = <0x0 0xe896c800
216 #pinctrl-cells = <1>;
217 pinctrl-single,registe
218
219 uart0_cfg_func: uart0-
220 pinctrl-single
221 0x058
222 0x05c
223 >;
224 pinctrl-single
225 PULL_D
226 PULL_D
227 PULL_D
228 PULL_D
229 >;
230 pinctrl-single
231 PULL_D
232 PULL_U
233 PULL_D
234 PULL_U
235 >;
236 pinctrl-single
237 DRIVE7
238 >;
239 };
240
241 uart2_cfg_func: uart2-
242 pinctrl-single
243 0x700
244 0x704
245 0x708
246 0x70c
247 >;
248 pinctrl-single
249 PULL_D
250 PULL_D
251 PULL_D
252 PULL_D
253 >;
254 pinctrl-single
255 PULL_D
256 PULL_U
257 PULL_D
258 PULL_U
259 >;
260 pinctrl-single
261 DRIVE7
262 >;
263 };
264
265 uart3_cfg_func: uart3-
266 pinctrl-single
267 0x068
268 0x06c
269 0x070
270 0x074
271 >;
272 pinctrl-single
273 PULL_D
274 PULL_D
275 PULL_D
276 PULL_D
277 >;
278 pinctrl-single
279 PULL_D
280 PULL_U
281 PULL_D
282 PULL_U
283 >;
284 pinctrl-single
285 DRIVE7
286 >;
287 };
288
289 uart4_cfg_func: uart4-
290 pinctrl-single
291 0x078
292 0x07c
293 0x080
294 0x084
295 >;
296 pinctrl-single
297 PULL_D
298 PULL_D
299 PULL_D
300 PULL_D
301 >;
302 pinctrl-single
303 PULL_D
304 PULL_U
305 PULL_D
306 PULL_U
307 >;
308 pinctrl-single
309 DRIVE7
310 >;
311 };
312
313 uart6_cfg_func: uart6-
314 pinctrl-single
315 0x060
316 0x064
317 >;
318 pinctrl-single
319 PULL_D
320 PULL_D
321 PULL_D
322 PULL_D
323 >;
324 pinctrl-single
325 PULL_D
326 PULL_U
327 PULL_D
328 PULL_U
329 >;
330 pinctrl-single
331 DRIVE7
332 >;
333 };
334
335 i2c3_cfg_func: i2c3-cf
336 pinctrl-single
337 0x014
338 0x018
339 >;
340 pinctrl-single
341 PULL_D
342 PULL_D
343 PULL_D
344 PULL_D
345 >;
346 pinctrl-single
347 PULL_D
348 PULL_U
349 PULL_D
350 PULL_U
351 >;
352 pinctrl-single
353 DRIVE7
354 >;
355 };
356
357 i2c4_cfg_func: i2c4-cf
358 pinctrl-single
359 0x040
360 0x044
361 >;
362 pinctrl-single
363 PULL_D
364 PULL_D
365 PULL_D
366 PULL_D
367 >;
368 pinctrl-single
369 PULL_D
370 PULL_U
371 PULL_D
372 PULL_U
373 >;
374 pinctrl-single
375 DRIVE7
376 >;
377 };
378
379 cam0_rst_cfg_func: cam
380 pinctrl-single
381 0x714
382 >;
383 pinctrl-single
384 PULL_D
385 PULL_D
386 PULL_D
387 PULL_D
388 >;
389 pinctrl-single
390 PULL_D
391 PULL_U
392 PULL_D
393 PULL_U
394 >;
395 pinctrl-single
396 DRIVE7
397 >;
398 };
399
400 cam1_rst_cfg_func: cam
401 pinctrl-single
402 0x04C
403 >;
404 pinctrl-single
405 PULL_D
406 PULL_D
407 PULL_D
408 PULL_D
409 >;
410 pinctrl-single
411 PULL_D
412 PULL_U
413 PULL_D
414 PULL_U
415 >;
416 pinctrl-single
417 DRIVE7
418 >;
419 };
420
421 cam0_pwd_n_cfg_func: c
422 pinctrl-single
423 0x09C
424 >;
425 pinctrl-single
426 PULL_D
427 PULL_D
428 PULL_D
429 PULL_D
430 >;
431 pinctrl-single
432 PULL_D
433 PULL_U
434 PULL_D
435 PULL_U
436 >;
437 pinctrl-single
438 DRIVE7
439 >;
440 };
441
442 cam1_pwd_n_cfg_func: c
443 pinctrl-single
444 0x048
445 >;
446 pinctrl-single
447 PULL_D
448 PULL_D
449 PULL_D
450 PULL_D
451 >;
452 pinctrl-single
453 PULL_D
454 PULL_U
455 PULL_D
456 PULL_U
457 >;
458 pinctrl-single
459 DRIVE7
460 >;
461 };
462
463 isp0_cfg_func: isp0-cf
464 pinctrl-single
465 0x01C
466 0x028
467 0x02C
468 >;
469 pinctrl-single
470 PULL_D
471 PULL_D
472 PULL_D
473 PULL_D
474 >;
475 pinctrl-single
476 PULL_D
477 PULL_U
478 PULL_D
479 PULL_U
480 >;
481 pinctrl-single
482 DRIVE7
483 >;
484 };
485
486 isp1_cfg_func: isp1-cf
487 pinctrl-single
488 0x020
489 0x030
490 0x034
491 >;
492 pinctrl-single
493 PULL_D
494 PULL_D
495 PULL_D
496 PULL_D
497 >;
498 pinctrl-single
499 PULL_D
500 PULL_U
501 PULL_D
502 PULL_U
503 >;
504 pinctrl-single
505 DRIVE7
506 >;
507 };
508 };
509
510 pmx5: pinmux@fc182000 {
511 compatible = "pinctrl-
512 reg = <0x0 0xfc182000
513 #gpio-range-cells = <3
514 #pinctrl-cells = <1>;
515 pinctrl-single,registe
516 pinctrl-single,functio
517 /* pin base, nr pins &
518 pinctrl-single,gpio-ra
519
520 sdio_pmx_func: sdio-pi
521 pinctrl-single
522 0x000
523 0x004
524 0x008
525 0x00c
526 0x010
527 0x014
528 >;
529 };
530 };
531
532 pmx6: pinmux@fc182800 {
533 compatible = "pinconf-
534 reg = <0x0 0xfc182800
535 #pinctrl-cells = <1>;
536 pinctrl-single,registe
537
538 sdio_clk_cfg_func: sdi
539 pinctrl-single
540 0x000
541 >;
542 pinctrl-single
543 PULL_D
544 PULL_D
545 PULL_D
546 PULL_D
547 >;
548 pinctrl-single
549 PULL_D
550 PULL_U
551 PULL_D
552 PULL_U
553 >;
554 pinctrl-single
555 DRIVE6
556 >;
557 };
558
559 sdio_cfg_func: sdio-cf
560 pinctrl-single
561 0x004
562 0x008
563 0x00c
564 0x010
565 0x014
566 >;
567 pinctrl-single
568 PULL_D
569 PULL_D
570 PULL_D
571 PULL_D
572 >;
573 pinctrl-single
574 PULL_U
575 PULL_U
576 PULL_D
577 PULL_U
578 >;
579 pinctrl-single
580 DRIVE6
581 >;
582 };
583 };
584
585 pmx7: pinmux@ff37e000 {
586 compatible = "pinctrl-
587 reg = <0x0 0xff37e000
588 #gpio-range-cells = <3
589 #pinctrl-cells = <1>;
590 pinctrl-single,registe
591 pinctrl-single,functio
592 /* pin base, nr pins &
593 pinctrl-single,gpio-ra
594
595 sd_pmx_func: sd-pins {
596 pinctrl-single
597 0x000
598 0x004
599 0x008
600 0x00c
601 0x010
602 0x014
603 >;
604 };
605 };
606
607 pmx8: pinmux@ff37e800 {
608 compatible = "pinconf-
609 reg = <0x0 0xff37e800
610 #pinctrl-cells = <1>;
611 pinctrl-single,registe
612
613 sd_clk_cfg_func: sd-cl
614 pinctrl-single
615 0x000
616 >;
617 pinctrl-single
618 PULL_D
619 PULL_D
620 PULL_D
621 PULL_D
622 >;
623 pinctrl-single
624 PULL_D
625 PULL_U
626 PULL_D
627 PULL_U
628 >;
629 pinctrl-single
630 DRIVE6
631 DRIVE6
632 >;
633 };
634
635 sd_cfg_func: sd-cfg-pi
636 pinctrl-single
637 0x004
638 0x008
639 0x00c
640 0x010
641 0x014
642 >;
643 pinctrl-single
644 PULL_D
645 PULL_D
646 PULL_D
647 PULL_D
648 >;
649 pinctrl-single
650 PULL_U
651 PULL_U
652 PULL_D
653 PULL_U
654 >;
655 pinctrl-single
656 DRIVE6
657 DRIVE6
658 >;
659 };
660 };
661
662 pmx16: pinmux@fff11800 {
663 compatible = "pinconf-
664 reg = <0x0 0xfff11800
665 #pinctrl-cells = <1>;
666 pinctrl-single,registe
667
668 pwr_key_cfg_func: pwr-
669 pinctrl-single
670 0x090
671 >;
672 pinctrl-single
673 PULL_D
674 PULL_D
675 PULL_D
676 PULL_D
677 >;
678 pinctrl-single
679 PULL_U
680 PULL_U
681 PULL_D
682 PULL_U
683 >;
684 pinctrl-single
685 DRIVE7
686 >;
687 };
688
689 usb_cfg_func: usb-cfg-
690 pinctrl-single
691 0x0AC
692 >;
693 pinctrl-single
694 PULL_D
695 PULL_D
696 PULL_D
697 PULL_D
698 >;
699 pinctrl-single
700 PULL_U
701 PULL_U
702 PULL_D
703 PULL_U
704 >;
705 pinctrl-single
706 DRIVE7
707 >;
708 };
709
710 spi0_cfg_func: spi0-cf
711 pinctrl-single
712 0x0c8
713 0x0cc
714 0x0d0
715 >;
716 pinctrl-single
717 PULL_D
718 PULL_D
719 PULL_D
720 PULL_D
721 >;
722 pinctrl-single
723 PULL_D
724 PULL_U
725 PULL_D
726 PULL_U
727 >;
728 pinctrl-single
729 DRIVE7
730 >;
731 };
732
733 spi2_cfg_func: spi2-cf
734 pinctrl-single
735 0x714
736 0x718
737 0x71c
738 >;
739 pinctrl-single
740 PULL_D
741 PULL_D
742 PULL_D
743 PULL_D
744 >;
745 pinctrl-single
746 PULL_D
747 PULL_U
748 PULL_D
749 PULL_U
750 >;
751 pinctrl-single
752 DRIVE7
753 >;
754 };
755
756 spi3_cfg_func: spi3-cf
757 pinctrl-single
758 0x730
759 0x734
760 0x738
761 >;
762 pinctrl-single
763 PULL_D
764 PULL_D
765 PULL_D
766 PULL_D
767 >;
768 pinctrl-single
769 PULL_D
770 PULL_U
771 PULL_D
772 PULL_U
773 >;
774 pinctrl-single
775 DRIVE7
776 >;
777 };
778
779 spi0_clk_cfg_func: spi
780 pinctrl-single
781 0x0c4
782 >;
783 pinctrl-single
784 PULL_D
785 PULL_D
786 PULL_D
787 PULL_D
788 >;
789 pinctrl-single
790 PULL_D
791 PULL_U
792 PULL_D
793 PULL_U
794 >;
795 pinctrl-single
796 DRIVE7
797 >;
798 };
799
800 spi2_clk_cfg_func: spi
801 pinctrl-single
802 0x710
803 >;
804 pinctrl-single
805 PULL_D
806 PULL_D
807 PULL_D
808 PULL_D
809 >;
810 pinctrl-single
811 PULL_D
812 PULL_U
813 PULL_D
814 PULL_U
815 >;
816 pinctrl-single
817 DRIVE7
818 >;
819 };
820
821 spi3_clk_cfg_func: spi
822 pinctrl-single
823 0x72c
824 >;
825 pinctrl-single
826 PULL_D
827 PULL_D
828 PULL_D
829 PULL_D
830 >;
831 pinctrl-single
832 PULL_D
833 PULL_U
834 PULL_D
835 PULL_U
836 >;
837 pinctrl-single
838 DRIVE7
839 >;
840 };
841
842 i2c0_cfg_func: i2c0-cf
843 pinctrl-single
844 0x04c
845 0x050
846 >;
847 pinctrl-single
848 PULL_D
849 PULL_D
850 PULL_D
851 PULL_D
852 >;
853 pinctrl-single
854 PULL_D
855 PULL_U
856 PULL_D
857 PULL_U
858 >;
859 pinctrl-single
860 DRIVE7
861 >;
862 };
863
864 i2c1_cfg_func: i2c1-cf
865 pinctrl-single
866 0x054
867 0x058
868 >;
869 pinctrl-single
870 PULL_D
871 PULL_D
872 PULL_D
873 PULL_D
874 >;
875 pinctrl-single
876 PULL_D
877 PULL_U
878 PULL_D
879 PULL_U
880 >;
881 pinctrl-single
882 DRIVE7
883 >;
884 };
885
886 i2c2_cfg_func: i2c2-cf
887 pinctrl-single
888 0x05c
889 0x060
890 >;
891 pinctrl-single
892 PULL_D
893 PULL_D
894 PULL_D
895 PULL_D
896 >;
897 pinctrl-single
898 PULL_D
899 PULL_U
900 PULL_D
901 PULL_U
902 >;
903 pinctrl-single
904 DRIVE7
905 >;
906 };
907
908 pcie_clkreq_cfg_func:
909 pinctrl-single
910 0x0b0
911 >;
912 pinctrl-single
913 PULL_D
914 PULL_D
915 PULL_D
916 PULL_D
917 >;
918 pinctrl-single
919 PULL_D
920 PULL_U
921 PULL_D
922 PULL_U
923 >;
924 pinctrl-single
925 DRIVE7
926 >;
927 };
928 i2s2_cfg_func: i2s2-cf
929 pinctrl-single
930 0x07c
931 0x080
932 0x084
933 0x088
934 >;
935 pinctrl-single
936 PULL_D
937 PULL_D
938 PULL_D
939 PULL_D
940 >;
941 pinctrl-single
942 PULL_U
943 PULL_U
944 PULL_D
945 PULL_U
946 >;
947 pinctrl-single
948 DRIVE7
949 >;
950 };
951
952 gpio185_cfg_func: gpio
953 pinctrl-single
954 pinctrl-single
955 pinctrl-single
956 pinctrl-single
957 pinctrl-single
958 };
959
960 gpio185_cfg_idle: gpio
961 pinctrl-single
962 pinctrl-single
963 pinctrl-single
964 pinctrl-single
965 pinctrl-single
966 };
967 };
968 };
969 };
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