1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2021 MediaTek Inc.
4 * Authors: Frank Wunderlich <frank-w@public-fi
5 * Eric Woudstra <ericwouds@gmail.com>
6 * Tianling Shen <cnsztl@immortalwrt.o
7 */
8
9 /dts-v1/;
10
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
15
16 #include "mt7986a.dtsi"
17
18 / {
19 model = "Bananapi BPI-R3 Mini";
20 chassis-type = "embedded";
21 compatible = "bananapi,bpi-r3mini", "m
22
23 aliases {
24 serial0 = &uart0;
25 ethernet0 = &gmac0;
26 ethernet1 = &gmac1;
27 };
28
29 chosen {
30 stdout-path = "serial0:115200n
31 };
32
33 dcin: regulator-12v {
34 compatible = "regulator-fixed"
35 regulator-name = "12vd";
36 regulator-min-microvolt = <120
37 regulator-max-microvolt = <120
38 regulator-boot-on;
39 regulator-always-on;
40 };
41
42 fan: pwm-fan {
43 compatible = "pwm-fan";
44 #cooling-cells = <2>;
45 /*
46 * The signal is inverted on t
47 * does not support polarity i
48 */
49 /* cooling level (0, 1, 2) */
50 cooling-levels = <255 96 0>;
51 pwms = <&pwm 0 10000>;
52 };
53
54 reg_1p8v: regulator-1v8 {
55 compatible = "regulator-fixed"
56 regulator-name = "1.8vd";
57 regulator-min-microvolt = <180
58 regulator-max-microvolt = <180
59 regulator-boot-on;
60 regulator-always-on;
61 vin-supply = <&dcin>;
62 };
63
64 reg_3p3v: regulator-3v3 {
65 compatible = "regulator-fixed"
66 regulator-name = "3.3vd";
67 regulator-min-microvolt = <330
68 regulator-max-microvolt = <330
69 regulator-boot-on;
70 regulator-always-on;
71 vin-supply = <&dcin>;
72 };
73
74 usb_vbus: regulator-5v {
75 compatible = "regulator-fixed"
76 regulator-name = "usb_vbus";
77 regulator-min-microvolt = <500
78 regulator-max-microvolt = <500
79 gpios = <&pio 20 GPIO_ACTIVE_L
80 regulator-boot-on;
81 };
82
83 en8811_a: regulator-phy1 {
84 compatible = "regulator-fixed"
85 regulator-name = "phy1";
86 regulator-min-microvolt = <330
87 regulator-max-microvolt = <330
88 gpio = <&pio 16 GPIO_ACTIVE_LO
89 regulator-always-on;
90 };
91
92 en8811_b: regulator-phy2 {
93 compatible = "regulator-fixed"
94 regulator-name = "phy2";
95 regulator-min-microvolt = <330
96 regulator-max-microvolt = <330
97 gpio = <&pio 17 GPIO_ACTIVE_LO
98 regulator-always-on;
99 };
100
101 leds {
102 compatible = "gpio-leds";
103
104 green_led: led-0 {
105 color = <LED_COLOR_ID_
106 function = LED_FUNCTIO
107 gpios = <&pio 19 GPIO_
108 default-state = "on";
109 };
110 };
111
112 gpio-keys {
113 compatible = "gpio-keys";
114
115 reset-key {
116 label = "reset";
117 linux,code = <KEY_REST
118 gpios = <&pio 7 GPIO_A
119 };
120 };
121
122 };
123
124 &cpu_thermal {
125 cooling-maps {
126 map0 {
127 /* active: set fan to
128 cooling-device = <&fan
129 trip = <&cpu_trip_acti
130 };
131
132 map1 {
133 /* active: set fan to
134 cooling-device = <&fan
135 trip = <&cpu_trip_acti
136 };
137
138 map2 {
139 /* active: set fan to
140 cooling-device = <&fan
141 trip = <&cpu_trip_acti
142 };
143 };
144 };
145
146 &crypto {
147 status = "okay";
148 };
149
150 ð {
151 status = "okay";
152
153 gmac0: mac@0 {
154 compatible = "mediatek,eth-mac
155 reg = <0>;
156 phy-mode = "2500base-x";
157 phy-handle = <&phy0>;
158 };
159
160 gmac1: mac@1 {
161 compatible = "mediatek,eth-mac
162 reg = <1>;
163 phy-mode = "2500base-x";
164 phy-handle = <&phy1>;
165 };
166
167 mdio: mdio-bus {
168 #address-cells = <1>;
169 #size-cells = <0>;
170 };
171 };
172
173 &mmc0 {
174 pinctrl-names = "default", "state_uhs"
175 pinctrl-0 = <&mmc0_pins_default>;
176 pinctrl-1 = <&mmc0_pins_uhs>;
177 vmmc-supply = <®_3p3v>;
178 vqmmc-supply = <®_1p8v>;
179 };
180
181
182 &i2c0 {
183 pinctrl-names = "default";
184 pinctrl-0 = <&i2c_pins>;
185 status = "okay";
186
187 /* MAC Address EEPROM */
188 eeprom@50 {
189 compatible = "atmel,24c02";
190 reg = <0x50>;
191
192 address-width = <8>;
193 pagesize = <8>;
194 size = <256>;
195 };
196 };
197
198 &mdio {
199 phy0: ethernet-phy@14 {
200 reg = <14>;
201 interrupts-extended = <&pio 48
202 reset-gpios = <&pio 49 GPIO_AC
203 reset-assert-us = <10000>;
204 reset-deassert-us = <20000>;
205 phy-mode = "2500base-x";
206 full-duplex;
207 pause;
208 airoha,pnswap-rx;
209
210 leds {
211 #address-cells = <1>;
212 #size-cells = <0>;
213
214 led@0 { /* en8811_a_gp
215 reg = <0>;
216 color = <LED_C
217 function = LED
218 function-enume
219 default-state
220 };
221 led@1 { /* en8811_a_gp
222 reg = <1>;
223 color = <LED_C
224 function = LED
225 function-enume
226 default-state
227 };
228 };
229 };
230
231 phy1: ethernet-phy@15 {
232 reg = <15>;
233 interrupts-extended = <&pio 46
234 reset-gpios = <&pio 47 GPIO_AC
235 reset-assert-us = <10000>;
236 reset-deassert-us = <20000>;
237 phy-mode = "2500base-x";
238 full-duplex;
239 pause;
240 airoha,pnswap-rx;
241
242 leds {
243 #address-cells = <1>;
244 #size-cells = <0>;
245
246 led@0 { /* en8811_b_gp
247 reg = <0>;
248 color = <LED_C
249 function = LED
250 function-enume
251 default-state
252 };
253 led@1 { /* en8811_b_gp
254 reg = <1>;
255 color = <LED_C
256 function = LED
257 function-enume
258 default-state
259 };
260 };
261 };
262 };
263
264 &pcie {
265 pinctrl-names = "default";
266 pinctrl-0 = <&pcie_pins>;
267 status = "okay";
268 };
269
270 &pcie_phy {
271 status = "okay";
272 };
273
274 &pio {
275 i2c_pins: i2c-pins {
276 mux {
277 function = "i2c";
278 groups = "i2c";
279 };
280 };
281
282 mmc0_pins_default: mmc0-pins {
283 mux {
284 function = "emmc";
285 groups = "emmc_51";
286 };
287 conf-cmd-dat {
288 pins = "EMMC_DATA_0",
289 "EMMC_DATA_3",
290 "EMMC_DATA_6",
291 input-enable;
292 drive-strength = <4>;
293 bias-pull-up = <MTK_PU
294 };
295 conf-clk {
296 pins = "EMMC_CK";
297 drive-strength = <6>;
298 bias-pull-down = <MTK_
299 };
300 conf-ds {
301 pins = "EMMC_DSL";
302 bias-pull-down = <MTK_
303 };
304 conf-rst {
305 pins = "EMMC_RSTB";
306 drive-strength = <4>;
307 bias-pull-up = <MTK_PU
308 };
309 };
310
311 mmc0_pins_uhs: mmc0-uhs-pins {
312 mux {
313 function = "emmc";
314 groups = "emmc_51";
315 };
316 conf-cmd-dat {
317 pins = "EMMC_DATA_0",
318 "EMMC_DATA_3",
319 "EMMC_DATA_6",
320 input-enable;
321 drive-strength = <4>;
322 bias-pull-up = <MTK_PU
323 };
324 conf-clk {
325 pins = "EMMC_CK";
326 drive-strength = <6>;
327 bias-pull-down = <MTK_
328 };
329 conf-ds {
330 pins = "EMMC_DSL";
331 bias-pull-down = <MTK_
332 };
333 conf-rst {
334 pins = "EMMC_RSTB";
335 drive-strength = <4>;
336 bias-pull-up = <MTK_PU
337 };
338 };
339
340 pcie_pins: pcie-pins {
341 mux {
342 function = "pcie";
343 groups = "pcie_clk", "
344 };
345 };
346
347 pwm_pins: pwm-pins {
348 mux {
349 function = "pwm";
350 groups = "pwm0";
351 };
352 };
353
354 spi_flash_pins: spi-flash-pins {
355 mux {
356 function = "spi";
357 groups = "spi0", "spi0
358 };
359 };
360
361 usb_ngff_pins: usb-ngff-pins {
362 ngff-gnss-off-conf {
363 pins = "GPIO_6";
364 drive-strength = <8>;
365 mediatek,pull-up-adv =
366 };
367 ngff-pe-rst-conf {
368 pins = "GPIO_7";
369 drive-strength = <8>;
370 mediatek,pull-up-adv =
371 };
372 ngff-wwan-off-conf {
373 pins = "GPIO_8";
374 drive-strength = <8>;
375 mediatek,pull-up-adv =
376 };
377 ngff-pwr-off-conf {
378 pins = "GPIO_9";
379 drive-strength = <8>;
380 mediatek,pull-up-adv =
381 };
382 ngff-rst-conf {
383 pins = "GPIO_10";
384 drive-strength = <8>;
385 mediatek,pull-up-adv =
386 };
387 ngff-coex-conf {
388 pins = "SPI1_CS";
389 drive-strength = <8>;
390 mediatek,pull-up-adv =
391 };
392 };
393
394 wf_2g_5g_pins: wf-2g-5g-pins {
395 mux {
396 function = "wifi";
397 groups = "wf_2g", "wf_
398 };
399 conf {
400 pins = "WF0_HB1", "WF0
401 "WF0_HB0", "WF0
402 "WF0_HB7", "WF0
403 "WF0_TOP_CLK",
404 "WF1_HB2", "WF1
405 "WF1_HB5", "WF1
406 "WF1_TOP_CLK",
407 drive-strength = <4>;
408 };
409 };
410
411 wf_dbdc_pins: wf-dbdc-pins {
412 mux {
413 function = "wifi";
414 groups = "wf_dbdc";
415 };
416 conf {
417 pins = "WF0_HB1", "WF0
418 "WF0_HB0", "WF0
419 "WF0_HB7", "WF0
420 "WF0_TOP_CLK",
421 "WF1_HB2", "WF1
422 "WF1_HB5", "WF1
423 "WF1_TOP_CLK",
424 drive-strength = <4>;
425 };
426 };
427
428 wf_led_pins: wf-led-pins {
429 mux {
430 function = "led";
431 groups = "wifi_led";
432 };
433 };
434 };
435
436 &pwm {
437 pinctrl-names = "default";
438 pinctrl-0 = <&pwm_pins>;
439 status = "okay";
440 };
441
442 &spi0 {
443 pinctrl-names = "default";
444 pinctrl-0 = <&spi_flash_pins>;
445 status = "okay";
446
447 flash@0 {
448 compatible = "spi-nand";
449 #address-cells = <1>;
450 #size-cells = <1>;
451 reg = <0>;
452
453 spi-max-frequency = <20000000>
454 spi-tx-bus-width = <4>;
455 spi-rx-bus-width = <4>;
456 };
457 };
458
459 &ssusb {
460 pinctrl-names = "default";
461 pinctrl-0 = <&usb_ngff_pins>;
462 vusb33-supply = <®_3p3v>;
463 vbus-supply = <&usb_vbus>;
464 status = "okay";
465 };
466
467 &trng {
468 status = "okay";
469 };
470
471 &uart0 {
472 status = "okay";
473 };
474
475 &usb_phy {
476 status = "okay";
477 };
478
479 &watchdog {
480 status = "okay";
481 };
482
483 &wifi {
484 status = "okay";
485 pinctrl-names = "default", "dbdc";
486 pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led
487 pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_
488
489 led {
490 led-active-low;
491 };
492 };
493
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