1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2021 MediaTek Inc.
4 * Authors: Sam.Shih <sam.shih@mediatek.com>
5 * Frank Wunderlich <frank-w@public-fi
6 * Daniel Golle <daniel@makrotopia.org
7 */
8
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/mt65xx.h>
14
15 #include "mt7986a.dtsi"
16
17 / {
18 model = "Bananapi BPI-R3";
19 chassis-type = "embedded";
20 compatible = "bananapi,bpi-r3", "media
21
22 aliases {
23 serial0 = &uart0;
24 ethernet0 = &gmac0;
25 ethernet1 = &gmac1;
26 };
27
28 chosen {
29 stdout-path = "serial0:115200n
30 };
31
32 dcin: regulator-12vd {
33 compatible = "regulator-fixed"
34 regulator-name = "12vd";
35 regulator-min-microvolt = <120
36 regulator-max-microvolt = <120
37 regulator-boot-on;
38 regulator-always-on;
39 };
40
41 fan: pwm-fan {
42 compatible = "pwm-fan";
43 #cooling-cells = <2>;
44 /* cooling level (0, 1, 2) - p
45 cooling-levels = <255 96 0>;
46 pwms = <&pwm 0 10000>;
47 status = "okay";
48 };
49
50 gpio-keys {
51 compatible = "gpio-keys";
52
53 reset-key {
54 label = "reset";
55 linux,code = <KEY_REST
56 gpios = <&pio 9 GPIO_A
57 };
58
59 wps-key {
60 label = "wps";
61 linux,code = <KEY_WPS_
62 gpios = <&pio 10 GPIO_
63 };
64 };
65
66 /* i2c of the left SFP cage (wan) */
67 i2c_sfp1: i2c-gpio-0 {
68 compatible = "i2c-gpio";
69 sda-gpios = <&pio 16 (GPIO_ACT
70 scl-gpios = <&pio 17 (GPIO_ACT
71 i2c-gpio,delay-us = <2>;
72 #address-cells = <1>;
73 #size-cells = <0>;
74 };
75
76 /* i2c of the right SFP cage (lan) */
77 i2c_sfp2: i2c-gpio-1 {
78 compatible = "i2c-gpio";
79 sda-gpios = <&pio 18 (GPIO_ACT
80 scl-gpios = <&pio 19 (GPIO_ACT
81 i2c-gpio,delay-us = <2>;
82 #address-cells = <1>;
83 #size-cells = <0>;
84 };
85
86 leds {
87 compatible = "gpio-leds";
88
89 green_led: led-0 {
90 color = <LED_COLOR_ID_
91 function = LED_FUNCTIO
92 gpios = <&pio 69 GPIO_
93 default-state = "on";
94 };
95
96 blue_led: led-1 {
97 color = <LED_COLOR_ID_
98 function = LED_FUNCTIO
99 gpios = <&pio 86 GPIO_
100 default-state = "off";
101 };
102 };
103
104 reg_1p8v: regulator-1p8v {
105 compatible = "regulator-fixed"
106 regulator-name = "1.8vd";
107 regulator-min-microvolt = <180
108 regulator-max-microvolt = <180
109 regulator-boot-on;
110 regulator-always-on;
111 vin-supply = <&dcin>;
112 };
113
114 reg_3p3v: regulator-3p3v {
115 compatible = "regulator-fixed"
116 regulator-name = "3.3vd";
117 regulator-min-microvolt = <330
118 regulator-max-microvolt = <330
119 regulator-boot-on;
120 regulator-always-on;
121 vin-supply = <&dcin>;
122 };
123
124 /* left SFP cage (wan) */
125 sfp1: sfp-1 {
126 compatible = "sff,sfp";
127 i2c-bus = <&i2c_sfp1>;
128 los-gpios = <&pio 46 GPIO_ACTI
129 maximum-power-milliwatt = <300
130 mod-def0-gpios = <&pio 49 GPIO
131 tx-disable-gpios = <&pio 20 GP
132 tx-fault-gpios = <&pio 7 GPIO_
133 };
134
135 /* right SFP cage (lan) */
136 sfp2: sfp-2 {
137 compatible = "sff,sfp";
138 i2c-bus = <&i2c_sfp2>;
139 los-gpios = <&pio 31 GPIO_ACTI
140 mod-def0-gpios = <&pio 47 GPIO
141 maximum-power-milliwatt = <300
142 tx-disable-gpios = <&pio 15 GP
143 tx-fault-gpios = <&pio 48 GPIO
144 };
145 };
146
147 &cpu_thermal {
148 cooling-maps {
149 map-cpu-active-high {
150 /* active: set fan to
151 cooling-device = <&fan
152 trip = <&cpu_trip_acti
153 };
154
155 map-cpu-active-med {
156 /* active: set fan to
157 cooling-device = <&fan
158 trip = <&cpu_trip_acti
159 };
160
161 map-cpu-active-low {
162 /* active: set fan to
163 cooling-device = <&fan
164 trip = <&cpu_trip_acti
165 };
166 };
167 };
168
169 &crypto {
170 status = "okay";
171 };
172
173 ð {
174 status = "okay";
175
176 gmac0: mac@0 {
177 compatible = "mediatek,eth-mac
178 reg = <0>;
179 phy-mode = "2500base-x";
180
181 fixed-link {
182 speed = <2500>;
183 full-duplex;
184 pause;
185 };
186 };
187
188 gmac1: mac@1 {
189 compatible = "mediatek,eth-mac
190 reg = <1>;
191 phy-mode = "2500base-x";
192 sfp = <&sfp1>;
193 managed = "in-band-status";
194 };
195
196 mdio: mdio-bus {
197 #address-cells = <1>;
198 #size-cells = <0>;
199 };
200 };
201
202 &mdio {
203 switch: switch@31 {
204 compatible = "mediatek,mt7531"
205 reg = <31>;
206 interrupt-controller;
207 #interrupt-cells = <1>;
208 interrupts-extended = <&pio 66
209 reset-gpios = <&pio 5 GPIO_ACT
210 };
211 };
212
213 &mmc0 {
214 pinctrl-names = "default", "state_uhs"
215 pinctrl-0 = <&mmc0_pins_default>;
216 pinctrl-1 = <&mmc0_pins_uhs>;
217 vmmc-supply = <®_3p3v>;
218 vqmmc-supply = <®_1p8v>;
219 };
220
221 &i2c0 {
222 pinctrl-names = "default";
223 pinctrl-0 = <&i2c_pins>;
224 status = "okay";
225 };
226
227 &pcie {
228 pinctrl-names = "default";
229 pinctrl-0 = <&pcie_pins>;
230 status = "okay";
231 };
232
233 &pcie_phy {
234 status = "okay";
235 };
236
237 &pio {
238 i2c_pins: i2c-pins {
239 mux {
240 function = "i2c";
241 groups = "i2c";
242 };
243 };
244
245 mmc0_pins_default: mmc0-pins {
246 mux {
247 function = "emmc";
248 groups = "emmc_51";
249 };
250 conf-cmd-dat {
251 pins = "EMMC_DATA_0",
252 "EMMC_DATA_3",
253 "EMMC_DATA_6",
254 input-enable;
255 drive-strength = <4>;
256 bias-pull-up = <MTK_PU
257 };
258 conf-clk {
259 pins = "EMMC_CK";
260 drive-strength = <6>;
261 bias-pull-down = <MTK_
262 };
263 conf-ds {
264 pins = "EMMC_DSL";
265 bias-pull-down = <MTK_
266 };
267 conf-rst {
268 pins = "EMMC_RSTB";
269 drive-strength = <4>;
270 bias-pull-up = <MTK_PU
271 };
272 };
273
274 mmc0_pins_uhs: mmc0-uhs-pins {
275 mux {
276 function = "emmc";
277 groups = "emmc_51";
278 };
279 conf-cmd-dat {
280 pins = "EMMC_DATA_0",
281 "EMMC_DATA_3",
282 "EMMC_DATA_6",
283 input-enable;
284 drive-strength = <4>;
285 bias-pull-up = <MTK_PU
286 };
287 conf-clk {
288 pins = "EMMC_CK";
289 drive-strength = <6>;
290 bias-pull-down = <MTK_
291 };
292 conf-ds {
293 pins = "EMMC_DSL";
294 bias-pull-down = <MTK_
295 };
296 conf-rst {
297 pins = "EMMC_RSTB";
298 drive-strength = <4>;
299 bias-pull-up = <MTK_PU
300 };
301 };
302
303 pcie_pins: pcie-pins {
304 mux {
305 function = "pcie";
306 groups = "pcie_clk", "
307 };
308 };
309
310 pwm_pins: pwm-pins {
311 mux {
312 function = "pwm";
313 groups = "pwm0", "pwm1
314 };
315 };
316
317 spi_flash_pins: spi-flash-pins {
318 mux {
319 function = "spi";
320 groups = "spi0", "spi0
321 };
322 };
323
324 spic_pins: spic-pins {
325 mux {
326 function = "spi";
327 groups = "spi1_0";
328 };
329 };
330
331 uart1_pins: uart1-pins {
332 mux {
333 function = "uart";
334 groups = "uart1_rx_tx"
335 };
336 };
337
338 uart2_pins: uart2-pins {
339 mux {
340 function = "uart";
341 groups = "uart2_0_rx_t
342 };
343 };
344
345 wf_2g_5g_pins: wf-2g-5g-pins {
346 mux {
347 function = "wifi";
348 groups = "wf_2g", "wf_
349 };
350 conf {
351 pins = "WF0_HB1", "WF0
352 "WF0_HB0", "WF0
353 "WF0_HB7", "WF0
354 "WF0_TOP_CLK",
355 "WF1_HB2", "WF1
356 "WF1_HB5", "WF1
357 "WF1_TOP_CLK",
358 drive-strength = <4>;
359 };
360 };
361
362 wf_dbdc_pins: wf-dbdc-pins {
363 mux {
364 function = "wifi";
365 groups = "wf_dbdc";
366 };
367 conf {
368 pins = "WF0_HB1", "WF0
369 "WF0_HB0", "WF0
370 "WF0_HB7", "WF0
371 "WF0_TOP_CLK",
372 "WF1_HB2", "WF1
373 "WF1_HB5", "WF1
374 "WF1_TOP_CLK",
375 drive-strength = <4>;
376 };
377 };
378
379 wf_led_pins: wf-led-pins {
380 mux {
381 function = "led";
382 groups = "wifi_led";
383 };
384 };
385 };
386
387 &pwm {
388 pinctrl-names = "default";
389 pinctrl-0 = <&pwm_pins>;
390 status = "okay";
391 };
392
393 &spi0 {
394 pinctrl-names = "default";
395 pinctrl-0 = <&spi_flash_pins>;
396 status = "okay";
397 };
398
399 &spi1 {
400 pinctrl-names = "default";
401 pinctrl-0 = <&spic_pins>;
402 status = "okay";
403 };
404
405 &ssusb {
406 status = "okay";
407 };
408
409 &switch {
410 ports {
411 #address-cells = <1>;
412 #size-cells = <0>;
413
414 port@0 {
415 reg = <0>;
416 label = "wan";
417 };
418
419 port@1 {
420 reg = <1>;
421 label = "lan0";
422 };
423
424 port@2 {
425 reg = <2>;
426 label = "lan1";
427 };
428
429 port@3 {
430 reg = <3>;
431 label = "lan2";
432 };
433
434 port@4 {
435 reg = <4>;
436 label = "lan3";
437 };
438
439 port5: port@5 {
440 reg = <5>;
441 label = "lan4";
442 phy-mode = "2500base-x
443 sfp = <&sfp2>;
444 managed = "in-band-sta
445 };
446
447 port@6 {
448 reg = <6>;
449 label = "cpu";
450 ethernet = <&gmac0>;
451 phy-mode = "2500base-x
452
453 fixed-link {
454 speed = <2500>
455 full-duplex;
456 pause;
457 };
458 };
459 };
460 };
461
462 &trng {
463 status = "okay";
464 };
465
466 &uart0 {
467 status = "okay";
468 };
469
470 &uart1 {
471 pinctrl-names = "default";
472 pinctrl-0 = <&uart1_pins>;
473 status = "okay";
474 };
475
476 &uart2 {
477 pinctrl-names = "default";
478 pinctrl-0 = <&uart2_pins>;
479 status = "okay";
480 };
481
482 &usb_phy {
483 status = "okay";
484 };
485
486 &watchdog {
487 status = "okay";
488 };
489
490 &wifi {
491 status = "okay";
492 pinctrl-names = "default", "dbdc";
493 pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led
494 pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_
495
496 led {
497 led-active-low;
498 };
499 };
500
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