1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2018, Linaro Limited
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include "qcs404-evb.dtsi"
10
11 / {
12 model = "Qualcomm Technologies, Inc. Q
13 compatible = "qcom,qcs404-evb-4000", "
14 "qcom,qcs404";
15 };
16
17 ðernet {
18 status = "okay";
19
20 snps,reset-gpio = <&tlmm 60 GPIO_ACTIV
21 snps,reset-active-low;
22 snps,reset-delays-us = <0 10000 10000>
23
24 pinctrl-names = "default";
25 pinctrl-0 = <ðernet_defaults>;
26
27 phy-handle = <&phy1>;
28 phy-mode = "rgmii";
29 mdio {
30 #address-cells = <1>;
31 #size-cells = <0>;
32 compatible = "snps,dwmac-mdio"
33 phy1: phy@4 {
34 compatible = "ethernet
35 device_type = "etherne
36 reg = <0x4>;
37 };
38 };
39 };
40
41 &tlmm {
42 ethernet_defaults: ethernet-defaults-s
43 int-pins {
44 pins = "gpio61";
45 function = "rgmii_int"
46 bias-disable;
47 drive-strength = <2>;
48 };
49 mdc-pins {
50 pins = "gpio76";
51 function = "rgmii_mdc"
52 bias-pull-up;
53 };
54 mdio-pins {
55 pins = "gpio75";
56 function = "rgmii_mdio
57 bias-pull-up;
58 };
59 tx-pins {
60 pins = "gpio67", "gpio
61 function = "rgmii_tx";
62 bias-pull-up;
63 drive-strength = <16>;
64 };
65 rx-pins {
66 pins = "gpio73", "gpio
67 function = "rgmii_rx";
68 bias-disable;
69 drive-strength = <2>;
70 };
71 tx-ctl-pins {
72 pins = "gpio68";
73 function = "rgmii_ctl"
74 bias-pull-up;
75 drive-strength = <16>;
76 };
77 rx-ctl-pins {
78 pins = "gpio74";
79 function = "rgmii_ctl"
80 bias-disable;
81 drive-strength = <2>;
82 };
83 tx-ck-pins {
84 pins = "gpio63";
85 function = "rgmii_ck";
86 bias-pull-up;
87 drive-strength = <16>;
88 };
89 rx-ck-pins {
90 pins = "gpio69";
91 function = "rgmii_ck";
92 bias-disable;
93 drive-strength = <2>;
94 };
95 };
96 };
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