1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3
2 /*
3 * Copyright (c) 2021, Iskren Chernev <iskren.c
4 */
5
6 /dts-v1/;
7
8 #include "sm4250.dtsi"
9
10 / {
11 model = "OnePlus Nord N100";
12 compatible = "oneplus,billie2", "qcom,
13
14 /* required for bootloader to select c
15 qcom,msm-id = <0x1a1 0x10000 0x1bc 0x1
16 qcom,board-id = <0x1000b 0x00>;
17
18 aliases {
19 };
20
21 chosen {
22 #address-cells = <2>;
23 #size-cells = <2>;
24 ranges;
25
26 stdout-path = "framebuffer0";
27
28 framebuffer0: framebuffer@9d40
29 compatible = "simple-f
30 reg = <0 0x5c000000 0
31 width = <720>;
32 height = <1600>;
33 stride = <(720 * 4)>;
34 format = "a8r8g8b8";
35 };
36 };
37 };
38
39 &reserved_memory {
40 bootloader_log_mem: memory@5fff7000 {
41 reg = <0x0 0x5fff7000 0x0 0x80
42 no-map;
43 };
44
45 ramoops@cbe00000 {
46 compatible = "ramoops";
47 reg = <0x0 0xcbe00000 0x0 0x40
48 record-size = <0x40000>;
49 pmsg-size = <0x200000>;
50 console-size = <0x40000>;
51 ftrace-size = <0x40000>;
52 };
53
54 param_mem: memory@cc200000 {
55 reg = <0x0 0xcc200000 0x0 0x10
56 no-map;
57 };
58
59 mtp_mem: memory@cc300000 {
60 reg = <0x00 0xcc300000 0x00 0x
61 no-map;
62 };
63 };
64
65 &rpm_requests {
66 regulators-0 {
67 compatible = "qcom,rpm-pm6125-
68
69 vreg_s6a: s6 {
70 regulator-min-microvol
71 regulator-max-microvol
72 };
73
74 vreg_s7a: s7 {
75 regulator-min-microvol
76 regulator-max-microvol
77 };
78
79 vreg_s8a: s8 {
80 regulator-min-microvol
81 regulator-max-microvol
82 };
83
84 vreg_l1a: l1 {
85 regulator-min-microvol
86 regulator-max-microvol
87 };
88
89 vreg_l4a: l4 {
90 regulator-min-microvol
91 regulator-max-microvol
92 };
93
94 vreg_l5a: l5 {
95 regulator-min-microvol
96 regulator-max-microvol
97 };
98
99 vreg_l6a: l6 {
100 regulator-min-microvol
101 regulator-max-microvol
102 };
103
104 vreg_l7a: l7 {
105 regulator-min-microvol
106 regulator-max-microvol
107 };
108
109 vreg_l8a: l8 {
110 regulator-min-microvol
111 regulator-max-microvol
112 };
113
114 vreg_l9a: l9 {
115 regulator-min-microvol
116 regulator-max-microvol
117 };
118
119 vreg_l10a: l10 {
120 regulator-min-microvol
121 regulator-max-microvol
122 };
123
124 vreg_l11a: l11 {
125 regulator-min-microvol
126 regulator-max-microvol
127 };
128
129 vreg_l12a: l12 {
130 regulator-min-microvol
131 regulator-max-microvol
132 };
133
134 vreg_l13a: l13 {
135 regulator-min-microvol
136 regulator-max-microvol
137 };
138
139 vreg_l14a: l14 {
140 regulator-min-microvol
141 regulator-max-microvol
142 };
143
144 vreg_l15a: l15 {
145 regulator-min-microvol
146 regulator-max-microvol
147 };
148
149 vreg_l16a: l16 {
150 regulator-min-microvol
151 regulator-max-microvol
152 };
153
154 vreg_l17a: l17 {
155 regulator-min-microvol
156 regulator-max-microvol
157 };
158
159 vreg_l18a: l18 {
160 regulator-min-microvol
161 regulator-max-microvol
162 };
163
164 vreg_l19a: l19 {
165 regulator-min-microvol
166 regulator-max-microvol
167 };
168
169 vreg_l20a: l20 {
170 regulator-min-microvol
171 regulator-max-microvol
172 };
173
174 vreg_l21a: l21 {
175 regulator-min-microvol
176 regulator-max-microvol
177 };
178
179 vreg_l22a: l22 {
180 regulator-min-microvol
181 regulator-max-microvol
182 };
183
184 vreg_l23a: l23 {
185 regulator-min-microvol
186 regulator-max-microvol
187 };
188
189 vreg_l24a: l24 {
190 regulator-min-microvol
191 regulator-max-microvol
192 };
193 };
194 };
195
196 &sleep_clk {
197 clock-frequency = <32764>;
198 };
199
200 &sdhc_2 {
201 vmmc-supply = <&vreg_l22a>;
202 vqmmc-supply = <&vreg_l5a>;
203
204 cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>
205 pinctrl-names = "default", "sleep";
206 pinctrl-0 = <&sdc2_state_on &sdc2_card
207 pinctrl-1 = <&sdc2_state_off &sdc2_car
208
209 status = "okay";
210 };
211
212 &tlmm {
213 gpio-reserved-ranges = <14 4>;
214
215 sdc2_card_det_n: sd-card-det-n-state {
216 pins = "gpio88";
217 function = "gpio";
218 drive-strength = <2>;
219 bias-pull-up;
220 };
221 };
222
223 &ufs_mem_hc {
224 vcc-supply = <&vreg_l24a>;
225 vcc-max-microamp = <600000>;
226 vccq2-supply = <&vreg_l11a>;
227 vccq2-max-microamp = <600000>;
228 vdd-hba-supply = <&vreg_l18a>;
229 status = "okay";
230 };
231
232 &ufs_mem_phy {
233 vdda-phy-supply = <&vreg_l4a>;
234 vdda-pll-supply = <&vreg_l12a>;
235 status = "okay";
236 };
237
238 &usb {
239 status = "okay";
240 };
241
242 &usb_dwc3 {
243 /delete-property/ usb-role-switch;
244 maximum-speed = "high-speed";
245 dr_mode = "peripheral";
246
247 phys = <&usb_hsphy>;
248 phy-names = "usb2-phy";
249 };
250
251 &usb_hsphy {
252 vdd-supply = <&vreg_l4a>;
253 vdda-pll-supply = <&vreg_l12a>;
254 vdda-phy-dpdm-supply = <&vreg_l15a>;
255 status = "okay";
256 };
257
258 &xo_board {
259 clock-frequency = <19200000>;
260 };
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