1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2021, Konrad Dybcio <konrad.dy
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h
10 #include <dt-bindings/regulator/qcom,rpmh-regu
11 #include "sm8150.dtsi"
12 #include "pm8150.dtsi"
13 #include "pm8150b.dtsi"
14 #include "pm8150l.dtsi"
15
16 /delete-node/ &cdsp_mem;
17 /delete-node/ &gpu_mem;
18 /delete-node/ &ipa_fw_mem;
19 /delete-node/ &ipa_gsi_mem;
20 /delete-node/ &mpss_mem;
21 /delete-node/ &slpi_mem;
22 /delete-node/ &spss_mem;
23 /delete-node/ &venus_mem;
24
25 / {
26 qcom,msm-id = <339 0x20000>; /* SM8150
27 qcom,board-id = <8 0>;
28
29 chosen {
30 #address-cells = <2>;
31 #size-cells = <2>;
32 ranges;
33
34 framebuffer: framebuffer@9c000
35 compatible = "simple-f
36 reg = <0 0x9c000000 0
37 /* Griffin BL initiali
38 width = <1096>;
39 height = <2560>;
40 stride = <(1096 * 4)>;
41 format = "a8r8g8b8";
42 /*
43 * That's (going to be
44 * to unused clk clean
45 */
46 clocks = <&gcc GCC_DIS
47 <&gcc GCC_DIS
48 };
49 };
50
51 gpio-keys {
52 compatible = "gpio-keys";
53
54 pinctrl-names = "default";
55 pinctrl-0 = <&focus_n &snapsho
56
57 key-camera-focus {
58 label = "Camera Focus"
59 linux,code = <KEY_CAME
60 gpios = <&pm8150b_gpio
61 debounce-interval = <1
62 linux,can-disable;
63 wakeup-source;
64 };
65
66 key-camera-snapshot {
67 label = "Camera Snapsh
68 linux,code = <KEY_CAME
69 gpios = <&pm8150b_gpio
70 debounce-interval = <1
71 linux,can-disable;
72 wakeup-source;
73 };
74
75 key-vol-down {
76 label = "Volume Down";
77 linux,code = <KEY_VOLU
78 gpios = <&pm8150_gpios
79 debounce-interval = <1
80 linux,can-disable;
81 wakeup-source;
82 };
83 };
84
85 cam0_vdig_vreg: cam0-vdig-regulator {
86 compatible = "regulator-fixed"
87 regulator-name = "camera0_vdig
88 gpio = <&tlmm 22 GPIO_ACTIVE_H
89 enable-active-high;
90
91 pinctrl-0 = <&main_cam_pwr_en>
92 pinctrl-names = "default";
93 };
94
95 cam1_vdig_vreg: cam1-vdig-regulator {
96 compatible = "regulator-fixed"
97 regulator-name = "camera1_vdig
98 gpio = <&tlmm 79 GPIO_ACTIVE_H
99 enable-active-high;
100
101 pinctrl-0 = <&sub_cam_pwr_en>;
102 pinctrl-names = "default";
103 };
104
105 cam2_vdig_vreg: cam2-vdig-regulator {
106 compatible = "regulator-fixed"
107 regulator-name = "camera2_vdig
108 gpio = <&tlmm 25 GPIO_ACTIVE_H
109 enable-active-high;
110
111 pinctrl-0 = <&chat_cam_pwr_en>
112 pinctrl-names = "default";
113 };
114
115 cam3_vdig_vreg: cam3-vdig-regulator {
116 compatible = "regulator-fixed"
117 regulator-name = "camera3_vdig
118 gpio = <&pm8150_gpios 7 GPIO_A
119 enable-active-high;
120
121 pinctrl-0 = <&supwc_pwr_en>;
122 pinctrl-names = "default";
123 };
124
125 cam_vmdr_vreg: cam-vmdr-regulator {
126 compatible = "regulator-fixed"
127 regulator-name = "camera_vmdr_
128 gpio = <&pm8150l_gpios 3 GPIO_
129 enable-active-high;
130
131 pinctrl-0 = <&main_cam_pwr_vmd
132 pinctrl-names = "default";
133 };
134
135 rgbcir_vreg: rgbcir-regulator {
136 compatible = "regulator-fixed"
137 regulator-name = "rgbcir_vreg"
138 gpio = <&tlmm 29 GPIO_ACTIVE_H
139 enable-active-high;
140
141 pinctrl-0 = <&rgbc_ir_pwr_en>;
142 pinctrl-names = "default";
143 };
144
145 vph_pwr: vph-pwr-regulator {
146 compatible = "regulator-fixed"
147 regulator-name = "vph_pwr";
148 regulator-min-microvolt = <370
149 regulator-max-microvolt = <370
150 };
151
152 /*
153 * Apparently RPMh does not provide su
154 * is always-on; model it as a fixed r
155 */
156 vreg_s4a_1p8: pm8150-s4 {
157 compatible = "regulator-fixed"
158 regulator-name = "vreg_s4a_1p8
159
160 regulator-min-microvolt = <180
161 regulator-max-microvolt = <180
162
163 regulator-always-on;
164 regulator-boot-on;
165
166 vin-supply = <&vph_pwr>;
167 };
168
169 reserved-memory {
170 mpss_mem: memory@8dc00000 {
171 reg = <0x0 0x8dc00000
172 no-map;
173 };
174
175 venus_mem: memory@97200000 {
176 reg = <0x0 0x97200000
177 no-map;
178 };
179
180 slpi_mem: memory@97700000 {
181 reg = <0x0 0x97700000
182 no-map;
183 };
184
185 ipa_fw_mem: memory@98b00000 {
186 reg = <0x0 0x98b00000
187 no-map;
188 };
189
190 ipa_gsi_mem: memory@98b10000 {
191 reg = <0x0 0x98b10000
192 no-map;
193 };
194
195 gpu_mem: memory@98b15000 {
196 reg = <0x0 0x98b15000
197 no-map;
198 };
199
200 spss_mem: memory@98c00000 {
201 reg = <0x0 0x98c00000
202 no-map;
203 };
204
205 cdsp_mem: memory@98d00000 {
206 reg = <0x0 0x98d00000
207 no-map;
208 };
209
210 cont_splash_mem: memory@9c0000
211 reg = <0x0 0x9c000000
212 no-map;
213 };
214
215 cdsp_sec_mem: memory@a4c00000
216 reg = <0x0 0xa4c00000
217 no-map;
218 };
219
220 ramoops@ffc00000 {
221 compatible = "ramoops"
222 reg = <0x0 0xffc00000
223 record-size = <0x1000>
224 console-size = <0x4000
225 pmsg-size = <0x20000>;
226 ecc-size = <16>;
227 no-map;
228 };
229 };
230 };
231
232 &adsp_mem {
233 reg = <0x0 0x8be00000 0x0 0x1e00000>;
234 };
235
236 &apps_rsc {
237 regulators-0 {
238 compatible = "qcom,pm8150-rpmh
239 qcom,pmic-id = "a";
240
241 vdd-s1-supply = <&vph_pwr>;
242 vdd-s2-supply = <&vph_pwr>;
243 vdd-s3-supply = <&vph_pwr>;
244 vdd-s4-supply = <&vph_pwr>;
245 vdd-s5-supply = <&vph_pwr>;
246 vdd-s6-supply = <&vph_pwr>;
247 vdd-s7-supply = <&vph_pwr>;
248 vdd-s8-supply = <&vph_pwr>;
249 vdd-s9-supply = <&vph_pwr>;
250 vdd-s10-supply = <&vph_pwr>;
251
252 vdd-l1-l8-l11-supply = <&vreg_
253 vdd-l2-l10-supply = <&vreg_bob
254 vdd-l3-l4-l5-l18-supply = <&vr
255 vdd-l6-l9-supply = <&vreg_s8c_
256 vdd-l7-l12-l14-l15-supply = <&
257 vdd-l13-l16-l17-supply = <&vre
258
259 vreg_s2a_0p6: smps2 {
260 regulator-min-microvol
261 regulator-max-microvol
262 regulator-initial-mode
263 };
264
265 vreg_s5a_1p9: smps5 {
266 regulator-min-microvol
267 regulator-max-microvol
268 regulator-initial-mode
269 };
270
271 vreg_s6a_0p9: smps6 {
272 regulator-min-microvol
273 regulator-max-microvol
274 regulator-initial-mode
275 };
276
277 vreg_l1a_0p75: ldo1 {
278 regulator-min-microvol
279 regulator-max-microvol
280 regulator-initial-mode
281 };
282
283 vreg_l2a_3p1: ldo2 {
284 regulator-min-microvol
285 regulator-max-microvol
286 regulator-initial-mode
287 };
288
289 vreg_l3a_0p8: ldo3 {
290 regulator-min-microvol
291 regulator-max-microvol
292 regulator-initial-mode
293 };
294
295 vreg_l5a_0p875: ldo5 {
296 regulator-min-microvol
297 regulator-max-microvol
298 regulator-initial-mode
299 };
300
301 vreg_l6a_1p2: ldo6 {
302 regulator-min-microvol
303 regulator-max-microvol
304 regulator-initial-mode
305 };
306
307 vreg_l7a_1p8: ldo7 {
308 regulator-min-microvol
309 regulator-max-microvol
310 regulator-initial-mode
311 };
312
313 vreg_l9a_1p2: ldo9 {
314 regulator-min-microvol
315 regulator-max-microvol
316 regulator-initial-mode
317 };
318
319 vreg_l10a_2p5: ldo10 {
320 regulator-min-microvol
321 regulator-max-microvol
322 regulator-initial-mode
323 };
324
325 vreg_l11a_0p8: ldo11 {
326 regulator-min-microvol
327 regulator-max-microvol
328 regulator-initial-mode
329 };
330
331 vreg_l12a_1p8: ldo12 {
332 regulator-min-microvol
333 regulator-max-microvol
334 regulator-initial-mode
335 };
336
337 /* L13 is unused. */
338
339 vreg_l14a_1p8: ldo14 {
340 regulator-min-microvol
341 regulator-max-microvol
342 regulator-initial-mode
343 };
344
345 vreg_l15a_1p7: ldo15 {
346 regulator-min-microvol
347 regulator-max-microvol
348 regulator-initial-mode
349 };
350
351 vreg_l16a_2p7: ldo16 {
352 regulator-min-microvol
353 regulator-max-microvol
354 regulator-initial-mode
355 };
356
357 vreg_l17a_3p0: ldo17 {
358 regulator-min-microvol
359 regulator-max-microvol
360 regulator-initial-mode
361 };
362
363 vreg_l18a_0p8: ldo18 {
364 regulator-min-microvol
365 regulator-max-microvol
366 regulator-initial-mode
367 };
368 };
369
370 regulators-1 {
371 compatible = "qcom,pm8150l-rpm
372 qcom,pmic-id = "c";
373
374 vdd-s1-supply = <&vph_pwr>;
375 vdd-s2-supply = <&vph_pwr>;
376 vdd-s3-supply = <&vph_pwr>;
377 vdd-s4-supply = <&vph_pwr>;
378 vdd-s5-supply = <&vph_pwr>;
379 vdd-s6-supply = <&vph_pwr>;
380 vdd-s7-supply = <&vph_pwr>;
381 vdd-s8-supply = <&vph_pwr>;
382
383 vdd-l1-l8-supply = <&vreg_s4a_
384 vdd-l2-l3-supply = <&vreg_s8c_
385 vdd-l4-l5-l6-supply = <&vreg_b
386 vdd-l7-l11-supply = <&vreg_bob
387 vdd-l9-l10-supply = <&vreg_bob
388
389 vdd-bob-supply = <&vph_pwr>;
390 vdd-flash-supply = <&vreg_bob>
391 vdd-rgb-supply = <&vreg_bob>;
392
393 vreg_bob: bob {
394 regulator-min-microvol
395 regulator-max-microvol
396 regulator-initial-mode
397 regulator-allow-bypass
398 };
399
400 vreg_s1c_1p1: smps1 {
401 regulator-min-microvol
402 regulator-max-microvol
403 regulator-initial-mode
404 };
405
406 vreg_s8c_1p3: smps8 {
407 regulator-min-microvol
408 regulator-max-microvol
409 regulator-initial-mode
410 };
411
412 vreg_l1c_1p8: ldo1 {
413 regulator-min-microvol
414 regulator-max-microvol
415 regulator-initial-mode
416 };
417
418 vreg_l2c_1p3: ldo2 {
419 regulator-min-microvol
420 regulator-max-microvol
421 regulator-initial-mode
422 };
423
424 vreg_l3c_1p2: ldo3 {
425 regulator-min-microvol
426 regulator-max-microvol
427 regulator-initial-mode
428 };
429
430 vreg_l4c_1p8: ldo4 {
431 regulator-min-microvol
432 regulator-max-microvol
433 regulator-initial-mode
434 };
435
436 vreg_l5c_1p8: ldo5 {
437 regulator-min-microvol
438 regulator-max-microvol
439 regulator-initial-mode
440 };
441
442 vreg_l6c_2p9: ldo6 {
443 regulator-min-microvol
444 regulator-max-microvol
445 regulator-initial-mode
446 regulator-allow-set-lo
447 regulator-allowed-mode
448
449 };
450
451 vreg_l7c_3p0: ldo7 {
452 regulator-min-microvol
453 regulator-max-microvol
454 regulator-initial-mode
455 };
456
457 vreg_l8c_1p8: ldo8 {
458 regulator-min-microvol
459 regulator-max-microvol
460 regulator-initial-mode
461 };
462
463 vreg_l9c_2p9: ldo9 {
464 regulator-min-microvol
465 regulator-max-microvol
466 regulator-initial-mode
467 regulator-allow-set-lo
468 regulator-allowed-mode
469
470 };
471
472 vreg_l10c_3p3: ldo10 {
473 regulator-min-microvol
474 regulator-max-microvol
475 regulator-initial-mode
476 };
477
478 vreg_l11c_3p3: ldo11 {
479 regulator-min-microvol
480 regulator-max-microvol
481 regulator-initial-mode
482 };
483 };
484
485 /* PM8009 is not present on these boar
486 };
487
488 &i2c4 {
489 status = "okay";
490
491 /* Qcom SMB1355 @ c */
492 /* Qcom SMB1390 @ 10 */
493 /* Qcom FSA4480 USB-C audio switch @ 4
494
495 nfc@28 {
496 compatible = "nxp,nxp-nci-i2c"
497 reg = <0x28>;
498
499 interrupt-parent = <&tlmm>;
500 interrupts = <47 IRQ_TYPE_EDGE
501
502 enable-gpios = <&tlmm 41 GPIO_
503 firmware-gpios = <&tlmm 48 GPI
504 };
505 };
506
507 &i2c7 {
508 status = "okay";
509
510 /* AMS TCS3490 RGB+IR color sensor @ 7
511 };
512
513 &i2c10 {
514 status = "okay";
515
516 /* Samsung touchscreen @ 48 */
517 };
518
519 &pm8150_gpios {
520 gpio-line-names = "VOL_DOWN_N", /* GPI
521 "",
522 "NC",
523 "NC",
524 "",
525 "NC",
526 "SUPWC_PWR_EN",
527 "",
528 "NC",
529 "NC"; /* GPIO_10 */
530
531 vol_down_n: vol-down-n-state {
532 pins = "gpio1";
533 function = "normal";
534 power-source = <0>;
535 bias-pull-up;
536 input-enable;
537 };
538
539 supwc_pwr_en: supwc-pwr-en-state {
540 pins = "gpio7";
541 function = "normal";
542 qcom,drive-strength = <1>;
543 power-source = <1>;
544 drive-push-pull;
545 output-low;
546 };
547 };
548
549 &pm8150b_gpios {
550 gpio-line-names = "SNAPSHOT_N", /* GPI
551 "FOCUS_N",
552 "NC",
553 "NC",
554 "RF_LCD_ID_EN",
555 "NC",
556 "TS_VDDH_EN",
557 "LCD_ID",
558 "",
559 "NC", /* GPIO_10 */
560 "NC",
561 "RF_ID";
562
563 snapshot_n: snapshot-n-state {
564 pins = "gpio1";
565 function = "normal";
566 power-source = <0>;
567 bias-pull-up;
568 input-enable;
569 };
570
571 focus_n: focus-n-state {
572 pins = "gpio2";
573 function = "normal";
574 power-source = <0>;
575 bias-pull-up;
576 input-enable;
577 };
578 };
579
580 &pm8150l_gpios {
581 gpio-line-names = "TS_VDDIO_EN", /* GP
582 "NC",
583 "MAIN_CAM_PWR_VMDR_E
584 "NC",
585 "",
586 "NC",
587 "NC",
588 "FP_LDO_EN",
589 "NC",
590 "NC", /* GPIO_10 */
591 "NC",
592 "NC";
593
594 main_cam_pwr_vmdr_en: main-cam-pwr-vmd
595 pins = "gpio3";
596 function = "normal";
597 qcom,drive-strength = <PMIC_GP
598 power-source = <0>;
599 drive-push-pull;
600 output-low;
601 };
602 };
603
604 &pon_pwrkey {
605 status = "okay";
606 };
607
608 &pon_resin {
609 linux,code = <KEY_VOLUMEUP>;
610 status = "okay";
611 };
612
613 &qupv3_id_0 {
614 status = "okay";
615 };
616
617 &qupv3_id_1 {
618 status = "okay";
619 };
620
621 &sdhc_2 {
622 vmmc-supply = <&vreg_l9c_2p9>;
623 vqmmc-supply = <&vreg_l6c_2p9>;
624 cd-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>
625 bus-width = <4>;
626 no-sdio;
627 no-mmc;
628
629 status = "okay";
630 };
631
632 &tlmm {
633 gpio-reserved-ranges = <126 4>;
634 gpio-line-names = "NFC_ESE_SPI_MISO",
635 "NFC_ESE_SPI_MOSI",
636 "NFC_ESE_SPI_SCLK",
637 "NFC_ESE_SPI_CS_N",
638 "NC",
639 "NC",
640 "DISP_RESET_N",
641 "DEBUG_GPIO0",
642 "MDP_VSYNC_P",
643 "TS_I2C_SDA",
644 "TS_I2C_SCL", /* GPI
645 "CAM_SOF",
646 "CAM2_RST_N",
647 "CAM_MCLK0",
648 "CAM_MCLK1",
649 "CAM_MCLK2",
650 "CAM_MCLK3",
651 "CCI_I2C_SDA0",
652 "CCI_I2C_SCL0",
653 "CCI_I2C_SDA1",
654 "CCI_I2C_SCL1", /* G
655 "NC",
656 "MAIN_CAM_PWR_EN",
657 "CAM3_RST_N",
658 "NC",
659 "CHAT_CAM_PWR_EN",
660 "NC",
661 "NC",
662 "CAM0_RST_N",
663 "RGBC_IR_PWR_EN",
664 "CAM1_RST_N", /* GPI
665 "CCI_I2C_SDA2",
666 "CCI_I2C_SCL2",
667 "CCI_I2C_SDA3",
668 "CCI_I2C_SCL3",
669 "NC",
670 "DEBUG_GPIO1",
671 "RGBC_IR_INT",
672 "USB_CC_DIR",
673 "NC",
674 "NC", /* GPIO_40 */
675 "NFC_EN",
676 "NFC_ESE_PWR_REQ",
677 "BT_HCI_UART_CTS_N",
678 "BT_HCI_UART_RFR_N",
679 "BT_HCI_UART_TXD",
680 "BT_HCI_UART_RXD",
681 "NFC_IRQ",
682 "NFC_DWL_REQ",
683 "UIM2_DETECT_EN",
684 "WLAN_SW_CTRL", /* G
685 "APPS_I2C_SDA",
686 "APPS_I2C_SCL",
687 "NC",
688 "TS_RESET_N",
689 "NC",
690 "NC",
691 "NC",
692 "NC",
693 "HW_ID_0",
694 "NC", /* GPIO_60 */
695 "QLINK_REQUEST",
696 "QLINK_ENABLE",
697 "WMSS_RESET_N",
698 "SDM_GRFC_8",
699 "WDOG_DISABLE",
700 "NC",
701 "NC",
702 "PA_INDICATOR_OR",
703 "MSS_LTE_COXM_TXD",
704 "MSS_LTE_COXM_RXD",
705 "SDM_RFFE0_DATA",
706 "SDM_RFFE0_CLK",
707 "SDM_RFFE1_DATA",
708 "SDM_RFFE1_CLK",
709 "SDM_RFFE2_DATA",
710 "SDM_RFFE2_CLK",
711 "SDM_RFFE3_DATA",
712 "SDM_RFFE3_CLK",
713 "SUB_CAM_PWR_EN",
714 "FP_RESET_N", /* GPI
715 "NC",
716 "NC",
717 "NC",
718 "NC",
719 "DEBUG_UART_TX",
720 "DEBUG_UART_RX",
721 "DVDT_WRT_DET_AND",
722 "NC",
723 "NC",
724 "NC", /* GPIO_90 */
725 "NC",
726 "NC",
727 "NC",
728 "NC",
729 "UDON_SWITCH_SEL",
730 "SD_CARD_DET_N",
731 "NC",
732 "CAMSENSOR_I2C_SDA",
733 "CAMSENSOR_I2C_SCL",
734 "USB_AUDIO_EN1", /*
735 "DISP_ERR_FG",
736 "NC",
737 "NC",
738 "NC",
739 "UIM2_DATA",
740 "UIM2_CLK",
741 "UIM2_RESET",
742 "UIM2_DET",
743 "UIM1_DATA",
744 "UIM1_CLK", /* GPIO_
745 "UIM1_RESET",
746 "UIM1_PRESENT",
747 "NFC_CLK_REQ",
748 "SW_SERVICE",
749 "NC",
750 "RF_ID_EXTENSION",
751 "ALS_PROX_INT_N",
752 "FP_INT",
753 "DVDT_WRT_DET_OR",
754 "BAROMETER_INT", /*
755 "ACC_COVER_OPEN",
756 "TS_INT_N",
757 "CODEC_INT1_N",
758 "CODEC_INT2_N",
759 "TX_GTR_THRES_IN",
760 "FP_SPI_MISO",
761 "FP_SPI_MOSI",
762 "FP_SPI_SCLK",
763 "FP_SPI_CS_N",
764 "NC", /* GPIO_130 */
765 "DVDT_ENABLE",
766 "ACCEL_INT",
767 "NC",
768 "MAG_INT_N",
769 "NC",
770 "FORCED_USB_BOOT",
771 "NC",
772 "NC",
773 "HW_ID_1",
774 "NC", /* GPIO_140 */
775 "NC",
776 "NC",
777 "CODEC_RST_N",
778 "CDC_SPI_MISO",
779 "CDC_SPI_MOSI",
780 "CDC_SPI_SCLK",
781 "CDC_SPI_CS_N",
782 "NC",
783 "LPASS_SLIMBUS_CLK",
784 "LPASS_SLIMBUS_DATA0
785 "LPASS_SLIMBUS_DATA1
786 "USB_AUDIO_EN2",
787 "BT_FM_SLIMBUS_DATA"
788 "BT_FM_SLIMBUS_CLK",
789 "COMPASS_I2C_SDA",
790 "COMPASS_I2C_SCL",
791 "SSC_SPI_1_MISO",
792 "SSC_SPI_1_MOSI",
793 "SSC_SPI_1_CLK",
794 "SSC_SPI_1_CS_N", /*
795 "SSC_SENSOR_I2C_SDA"
796 "SSC_SENSOR_I2C_SCL"
797 "NC",
798 "NC",
799 "NC",
800 "NC",
801 "SSC_UART_1_TX",
802 "SSC_UART_1_RX",
803 "WL_CMD_CLK_CHAIN0",
804 "WL_CMD_DATA_CHAIN0"
805 "WL_CMD_CLK_CHAIN1",
806 "WL_CMD_DATA_CHAIN1"
807 "WL_BT_COEX_CLK",
808 "WL_BT_COEX_DATA";
809
810 main_cam_pwr_en: main-cam-pwr-en-state
811 pins = "gpio22";
812 function = "gpio";
813 drive-strength = <2>;
814 bias-disable;
815 output-low;
816 };
817
818 chat_cam_pwr_en: chat-cam-pwr-en-state
819 pins = "gpio25";
820 function = "gpio";
821 drive-strength = <2>;
822 bias-disable;
823 output-low;
824 };
825
826 rgbc_ir_pwr_en: rgbc-ir-pwr-en-state {
827 pins = "gpio29";
828 function = "gpio";
829 drive-strength = <2>;
830 bias-disable;
831 output-low;
832 };
833
834 sub_cam_pwr_en: sub-cam-pwr-en-state {
835 pins = "gpio79";
836 function = "gpio";
837 drive-strength = <2>;
838 bias-pull-down;
839 };
840 };
841
842 &uart2 {
843 status = "okay";
844 };
845
846 /* BIG WARNING! DO NOT TOUCH UFS, YOUR DEVICE
847 &ufs_mem_hc { status = "disabled"; };
848 &ufs_mem_phy { status = "disabled"; };
849
850 &usb_1 {
851 status = "okay";
852 };
853
854 &usb_1_dwc3 {
855 dr_mode = "peripheral";
856 };
857
858 &usb_1_hsphy {
859 status = "okay";
860 vdda-pll-supply = <&vreg_l5a_0p875>;
861 vdda33-supply = <&vreg_l2a_3p1>;
862 vdda18-supply = <&vreg_l12a_1p8>;
863 };
864
865 &usb_1_qmpphy {
866 status = "okay";
867 vdda-phy-supply = <&vreg_l3c_1p2>;
868 vdda-pll-supply = <&vreg_l18a_0p8>;
869 };
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