1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2024, Linaro Limited
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regu
10 #include "sm8650.dtsi"
11 #include "pm8010.dtsi"
12 #include "pm8550.dtsi"
13 #include "pm8550b.dtsi"
14 #define PMK8550VE_SID 8
15 #include "pm8550ve.dtsi"
16 #include "pm8550vs.dtsi"
17 #include "pmk8550.dtsi"
18
19 / {
20 model = "Qualcomm Technologies, Inc. S
21 compatible = "qcom,sm8650-hdk", "qcom,
22 chassis-type = "embedded";
23
24 aliases {
25 serial0 = &uart15;
26 serial1 = &uart14;
27 };
28
29 chosen {
30 stdout-path = "serial0:115200n
31 };
32
33 hdmi-out {
34 compatible = "hdmi-connector";
35 type = "a";
36
37 port {
38 hdmi_connector_out: en
39 remote-endpoin
40 };
41 };
42 };
43
44 gpio-keys {
45 compatible = "gpio-keys";
46
47 pinctrl-0 = <&volume_up_n>;
48 pinctrl-names = "default";
49
50 key-volume-up {
51 label = "Volume Up";
52 linux,code = <KEY_VOLU
53 gpios = <&pm8550_gpios
54 debounce-interval = <1
55 linux,can-disable;
56 wakeup-source;
57 };
58 };
59
60 leds {
61 compatible = "gpio-leds";
62
63 led-0 {
64 function = LED_FUNCTIO
65 color = <LED_COLOR_ID_
66 gpios = <&pm8550_gpios
67 linux,default-trigger
68 default-state = "off";
69 };
70
71 led-1 {
72 function = LED_FUNCTIO
73 color = <LED_COLOR_ID_
74 gpios = <&pm8550b_gpio
75 default-state = "off";
76 panic-indicator;
77 };
78
79 led-2 {
80 function = LED_FUNCTIO
81 color = <LED_COLOR_ID_
82 gpios = <&pm8550b_gpio
83 linux,default-trigger
84 default-state = "off";
85 };
86 };
87
88 pmic-glink {
89 compatible = "qcom,sm8650-pmic
90 "qcom,sm8550-pmic
91 "qcom,pmic-glink"
92 #address-cells = <1>;
93 #size-cells = <0>;
94 orientation-gpios = <&tlmm 29
95
96 connector@0 {
97 compatible = "usb-c-co
98 reg = <0>;
99
100 power-role = "dual";
101 data-role = "dual";
102
103 ports {
104 #address-cells
105 #size-cells =
106
107 port@0 {
108 reg =
109
110 pmic_g
111
112 };
113 };
114
115 port@1 {
116 reg =
117
118 pmic_g
119
120 };
121 };
122
123 port@2 {
124 reg =
125
126 pmic_g
127
128 };
129 };
130 };
131 };
132 };
133
134 lt9611_1v2: regulator-lt9611-1v2 {
135 compatible = "regulator-fixed"
136
137 regulator-name = "LT9611_1V2";
138 regulator-min-microvolt = <120
139 regulator-max-microvolt = <120
140
141 vin-supply = <&vph_pwr>;
142 gpio = <&tlmm 79 GPIO_ACTIVE_H
143
144 enable-active-high;
145 };
146
147 lt9611_3v3: regulator-lt9611-3v3 {
148 compatible = "regulator-fixed"
149
150 regulator-name = "LT9611_3V3";
151 regulator-min-microvolt = <330
152 regulator-max-microvolt = <330
153
154 vin-supply = <&vreg_bob_3v3>;
155 gpio = <&tlmm 78 GPIO_ACTIVE_H
156
157 enable-active-high;
158 };
159
160 sound {
161 compatible = "qcom,sm8650-sndc
162 model = "SM8650-HDK";
163 audio-routing = "SpkrLeft IN",
164 "SpkrRight IN"
165 "IN1_HPHL", "H
166 "IN2_HPHR", "H
167 "AMIC1", "MIC
168 "AMIC2", "MIC
169 "AMIC5", "MIC
170 "TX SWR_INPUT0
171 "TX SWR_INPUT1
172 "TX SWR_INPUT3
173
174 wcd-playback-dai-link {
175 link-name = "WCD Playb
176
177 cpu {
178 sound-dai = <&
179 };
180
181 codec {
182 sound-dai = <&
183 };
184
185 platform {
186 sound-dai = <&
187 };
188 };
189
190 wcd-capture-dai-link {
191 link-name = "WCD Captu
192
193 cpu {
194 sound-dai = <&
195 };
196
197 codec {
198 sound-dai = <&
199 };
200
201 platform {
202 sound-dai = <&
203 };
204 };
205
206 wsa-dai-link {
207 link-name = "WSA Playb
208
209 cpu {
210 sound-dai = <&
211 };
212
213 codec {
214 sound-dai = <&
215 };
216
217 platform {
218 sound-dai = <&
219 };
220 };
221 };
222
223 vph_pwr: regulator-vph-pwr {
224 compatible = "regulator-fixed"
225
226 regulator-name = "vph_pwr";
227 regulator-min-microvolt = <370
228 regulator-max-microvolt = <370
229
230 regulator-always-on;
231 regulator-boot-on;
232 };
233
234 vreg_bob_3v3: regulator-vreg-bob-3v3 {
235 compatible = "regulator-fixed"
236
237 regulator-name = "VREG_BOB_3P3
238 regulator-min-microvolt = <330
239 regulator-max-microvolt = <330
240
241 vin-supply = <&vph_pwr>;
242 };
243
244 wcd939x: audio-codec {
245 compatible = "qcom,wcd9395-cod
246
247 pinctrl-0 = <&wcd_default>;
248 pinctrl-names = "default";
249
250 qcom,micbias1-microvolt = <180
251 qcom,micbias2-microvolt = <180
252 qcom,micbias3-microvolt = <180
253 qcom,micbias4-microvolt = <180
254 qcom,mbhc-buttons-vthreshold-m
255 qcom,mbhc-headset-vthreshold-m
256 qcom,mbhc-headphone-vthreshold
257 qcom,rx-device = <&wcd_rx>;
258 qcom,tx-device = <&wcd_tx>;
259
260 reset-gpios = <&tlmm 107 GPIO_
261
262 vdd-buck-supply = <&vreg_l15b_
263 vdd-rxtx-supply = <&vreg_l15b_
264 vdd-io-supply = <&vreg_l15b_1p
265 vdd-mic-bias-supply = <&vreg_b
266
267 #sound-dai-cells = <1>;
268 };
269
270 wcn7850-pmu {
271 compatible = "qcom,wcn7850-pmu
272
273 pinctrl-names = "default";
274 pinctrl-0 = <&wlan_en>, <&bt_d
275
276 wlan-enable-gpios = <&tlmm 16
277 bt-enable-gpios = <&tlmm 17 GP
278
279 vdd-supply = <&vreg_s4i_0p85>;
280 vddio-supply = <&vreg_l15b_1p8
281 vddio1p2-supply = <&vreg_l3c_1
282 vddaon-supply = <&vreg_s2c_0p8
283 vdddig-supply = <&vreg_s3c_0p9
284 vddrfa1p2-supply = <&vreg_s1c_
285 vddrfa1p8-supply = <&vreg_s6c_
286
287 clocks = <&rpmhcc RPMH_RF_CLK1
288
289 regulators {
290 vreg_pmu_rfa_cmn: ldo0
291 regulator-name
292 };
293
294 vreg_pmu_aon_0p59: ldo
295 regulator-name
296 };
297
298 vreg_pmu_wlcx_0p8: ldo
299 regulator-name
300 };
301
302 vreg_pmu_wlmx_0p85: ld
303 regulator-name
304 };
305
306 vreg_pmu_btcmx_0p85: l
307 regulator-name
308 };
309
310 vreg_pmu_rfa_0p8: ldo5
311 regulator-name
312 };
313
314 vreg_pmu_rfa_1p2: ldo6
315 regulator-name
316 };
317
318 vreg_pmu_rfa_1p8: ldo7
319 regulator-name
320 };
321
322 vreg_pmu_pcie_0p9: ldo
323 regulator-name
324 };
325
326 vreg_pmu_pcie_1p8: ldo
327 regulator-name
328 };
329 };
330 };
331 };
332
333 &apps_rsc {
334 regulators-0 {
335 compatible = "qcom,pm8550-rpmh
336
337 vdd-bob1-supply = <&vph_pwr>;
338 vdd-bob2-supply = <&vph_pwr>;
339 vdd-l2-l13-l14-supply = <&vreg
340 vdd-l3-supply = <&vreg_s1c_1p2
341 vdd-l5-l16-supply = <&vreg_bob
342 vdd-l6-l7-supply = <&vreg_bob1
343 vdd-l8-l9-supply = <&vreg_bob1
344 vdd-l11-supply = <&vreg_s1c_1p
345 vdd-l12-supply = <&vreg_s6c_1p
346 vdd-l15-supply = <&vreg_s6c_1p
347 vdd-l17-supply = <&vreg_bob2>;
348
349 qcom,pmic-id = "b";
350
351 vreg_bob1: bob1 {
352 regulator-name = "vreg
353 regulator-min-microvol
354 regulator-max-microvol
355 regulator-initial-mode
356 };
357
358 vreg_bob2: bob2 {
359 regulator-name = "vreg
360 regulator-min-microvol
361 regulator-max-microvol
362 regulator-initial-mode
363 };
364
365 vreg_l2b_3p0: ldo2 {
366 regulator-name = "vreg
367 regulator-min-microvol
368 regulator-max-microvol
369 regulator-initial-mode
370 regulator-allow-set-lo
371 regulator-allowed-mode
372
373 };
374
375 vreg_l5b_3p1: ldo5 {
376 regulator-name = "vreg
377 regulator-min-microvol
378 regulator-max-microvol
379 regulator-initial-mode
380 regulator-allow-set-lo
381 regulator-allowed-mode
382
383 };
384
385 vreg_l6b_1p8: ldo6 {
386 regulator-name = "vreg
387 regulator-min-microvol
388 regulator-max-microvol
389 regulator-initial-mode
390 regulator-allow-set-lo
391 regulator-allowed-mode
392
393 };
394
395 vreg_l7b_1p8: ldo7 {
396 regulator-name = "vreg
397 regulator-min-microvol
398 regulator-max-microvol
399 regulator-initial-mode
400 };
401
402 vreg_l8b_1p8: ldo8 {
403 regulator-name = "vreg
404 regulator-min-microvol
405 regulator-max-microvol
406 regulator-initial-mode
407 regulator-allow-set-lo
408 regulator-allowed-mode
409
410 };
411
412 vreg_l9b_2p9: ldo9 {
413 regulator-name = "vreg
414 regulator-min-microvol
415 regulator-max-microvol
416 regulator-initial-mode
417 regulator-allow-set-lo
418 regulator-allowed-mode
419
420 };
421
422 vreg_l11b_1p2: ldo11 {
423 regulator-name = "vreg
424 regulator-min-microvol
425 regulator-max-microvol
426 regulator-initial-mode
427 regulator-allow-set-lo
428 regulator-allowed-mode
429
430 };
431
432 vreg_l12b_1p8: ldo12 {
433 regulator-name = "vreg
434 regulator-min-microvol
435 regulator-max-microvol
436 regulator-initial-mode
437 regulator-allow-set-lo
438 regulator-allowed-mode
439
440 };
441
442 vreg_l13b_3p0: ldo13 {
443 regulator-name = "vreg
444 regulator-min-microvol
445 regulator-max-microvol
446 regulator-initial-mode
447 regulator-allow-set-lo
448 regulator-allowed-mode
449
450 };
451
452 vreg_l14b_3p2: ldo14 {
453 regulator-name = "vreg
454 regulator-min-microvol
455 regulator-max-microvol
456 regulator-initial-mode
457 regulator-allow-set-lo
458 regulator-allowed-mode
459
460 };
461
462 vreg_l15b_1p8: ldo15 {
463 regulator-name = "vreg
464 regulator-min-microvol
465 regulator-max-microvol
466 regulator-initial-mode
467 regulator-allow-set-lo
468 regulator-allowed-mode
469
470 };
471
472 vreg_l16b_2p8: ldo16 {
473 regulator-name = "vreg
474 regulator-min-microvol
475 regulator-max-microvol
476 regulator-initial-mode
477 regulator-allow-set-lo
478 regulator-allowed-mode
479
480 };
481
482 vreg_l17b_2p5: ldo17 {
483 regulator-name = "vreg
484 regulator-min-microvol
485 regulator-max-microvol
486 regulator-initial-mode
487 regulator-allow-set-lo
488 regulator-allowed-mode
489
490 };
491 };
492
493 regulators-1 {
494 compatible = "qcom,pm8550vs-rp
495
496 vdd-l1-supply = <&vreg_s1c_1p2
497 vdd-l2-supply = <&vreg_s1c_1p2
498 vdd-l3-supply = <&vreg_s1c_1p2
499 vdd-s1-supply = <&vph_pwr>;
500 vdd-s2-supply = <&vph_pwr>;
501 vdd-s3-supply = <&vph_pwr>;
502 vdd-s4-supply = <&vph_pwr>;
503 vdd-s5-supply = <&vph_pwr>;
504 vdd-s6-supply = <&vph_pwr>;
505
506 qcom,pmic-id = "c";
507
508 vreg_s1c_1p2: smps1 {
509 regulator-name = "vreg
510 regulator-min-microvol
511 regulator-max-microvol
512 regulator-initial-mode
513 };
514
515 vreg_s2c_0p8: smps2 {
516 regulator-name = "vreg
517 regulator-min-microvol
518 regulator-max-microvol
519 regulator-initial-mode
520 };
521
522 vreg_s3c_0p9: smps3 {
523 regulator-name = "vreg
524 regulator-min-microvol
525 regulator-max-microvol
526 regulator-initial-mode
527 };
528
529 vreg_s4c_1p2: smps4 {
530 regulator-name = "vreg
531 regulator-min-microvol
532 regulator-max-microvol
533 regulator-initial-mode
534 };
535
536 vreg_s5c_0p7: smps5 {
537 regulator-name = "vreg
538 regulator-min-microvol
539 regulator-max-microvol
540 regulator-initial-mode
541 };
542
543 vreg_s6c_1p8: smps6 {
544 regulator-name = "vreg
545 regulator-min-microvol
546 regulator-max-microvol
547 regulator-initial-mode
548 };
549
550 vreg_l1c_1p2: ldo1 {
551 regulator-name = "vreg
552 regulator-min-microvol
553 regulator-max-microvol
554 regulator-initial-mode
555 regulator-allow-set-lo
556 regulator-allowed-mode
557
558 };
559
560 vreg_l3c_1p2: ldo3 {
561 regulator-name = "vreg
562 regulator-min-microvol
563 regulator-max-microvol
564 regulator-initial-mode
565 regulator-allow-set-lo
566 regulator-allowed-mode
567
568 };
569 };
570
571 regulators-2 {
572 compatible = "qcom,pm8550vs-rp
573
574 vdd-l1-supply = <&vreg_s3c_0p9
575
576 qcom,pmic-id = "d";
577
578 vreg_l1d_0p88: ldo1 {
579 regulator-name = "vreg
580 regulator-min-microvol
581 regulator-max-microvol
582 regulator-initial-mode
583 regulator-allow-set-lo
584 regulator-allowed-mode
585
586 };
587 };
588
589 regulators-3 {
590 compatible = "qcom,pm8550vs-rp
591
592 vdd-l3-supply = <&vreg_s3c_0p9
593
594 qcom,pmic-id = "e";
595
596 vreg_l3e_0p9: ldo3 {
597 regulator-name = "vreg
598 regulator-min-microvol
599 regulator-max-microvol
600 regulator-initial-mode
601 regulator-allow-set-lo
602 regulator-allowed-mode
603
604 };
605 };
606
607 regulators-4 {
608 compatible = "qcom,pm8550vs-rp
609
610 vdd-l1-supply = <&vreg_s3c_0p9
611 vdd-l3-supply = <&vreg_s3c_0p9
612
613 qcom,pmic-id = "g";
614
615 vreg_l1g_0p91: ldo1 {
616 regulator-name = "vreg
617 regulator-min-microvol
618 regulator-max-microvol
619 regulator-initial-mode
620 regulator-allow-set-lo
621 regulator-allowed-mode
622
623 };
624
625 vreg_l3g_0p91: ldo3 {
626 regulator-name = "vreg
627 regulator-min-microvol
628 regulator-max-microvol
629 regulator-initial-mode
630 regulator-allow-set-lo
631 regulator-allowed-mode
632
633 };
634 };
635
636 regulators-5 {
637 compatible = "qcom,pm8550ve-rp
638
639 vdd-l1-supply = <&vreg_s3c_0p9
640 vdd-l2-supply = <&vreg_s3c_0p9
641 vdd-l3-supply = <&vreg_s1c_1p2
642 vdd-s4-supply = <&vph_pwr>;
643
644 qcom,pmic-id = "i";
645
646 vreg_s4i_0p85: smps4 {
647 regulator-name = "vreg
648 regulator-min-microvol
649 regulator-max-microvol
650 regulator-initial-mode
651 };
652
653 vreg_l1i_0p88: ldo1 {
654 regulator-name = "vreg
655 regulator-min-microvol
656 regulator-max-microvol
657 regulator-initial-mode
658 regulator-allow-set-lo
659 regulator-allowed-mode
660
661 };
662
663 vreg_l2i_0p88: ldo2 {
664 regulator-name = "vreg
665 regulator-min-microvol
666 regulator-max-microvol
667 regulator-initial-mode
668 regulator-allow-set-lo
669 regulator-allowed-mode
670
671 };
672
673 vreg_l3i_1p2: ldo3 {
674 regulator-name = "vreg
675 regulator-min-microvol
676 regulator-max-microvol
677 regulator-initial-mode
678 regulator-allow-set-lo
679 regulator-allowed-mode
680
681 };
682 };
683
684 regulators-6 {
685 compatible = "qcom,pm8010-rpmh
686 qcom,pmic-id = "m";
687
688 vdd-l1-l2-supply = <&vreg_s1c_
689 vdd-l3-l4-supply = <&vreg_bob2
690 vdd-l5-supply = <&vreg_s6c_1p8
691 vdd-l6-supply = <&vreg_bob1>;
692 vdd-l7-supply = <&vreg_bob1>;
693
694 vreg_l1m_1p1: ldo1 {
695 regulator-name = "vreg
696 regulator-min-microvol
697 regulator-max-microvol
698 regulator-initial-mode
699 regulator-allow-set-lo
700 regulator-allowed-mode
701
702 };
703
704 vreg_l2m_1p056: ldo2 {
705 regulator-name = "vreg
706 regulator-min-microvol
707 regulator-max-microvol
708 regulator-initial-mode
709 regulator-allow-set-lo
710 regulator-allowed-mode
711
712 };
713
714 vreg_l3m_2p8: ldo3 {
715 regulator-name = "vreg
716 regulator-min-microvol
717 regulator-max-microvol
718 regulator-initial-mode
719 };
720
721 vreg_l4m_2p8: ldo4 {
722 regulator-name = "vreg
723 regulator-min-microvol
724 regulator-max-microvol
725 regulator-initial-mode
726 };
727
728 vreg_l5m_1p8: ldo5 {
729 regulator-name = "vreg
730 regulator-min-microvol
731 regulator-max-microvol
732 regulator-initial-mode
733 };
734
735 vreg_l6m_2p8: ldo6 {
736 regulator-name = "vreg
737 regulator-min-microvol
738 regulator-max-microvol
739 regulator-initial-mode
740 };
741
742 vreg_l7m_2p96: ldo7 {
743 regulator-name = "vreg
744 regulator-min-microvol
745 regulator-max-microvol
746 regulator-initial-mode
747 };
748 };
749
750 regulators-7 {
751 compatible = "qcom,pm8010-rpmh
752 qcom,pmic-id = "n";
753
754 vdd-l1-l2-supply = <&vreg_s1c_
755 vdd-l3-l4-supply = <&vreg_s6c_
756 vdd-l5-supply = <&vreg_bob2>;
757 vdd-l6-supply = <&vreg_bob2>;
758 vdd-l7-supply = <&vreg_bob1>;
759
760 vreg_l1n_1p1: ldo1 {
761 regulator-name = "vreg
762 regulator-min-microvol
763 regulator-max-microvol
764 regulator-initial-mode
765 regulator-allow-set-lo
766 regulator-allowed-mode
767
768 };
769
770 vreg_l2n_1p056: ldo2 {
771 regulator-name = "vreg
772 regulator-min-microvol
773 regulator-max-microvol
774 regulator-initial-mode
775 regulator-allow-set-lo
776 regulator-allowed-mode
777
778 };
779
780 vreg_l3n_1p8: ldo3 {
781 regulator-name = "vreg
782 regulator-min-microvol
783 regulator-max-microvol
784 regulator-initial-mode
785 };
786
787 vreg_l4n_1p8: ldo4 {
788 regulator-name = "vreg
789 regulator-min-microvol
790 regulator-max-microvol
791 regulator-initial-mode
792 };
793
794 vreg_l5n_2p8: ldo5 {
795 regulator-name = "vreg
796 regulator-min-microvol
797 regulator-max-microvol
798 regulator-initial-mode
799 };
800
801 vreg_l6n_2p8: ldo6 {
802 regulator-name = "vreg
803 regulator-min-microvol
804 regulator-max-microvol
805 regulator-initial-mode
806 };
807
808 vreg_l7n_3p3: ldo7 {
809 regulator-name = "vreg
810 regulator-min-microvol
811 regulator-max-microvol
812 regulator-initial-mode
813 };
814 };
815 };
816
817 &dispcc {
818 status = "okay";
819 };
820
821 &gpi_dma1 {
822 status = "okay";
823 };
824
825 &i2c3 {
826 status = "okay";
827
828 wcd_usbss: typec-mux@e {
829 compatible = "qcom,wcd9395-usb
830 reg = <0xe>;
831
832 vdd-supply = <&vreg_l15b_1p8>;
833 reset-gpios = <&tlmm 152 GPIO_
834
835 mode-switch;
836 orientation-switch;
837
838 ports {
839 #address-cells = <1>;
840 #size-cells = <0>;
841
842 port@0 {
843 reg = <0>;
844
845 wcd_usbss_sbu_
846 remote
847 };
848 };
849 };
850 };
851 };
852
853 &i2c6 {
854 clock-frequency = <400000>;
855 status = "okay";
856
857 lt9611_codec: hdmi-bridge@2b {
858 compatible = "lontium,lt9611ux
859 reg = <0x2b>;
860
861 interrupts-extended = <&tlmm 8
862
863 reset-gpios = <&tlmm 28 GPIO_A
864
865 vdd-supply = <<9611_1v2>;
866 vcc-supply = <<9611_3v3>;
867
868 pinctrl-0 = <<9611_irq_pin>,
869 pinctrl-names = "default";
870
871 ports {
872 #address-cells = <1>;
873 #size-cells = <0>;
874
875 port@0 {
876 reg = <0>;
877
878 lt9611_a: endp
879 remote
880 };
881 };
882
883 port@2 {
884 reg = <2>;
885
886 lt9611_out: en
887 remote
888 };
889 };
890 };
891 };
892 };
893
894 &ipa {
895 qcom,gsi-loader = "self";
896 memory-region = <&ipa_fw_mem>;
897 firmware-name = "qcom/sm8650/ipa_fws.m
898 status = "okay";
899 };
900
901 &gpu {
902 status = "okay";
903
904 zap-shader {
905 firmware-name = "qcom/sm8650/g
906 };
907 };
908
909 &lpass_tlmm {
910 spkr_1_sd_n_active: spkr-1-sd-n-active
911 pins = "gpio21";
912 function = "gpio";
913 drive-strength = <16>;
914 bias-disable;
915 output-low;
916 };
917 };
918
919 &mdss {
920 status = "okay";
921 };
922
923 &mdss_dsi0 {
924 vdda-supply = <&vreg_l3i_1p2>;
925
926 status = "okay";
927 };
928
929 &mdss_dsi0_out {
930 remote-endpoint = <<9611_a>;
931 data-lanes = <0 1 2 3>;
932 };
933
934 &mdss_dsi0_phy {
935 vdds-supply = <&vreg_l1i_0p88>;
936
937 status = "okay";
938 };
939
940 &mdss_dp0 {
941 status = "okay";
942 };
943
944 &mdss_dp0_out {
945 data-lanes = <0 1>;
946 };
947
948 &pcie0 {
949 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIG
950 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LO
951
952 pinctrl-0 = <&pcie0_default_state>;
953 pinctrl-names = "default";
954
955 status = "okay";
956 };
957
958 &pcieport0 {
959 wifi@0 {
960 compatible = "pci17cb,1107";
961 reg = <0x10000 0x0 0x0 0x0 0x0
962
963 vddrfacmn-supply = <&vreg_pmu_
964 vddaon-supply = <&vreg_pmu_aon
965 vddwlcx-supply = <&vreg_pmu_wl
966 vddwlmx-supply = <&vreg_pmu_wl
967 vddrfa0p8-supply = <&vreg_pmu_
968 vddrfa1p2-supply = <&vreg_pmu_
969 vddrfa1p8-supply = <&vreg_pmu_
970 vddpcie0p9-supply = <&vreg_pmu
971 vddpcie1p8-supply = <&vreg_pmu
972 };
973 };
974
975 &pcie0_phy {
976 vdda-phy-supply = <&vreg_l1i_0p88>;
977 vdda-pll-supply = <&vreg_l3i_1p2>;
978
979 status = "okay";
980 };
981
982 &pcie1 {
983 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIG
984 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LO
985
986 pinctrl-0 = <&pcie1_default_state>;
987 pinctrl-names = "default";
988
989 status = "okay";
990 };
991
992 &pcie1_phy {
993 vdda-phy-supply = <&vreg_l3e_0p9>;
994 vdda-pll-supply = <&vreg_l3i_1p2>;
995 vdda-qref-supply = <&vreg_l1i_0p88>;
996
997 status = "okay";
998 };
999
1000 &pm8550_gpios {
1001 sdc2_card_det_n: sdc2-card-det-state
1002 pins = "gpio12";
1003 function = "normal";
1004 bias-pull-up;
1005 input-enable;
1006 output-disable;
1007 power-source = <1>; /* 1.8 V
1008 };
1009
1010 volume_up_n: volume-up-n-state {
1011 pins = "gpio6";
1012 function = "normal";
1013 bias-pull-up;
1014 input-enable;
1015 power-source = <1>;
1016 };
1017 };
1018
1019 /* The RGB signals are routed to 3 separate L
1020 &pm8550_pwm {
1021 #address-cells = <1>;
1022 #size-cells = <0>;
1023
1024 status = "okay";
1025
1026 led@1 {
1027 reg = <1>;
1028 function = LED_FUNCTION_STATU
1029 color = <LED_COLOR_ID_RED>;
1030 default-state = "off";
1031 };
1032
1033 led@2 {
1034 reg = <2>;
1035 function = LED_FUNCTION_STATU
1036 color = <LED_COLOR_ID_GREEN>;
1037 default-state = "off";
1038 };
1039
1040 led@3 {
1041 reg = <3>;
1042 function = LED_FUNCTION_STATU
1043 color = <LED_COLOR_ID_BLUE>;
1044 default-state = "off";
1045 };
1046 };
1047
1048 &pm8550b_eusb2_repeater {
1049 vdd18-supply = <&vreg_l15b_1p8>;
1050 vdd3-supply = <&vreg_l5b_3p1>;
1051 };
1052
1053 &pmk8550_rtc {
1054 status = "okay";
1055 };
1056
1057 &pon_pwrkey {
1058 status = "okay";
1059 };
1060
1061 &pon_resin {
1062 linux,code = <KEY_VOLUMEDOWN>;
1063
1064 status = "okay";
1065 };
1066
1067 &qup_i2c3_data_clk {
1068 /* Use internal I2C pull-up */
1069 bias-pull-up = <2200>;
1070 };
1071
1072 &qupv3_id_0 {
1073 iommus = <&apps_smmu 0xa3 0x3>;
1074
1075 status = "okay";
1076 };
1077
1078 &qupv3_id_1 {
1079 status = "okay";
1080 };
1081
1082 &remoteproc_adsp {
1083 firmware-name = "qcom/sm8650/adsp.mbn
1084 "qcom/sm8650/adsp_dtb
1085
1086 status = "okay";
1087 };
1088
1089 &remoteproc_cdsp {
1090 firmware-name = "qcom/sm8650/cdsp.mbn
1091 "qcom/sm8650/cdsp_dtb
1092
1093 status = "okay";
1094 };
1095
1096 &remoteproc_mpss {
1097 firmware-name = "qcom/sm8650/modem.mb
1098 "qcom/sm8650/modem_dt
1099
1100 status = "okay";
1101 };
1102
1103 &sdhc_2 {
1104 cd-gpios = <&pm8550_gpios 12 GPIO_ACT
1105
1106 vmmc-supply = <&vreg_l9b_2p9>;
1107 vqmmc-supply = <&vreg_l8b_1p8>;
1108 bus-width = <4>;
1109 no-sdio;
1110 no-mmc;
1111
1112 pinctrl-0 = <&sdc2_default>, <&sdc2_c
1113 pinctrl-1 = <&sdc2_sleep>, <&sdc2_car
1114 pinctrl-names = "default", "sleep";
1115
1116 status = "okay";
1117 };
1118
1119 &sleep_clk {
1120 clock-frequency = <32000>;
1121 };
1122
1123 &swr0 {
1124 status = "okay";
1125
1126 /* WSA8845, Speaker North */
1127 north_spkr: speaker@0,0 {
1128 compatible = "sdw20217020400"
1129 reg = <0 0>;
1130 pinctrl-0 = <&spkr_1_sd_n_act
1131 pinctrl-names = "default";
1132 powerdown-gpios = <&lpass_tlm
1133 #sound-dai-cells = <0>;
1134 sound-name-prefix = "SpkrLeft
1135 vdd-1p8-supply = <&vreg_l15b_
1136 vdd-io-supply = <&vreg_l3c_1p
1137
1138 /*
1139 * WSA8845 Port 1 (DAC) <
1140 * WSA8845 Port 2 (COMP) <
1141 * WSA8845 Port 3 (BOOST) <
1142 * WSA8845 Port 4 (PBR) <
1143 * WSA8845 Port 5 (VISENSE) <
1144 * WSA8845 Port 6 (CPS) <
1145 */
1146 qcom,port-mapping = <1 2 3 7
1147 };
1148
1149 /* WSA8845, Speaker South */
1150 south_spkr: speaker@0,1 {
1151 compatible = "sdw20217020400"
1152 reg = <0 1>;
1153 pinctrl-0 = <&spkr_2_sd_n_act
1154 pinctrl-names = "default";
1155 powerdown-gpios = <&tlmm 77 G
1156 #sound-dai-cells = <0>;
1157 sound-name-prefix = "SpkrRigh
1158 vdd-1p8-supply = <&vreg_l15b_
1159 vdd-io-supply = <&vreg_l3c_1p
1160
1161 /*
1162 * WSA8845 Port 1 (DAC) <
1163 * WSA8845 Port 2 (COMP) <
1164 * WSA8845 Port 3 (BOOST) <
1165 * WSA8845 Port 4 (PBR) <
1166 * WSA8845 Port 5 (VISENSE) <
1167 * WSA8845 Port 6 (CPS) <
1168 */
1169 qcom,port-mapping = <4 5 6 7
1170 };
1171 };
1172
1173 &swr1 {
1174 status = "okay";
1175
1176 /* WCD9395 RX */
1177 wcd_rx: codec@0,4 {
1178 compatible = "sdw20217010e00"
1179 reg = <0 4>;
1180
1181 /*
1182 * WCD9395 RX Port 1 (HPH_L/R
1183 * WCD9395 RX Port 2 (CLSH)
1184 * WCD9395 RX Port 3 (COMP_L/
1185 * WCD9395 RX Port 4 (LO)
1186 * WCD9395 RX Port 5 (DSD_L/R
1187 * WCD9395 RX Port 6 (HIFI_PC
1188 */
1189 qcom,rx-port-mapping = <1 2 3
1190 };
1191 };
1192
1193 &swr2 {
1194 status = "okay";
1195
1196 /* WCD9395 TX */
1197 wcd_tx: codec@0,3 {
1198 compatible = "sdw20217010e00"
1199 reg = <0 3>;
1200
1201 /*
1202 * WCD9395 TX Port 1 (ADC1,2,
1203 * WCD9395 TX Port 2 (ADC3,4
1204 * WCD9395 TX Port 3 (DMIC0,1
1205 * WCD9395 TX Port 4 (DMIC4,5
1206 */
1207 qcom,tx-port-mapping = <2 2 3
1208 };
1209 };
1210
1211 &tlmm {
1212 /* Reserved I/Os for NFC */
1213 gpio-reserved-ranges = <32 8>, <74 1>
1214
1215 bt_default: bt-default-state {
1216 bt-en-pins {
1217 pins = "gpio17";
1218 function = "gpio";
1219 drive-strength = <16>
1220 bias-disable;
1221 };
1222
1223 sw-ctrl-pins {
1224 pins = "gpio18";
1225 function = "gpio";
1226 bias-pull-down;
1227 };
1228 };
1229
1230 lt9611_irq_pin: lt9611-irq-state {
1231 pins = "gpio85";
1232 function = "gpio";
1233 bias-disable;
1234 };
1235
1236 lt9611_rst_pin: lt9611-rst-state {
1237 pins = "gpio28";
1238 function = "gpio";
1239 output-high;
1240 };
1241
1242 spkr_2_sd_n_active: spkr-2-sd-n-activ
1243 pins = "gpio77";
1244 function = "gpio";
1245 drive-strength = <16>;
1246 bias-disable;
1247 output-low;
1248 };
1249
1250 wcd_default: wcd-reset-n-active-state
1251 pins = "gpio107";
1252 function = "gpio";
1253 drive-strength = <16>;
1254 bias-disable;
1255 output-low;
1256 };
1257
1258 wlan_en: wlan-en-state {
1259 pins = "gpio16";
1260 function = "gpio";
1261 drive-strength = <8>;
1262 bias-pull-down;
1263 };
1264 };
1265
1266 &uart14 {
1267 status = "okay";
1268
1269 bluetooth {
1270 compatible = "qcom,wcn7850-bt
1271
1272 vddrfacmn-supply = <&vreg_pmu
1273 vddaon-supply = <&vreg_pmu_ao
1274 vddwlcx-supply = <&vreg_pmu_w
1275 vddwlmx-supply = <&vreg_pmu_w
1276 vddrfa0p8-supply = <&vreg_pmu
1277 vddrfa1p2-supply = <&vreg_pmu
1278 vddrfa1p8-supply = <&vreg_pmu
1279
1280 max-speed = <3200000>;
1281 };
1282 };
1283
1284 &uart15 {
1285 status = "okay";
1286 };
1287
1288 &ufs_mem_hc {
1289 reset-gpios = <&tlmm 210 GPIO_ACTIVE_
1290
1291 vcc-supply = <&vreg_l17b_2p5>;
1292 vcc-max-microamp = <1300000>;
1293 vccq-supply = <&vreg_l1c_1p2>;
1294 vccq-max-microamp = <1200000>;
1295
1296 status = "okay";
1297 };
1298
1299 &ufs_mem_phy {
1300 vdda-phy-supply = <&vreg_l1d_0p88>;
1301 vdda-pll-supply = <&vreg_l3i_1p2>;
1302
1303 status = "okay";
1304 };
1305
1306 /*
1307 * DPAUX -> WCD9395 -> USB_SBU -> USB-C
1308 * eUSB2 DP/DM -> PM85550HS -> eUSB2 DP/DM ->
1309 * USB SS -> USB-C
1310 */
1311
1312 &usb_1 {
1313 status = "okay";
1314 };
1315
1316 &usb_1_dwc3 {
1317 dr_mode = "otg";
1318 usb-role-switch;
1319 };
1320
1321 &usb_1_dwc3_hs {
1322 remote-endpoint = <&pmic_glink_hs_in>
1323 };
1324
1325 &usb_1_hsphy {
1326 vdd-supply = <&vreg_l1i_0p88>;
1327 vdda12-supply = <&vreg_l3i_1p2>;
1328
1329 phys = <&pm8550b_eusb2_repeater>;
1330
1331 status = "okay";
1332 };
1333
1334 &usb_dp_qmpphy {
1335 vdda-phy-supply = <&vreg_l3i_1p2>;
1336 vdda-pll-supply = <&vreg_l3g_0p91>;
1337
1338 status = "okay";
1339 };
1340
1341 &usb_dp_qmpphy_out {
1342 remote-endpoint = <&pmic_glink_ss_in>
1343 };
1344
1345 &xo_board {
1346 clock-frequency = <76800000>;
1347 };
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