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Linux/arch/arm64/boot/dts/realtek/rtd1293.dtsi

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Diff markup

Differences between /arch/arm64/boot/dts/realtek/rtd1293.dtsi (Version linux-6.12-rc7) and /arch/i386/boot/dts/realtek/rtd1293.dtsi (Version linux-5.18.19)


  1 // SPDX-License-Identifier: (GPL-2.0-or-later     
  2 /*                                                
  3  * Realtek RTD1293 SoC                            
  4  *                                                
  5  * Copyright (c) 2017-2019 Andreas Färber        
  6  */                                               
  7                                                   
  8 #include "rtd129x.dtsi"                           
  9                                                   
 10 / {                                               
 11         compatible = "realtek,rtd1293";           
 12                                                   
 13         cpus {                                    
 14                 #address-cells = <2>;             
 15                 #size-cells = <0>;                
 16                                                   
 17                 cpu0: cpu@0 {                     
 18                         device_type = "cpu";      
 19                         compatible = "arm,cort    
 20                         reg = <0x0 0x0>;          
 21                         next-level-cache = <&l    
 22                 };                                
 23                                                   
 24                 cpu1: cpu@1 {                     
 25                         device_type = "cpu";      
 26                         compatible = "arm,cort    
 27                         reg = <0x0 0x1>;          
 28                         next-level-cache = <&l    
 29                 };                                
 30                                                   
 31                 l2: l2-cache {                    
 32                         compatible = "cache";     
 33                         cache-level = <2>;        
 34                         cache-unified;            
 35                 };                                
 36         };                                        
 37                                                   
 38         timer {                                   
 39                 compatible = "arm,armv8-timer"    
 40                 interrupts = <GIC_PPI 13          
 41                         (GIC_CPU_MASK_SIMPLE(2    
 42                              <GIC_PPI 14          
 43                         (GIC_CPU_MASK_SIMPLE(2    
 44                              <GIC_PPI 11          
 45                         (GIC_CPU_MASK_SIMPLE(2    
 46                              <GIC_PPI 10          
 47                         (GIC_CPU_MASK_SIMPLE(2    
 48         };                                        
 49 };                                                
 50                                                   
 51 &arm_pmu {                                        
 52         interrupt-affinity = <&cpu0>, <&cpu1>;    
 53 };                                                
 54                                                   
 55 &gic {                                            
 56         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_    
 57 };                                                
                                                      

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