1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2022 Theobroma Systems Design
4 */
5
6 /dts-v1/;
7 #include "px30.dtsi"
8 #include <dt-bindings/leds/common.h>
9
10 / {
11 aliases {
12 mmc0 = &emmc;
13 mmc1 = &sdio;
14 rtc0 = &rtc_twi;
15 rtc1 = &rk809;
16 };
17
18 emmc_pwrseq: emmc-pwrseq {
19 compatible = "mmc-pwrseq-emmc"
20 pinctrl-0 = <&emmc_reset>;
21 pinctrl-names = "default";
22 reset-gpios = <&gpio1 RK_PB3 G
23 };
24
25 leds {
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&module_led_pin>;
29 status = "okay";
30
31 module_led: led-0 {
32 gpios = <&gpio1 RK_PB0
33 function = LED_FUNCTIO
34 linux,default-trigger
35 color = <LED_COLOR_ID_
36 };
37 };
38
39 vcc5v0_sys: vccsys-regulator {
40 compatible = "regulator-fixed"
41 regulator-name = "vcc5v0_sys";
42 regulator-always-on;
43 regulator-boot-on;
44 regulator-min-microvolt = <500
45 regulator-max-microvolt = <500
46 };
47 };
48
49 &cpu0 {
50 cpu-supply = <&vdd_arm>;
51 };
52
53 &cpu1 {
54 cpu-supply = <&vdd_arm>;
55 };
56
57 &cpu2 {
58 cpu-supply = <&vdd_arm>;
59 };
60
61 &cpu3 {
62 cpu-supply = <&vdd_arm>;
63 };
64
65 &emmc {
66 bus-width = <8>;
67 cap-mmc-highspeed;
68 mmc-hs200-1_8v;
69 mmc-pwrseq = <&emmc_pwrseq>;
70 non-removable;
71 vmmc-supply = <&vcc_3v3>;
72 vqmmc-supply = <&vcc_emmc>;
73
74 status = "okay";
75 };
76
77 /* On-module TI DP83825I PHY but no connector,
78 &gmac {
79 snps,reset-gpio = <&gpio3 RK_PB0 GPIO_
80 snps,reset-active-low;
81 snps,reset-delays-us = <0 50000 50000>
82 phy-supply = <&vcc_3v3>;
83 clock_in_out = "output";
84 };
85
86 &gpio2 {
87 /*
88 * The Qseven BIOS_DISABLE signal on t
89 * eMMC powered-down initially (in fac
90 * asserted). BIOS_DISABLE_OVERRIDE pi
91 * the SPL has been booted from SD Car
92 */
93 bios-disable-override-hog {
94 gpios = <RK_PB5 GPIO_ACTIVE_LO
95 output-high;
96 line-name = "bios_disable_over
97 gpio-hog;
98 };
99
100 /*
101 * The BIOS_DISABLE hog is a feedback
102 * signal, ignoring the BIOS_DISABLE_O
103 * represents the state of a switch on
104 */
105 bios-disable-n-hog {
106 gpios = <RK_PC2 GPIO_ACTIVE_LO
107 line-name = "bios_disable";
108 input;
109 gpio-hog;
110 };
111 };
112
113 &gpu {
114 status = "okay";
115 };
116
117 &i2c0 {
118 status = "okay";
119
120 rk809: pmic@20 {
121 compatible = "rockchip,rk809";
122 reg = <0x20>;
123 interrupt-parent = <&gpio0>;
124 interrupts = <7 IRQ_TYPE_LEVEL
125 pinctrl-0 = <&pmic_int>;
126 pinctrl-names = "default";
127 #clock-cells = <0>;
128 clock-output-names = "xin32k";
129 rockchip,system-power-controll
130 wakeup-source;
131
132 vcc1-supply = <&vcc5v0_sys>;
133 vcc2-supply = <&vcc5v0_sys>;
134 vcc3-supply = <&vcc5v0_sys>;
135 vcc4-supply = <&vcc5v0_sys>;
136 vcc5-supply = <&vcc_3v3>;
137 vcc6-supply = <&vcc_3v3>;
138 vcc7-supply = <&vcc_3v3>;
139 vcc9-supply = <&vcc5v0_sys>;
140
141 regulators {
142 vdd_log: DCDC_REG1 {
143 regulator-name
144 regulator-min-
145 regulator-max-
146 regulator-ramp
147 regulator-alwa
148 regulator-boot
149
150 regulator-stat
151 regula
152 regula
153 };
154 };
155
156 vdd_arm: DCDC_REG2 {
157 regulator-name
158 regulator-min-
159 regulator-max-
160 regulator-ramp
161 regulator-alwa
162 regulator-boot
163
164 regulator-stat
165 regula
166 regula
167 };
168 };
169
170 vcc_ddr: DCDC_REG3 {
171 regulator-name
172 regulator-alwa
173 regulator-boot
174
175 regulator-stat
176 regula
177 };
178 };
179
180 vcc_3v0_1v8: vcc_emmc:
181 regulator-name
182 regulator-min-
183 regulator-max-
184 regulator-alwa
185 regulator-boot
186
187 regulator-stat
188 regula
189 regula
190 };
191 };
192
193 vcc_3v3: DCDC_REG5 {
194 regulator-name
195 regulator-min-
196 regulator-max-
197 regulator-alwa
198 regulator-boot
199
200 regulator-stat
201 regula
202 regula
203 };
204 };
205
206 vcc_1v8: LDO_REG2 {
207 regulator-name
208 regulator-min-
209 regulator-max-
210 regulator-alwa
211 regulator-boot
212
213 regulator-stat
214 regula
215 regula
216 };
217 };
218
219 vcc_1v0: LDO_REG3 {
220 regulator-name
221 regulator-min-
222 regulator-max-
223 regulator-alwa
224 regulator-boot
225
226 regulator-stat
227 regula
228 regula
229 };
230 };
231
232 vccio_sd: LDO_REG5 {
233 regulator-name
234 regulator-min-
235 regulator-max-
236 regulator-alwa
237 regulator-boot
238
239 regulator-stat
240 regula
241 regula
242 };
243 };
244
245 vcc_lcd: LDO_REG7 {
246 regulator-alwa
247 regulator-boot
248 regulator-min-
249 regulator-max-
250 regulator-name
251
252 regulator-stat
253 regula
254 regula
255 };
256 };
257
258 vcc_1v8_lcd: LDO_REG8
259 regulator-name
260 regulator-min-
261 regulator-max-
262 regulator-alwa
263 regulator-boot
264
265 regulator-stat
266 regula
267 regula
268 };
269 };
270
271 vcca_1v8: LDO_REG9 {
272 regulator-name
273 regulator-min-
274 regulator-max-
275 regulator-alwa
276 regulator-boot
277
278 regulator-stat
279 regula
280 regula
281 };
282 };
283 };
284 };
285 };
286
287 &i2c1 {
288 status = "okay";
289
290 /* SE05x is limited to Fast Mode */
291 clock-frequency = <400000>;
292
293 fan: fan@18 {
294 compatible = "ti,amc6821";
295 reg = <0x18>;
296 #cooling-cells = <2>;
297 };
298
299 rtc_twi: rtc@6f {
300 compatible = "isil,isl1208";
301 reg = <0x6f>;
302 };
303 };
304
305 &i2c3 {
306 status = "okay";
307 };
308
309 &i2s0_8ch {
310 rockchip,trcm-sync-tx-only;
311
312 pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8c
313 &i2s0_8ch_sdo0 &i2s0_8ch_
314 };
315
316 &io_domains {
317 vccio1-supply = <&vcc_3v3>;
318 vccio2-supply = <&vccio_sd>;
319 vccio3-supply = <&vcc_3v3>;
320 vccio4-supply = <&vcc_3v3>;
321 vccio5-supply = <&vcc_3v3>;
322 vccio6-supply = <&vcc_emmc>;
323 vccio-oscgpi-supply = <&vcc_3v3>;
324
325 status = "okay";
326 };
327
328 &pinctrl {
329 emmc {
330 emmc_reset: emmc-reset {
331 rockchip,pins = <1 RK_
332 };
333 };
334
335 leds {
336 module_led_pin: module-led-pin
337 rockchip,pins = <1 RK_
338 };
339 };
340
341 pmic {
342 pmic_int: pmic-int {
343 rockchip,pins =
344 <0 RK_PA7 RK_F
345 };
346 };
347 };
348
349 &pmu_io_domains {
350 pmuio1-supply = <&vcc_3v3>;
351 pmuio2-supply = <&vcc_3v3>;
352 status = "okay";
353 };
354
355 &saradc {
356 vref-supply = <&vcc_1v8>;
357 status = "okay";
358 };
359
360 &sdmmc {
361 vqmmc-supply = <&vccio_sd>;
362 };
363
364 &tsadc {
365 status = "okay";
366 };
367
368 &u2phy {
369 status = "okay";
370 };
371
372 &u2phy_host {
373 status = "okay";
374 };
375
376 /* Mule UCAN */
377 &usb_host0_ehci {
378 status = "okay";
379 };
380
381 &usb_host0_ohci {
382 status = "okay";
383 };
384
385 &wdt {
386 status = "okay";
387 };
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