1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2019 Andy Yan <andy.yan@gmail.
4 */
5
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.
8 #include <dt-bindings/interrupt-controller/irq
9 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-opp.dtsi"
12
13 / {
14 model = "Leez RK3399 P710";
15 compatible = "leez,p710", "rockchip,rk
16
17 aliases {
18 ethernet0 = &gmac;
19 mmc0 = &sdio0;
20 mmc1 = &sdmmc;
21 mmc2 = &sdhci;
22 };
23
24 chosen {
25 stdout-path = "serial2:1500000
26 };
27
28 clkin_gmac: external-gmac-clock {
29 compatible = "fixed-clock";
30 clock-frequency = <125000000>;
31 clock-output-names = "clkin_gm
32 #clock-cells = <0>;
33 };
34
35 sdio_pwrseq: sdio-pwrseq {
36 compatible = "mmc-pwrseq-simpl
37 clocks = <&rk808 1>;
38 clock-names = "ext_clock";
39 pinctrl-names = "default";
40 pinctrl-0 = <&wifi_reg_on_h>;
41 reset-gpios = <&gpio0 RK_PB2 G
42 };
43
44 dc5v_adp: dc5v-adp {
45 compatible = "regulator-fixed"
46 regulator-name = "dc5v_adapter
47 regulator-always-on;
48 regulator-boot-on;
49 regulator-min-microvolt = <500
50 regulator-max-microvolt = <500
51 };
52
53 vcc3v3_lan: vcc3v3-lan {
54 compatible = "regulator-fixed"
55 regulator-name = "vcc3v3_lan";
56 regulator-always-on;
57 regulator-boot-on;
58 regulator-min-microvolt = <330
59 regulator-max-microvolt = <330
60 vin-supply = <&vcc3v3_sys>;
61 };
62
63 vcc3v3_sys: vcc3v3-sys {
64 compatible = "regulator-fixed"
65 regulator-name = "vcc3v3_sys";
66 regulator-always-on;
67 regulator-boot-on;
68 regulator-min-microvolt = <330
69 regulator-max-microvolt = <330
70 vin-supply = <&vcc5v0_sys>;
71 };
72
73 vcc5v0_host0: vcc5v0_host1: vcc5v0-hos
74 compatible = "regulator-fixed"
75 regulator-name = "vcc5v0_host"
76 regulator-boot-on;
77 regulator-always-on;
78 regulator-min-microvolt = <550
79 regulator-max-microvolt = <550
80 vin-supply = <&vcc5v0_sys>;
81 };
82
83 vcc5v0_host3: vcc5v0-host3 {
84 compatible = "regulator-fixed"
85 regulator-name = "vcc5v0_host3
86 enable-active-high;
87 gpio = <&gpio2 RK_PA2 GPIO_ACT
88 pinctrl-names = "default";
89 pinctrl-0 = <&vcc5v0_host3_en>
90 regulator-always-on;
91 vin-supply = <&vcc5v0_sys>;
92 };
93
94 vcc5v0_sys: vcc5v0-sys {
95 compatible = "regulator-fixed"
96 regulator-name = "vcc5v0_sys";
97 regulator-always-on;
98 regulator-boot-on;
99 regulator-min-microvolt = <500
100 regulator-max-microvolt = <500
101 vin-supply = <&dc5v_adp>;
102 };
103
104 vdd_log: vdd-log {
105 compatible = "pwm-regulator";
106 pwms = <&pwm2 0 25000 1>;
107 pwm-supply = <&vcc5v0_sys>;
108 regulator-name = "vdd_log";
109 regulator-always-on;
110 regulator-boot-on;
111 regulator-min-microvolt = <800
112 regulator-max-microvolt = <140
113 };
114 };
115
116 &cpu_l0 {
117 cpu-supply = <&vdd_cpu_l>;
118 };
119
120 &cpu_l1 {
121 cpu-supply = <&vdd_cpu_l>;
122 };
123
124 &cpu_l2 {
125 cpu-supply = <&vdd_cpu_l>;
126 };
127
128 &cpu_l3 {
129 cpu-supply = <&vdd_cpu_l>;
130 };
131
132 &cpu_b0 {
133 cpu-supply = <&vdd_cpu_b>;
134 };
135
136 &cpu_b1 {
137 cpu-supply = <&vdd_cpu_b>;
138 };
139
140 &emmc_phy {
141 status = "okay";
142 };
143
144 &gmac {
145 assigned-clocks = <&cru SCLK_RMII_SRC>
146 assigned-clock-parents = <&clkin_gmac>
147 clock_in_out = "input";
148 phy-supply = <&vcc3v3_lan>;
149 phy-mode = "rgmii";
150 pinctrl-names = "default";
151 pinctrl-0 = <&rgmii_pins>;
152 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_
153 snps,reset-active-low;
154 snps,reset-delays-us = <0 10000 50000>
155 tx_delay = <0x28>;
156 rx_delay = <0x11>;
157 status = "okay";
158 };
159
160 &gpu {
161 mali-supply = <&vdd_gpu>;
162 status = "okay";
163 };
164
165 &hdmi {
166 ddc-i2c-bus = <&i2c7>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&hdmi_cec>;
169 status = "okay";
170 };
171
172 &hdmi_sound {
173 status = "okay";
174 };
175
176 &i2c0 {
177 clock-frequency = <400000>;
178 i2c-scl-rising-time-ns = <168>;
179 i2c-scl-falling-time-ns = <4>;
180 status = "okay";
181
182 rk808: pmic@1b {
183 compatible = "rockchip,rk808";
184 reg = <0x1b>;
185 interrupt-parent = <&gpio1>;
186 interrupts = <21 IRQ_TYPE_LEVE
187 #clock-cells = <1>;
188 clock-output-names = "xin32k",
189 pinctrl-names = "default";
190 pinctrl-0 = <&pmic_int_l>;
191 rockchip,system-power-controll
192 wakeup-source;
193
194 vcc1-supply = <&vcc5v0_sys>;
195 vcc2-supply = <&vcc5v0_sys>;
196 vcc3-supply = <&vcc5v0_sys>;
197 vcc4-supply = <&vcc5v0_sys>;
198 vcc6-supply = <&vcc5v0_sys>;
199 vcc7-supply = <&vcc5v0_sys>;
200 vcc8-supply = <&vcc3v3_sys>;
201 vcc9-supply = <&vcc5v0_sys>;
202 vcc10-supply = <&vcc5v0_sys>;
203 vcc11-supply = <&vcc5v0_sys>;
204 vcc12-supply = <&vcc3v3_sys>;
205 vddio-supply = <&vcc_1v8>;
206
207 regulators {
208 vdd_center: DCDC_REG1
209 regulator-name
210 regulator-alwa
211 regulator-boot
212 regulator-min-
213 regulator-max-
214 regulator-ramp
215 regulator-stat
216 regula
217 };
218 };
219
220 vdd_cpu_l: DCDC_REG2 {
221 regulator-name
222 regulator-alwa
223 regulator-boot
224 regulator-min-
225 regulator-max-
226 regulator-ramp
227 regulator-stat
228 regula
229 };
230 };
231
232 vcc_ddr: DCDC_REG3 {
233 regulator-name
234 regulator-alwa
235 regulator-boot
236 regulator-stat
237 regula
238 };
239 };
240
241 vcc_1v8: DCDC_REG4 {
242 regulator-name
243 regulator-alwa
244 regulator-boot
245 regulator-min-
246 regulator-max-
247 regulator-stat
248 regula
249 regula
250 };
251 };
252
253 vcc1v8_dvp: LDO_REG1 {
254 regulator-name
255 regulator-alwa
256 regulator-boot
257 regulator-min-
258 regulator-max-
259 regulator-stat
260 regula
261 };
262 };
263
264 vcc1v8_hdmi: LDO_REG2
265 regulator-name
266 regulator-alwa
267 regulator-boot
268 regulator-min-
269 regulator-max-
270 regulator-stat
271 regula
272 };
273 };
274
275 vcca_1v8: LDO_REG3 {
276 regulator-name
277 regulator-alwa
278 regulator-boot
279 regulator-min-
280 regulator-max-
281 regulator-stat
282 regula
283 regula
284 };
285 };
286
287 vccio_sd: LDO_REG4 {
288 regulator-name
289 regulator-alwa
290 regulator-boot
291 regulator-min-
292 regulator-max-
293 regulator-stat
294 regula
295 regula
296 };
297 };
298
299 vcca3v0_codec: LDO_REG
300 regulator-name
301 regulator-alwa
302 regulator-boot
303 regulator-min-
304 regulator-max-
305 regulator-stat
306 regula
307 };
308 };
309
310 vcc_1v5: LDO_REG6 {
311 regulator-name
312 regulator-alwa
313 regulator-boot
314 regulator-min-
315 regulator-max-
316 regulator-stat
317 regula
318 regula
319 };
320 };
321
322 vcc0v9_hdmi: LDO_REG7
323 regulator-name
324 regulator-alwa
325 regulator-boot
326 regulator-min-
327 regulator-max-
328 regulator-stat
329 regula
330 };
331 };
332
333 vcc_3v0: LDO_REG8 {
334 regulator-name
335 regulator-alwa
336 regulator-boot
337 regulator-min-
338 regulator-max-
339 regulator-stat
340 regula
341 regula
342 };
343 };
344 };
345 };
346
347 vdd_cpu_b: regulator@40 {
348 compatible = "silergy,syr827";
349 reg = <0x40>;
350 fcs,suspend-voltage-selector =
351 pinctrl-names = "default";
352 pinctrl-0 = <&vsel1_pin>;
353 regulator-name = "vdd_cpu_b";
354 regulator-min-microvolt = <712
355 regulator-max-microvolt = <150
356 regulator-ramp-delay = <1000>;
357 regulator-always-on;
358 regulator-boot-on;
359 vin-supply = <&vcc5v0_sys>;
360
361 regulator-state-mem {
362 regulator-off-in-suspe
363 };
364 };
365
366 vdd_gpu: regulator@41 {
367 compatible = "silergy,syr828";
368 reg = <0x41>;
369 fcs,suspend-voltage-selector =
370 pinctrl-names = "default";
371 pinctrl-0 = <&vsel2_pin>;
372 regulator-name = "vdd_gpu";
373 regulator-min-microvolt = <712
374 regulator-max-microvolt = <150
375 regulator-ramp-delay = <1000>;
376 regulator-always-on;
377 regulator-boot-on;
378 vin-supply = <&vcc5v0_sys>;
379
380 regulator-state-mem {
381 regulator-off-in-suspe
382 };
383 };
384 };
385
386 &i2c1 {
387 i2c-scl-rising-time-ns = <300>;
388 i2c-scl-falling-time-ns = <15>;
389 status = "okay";
390 };
391
392 &i2c3 {
393 i2c-scl-rising-time-ns = <450>;
394 i2c-scl-falling-time-ns = <15>;
395 status = "okay";
396 };
397
398 &i2c4 {
399 i2c-scl-rising-time-ns = <600>;
400 i2c-scl-falling-time-ns = <20>;
401 status = "okay";
402 };
403
404 &i2c7 {
405 status = "okay";
406 };
407
408 &i2s0 {
409 rockchip,playback-channels = <8>;
410 rockchip,capture-channels = <8>;
411 status = "okay";
412 };
413
414 &i2s1 {
415 rockchip,playback-channels = <2>;
416 rockchip,capture-channels = <2>;
417 status = "okay";
418 };
419
420 &i2s2 {
421 status = "okay";
422 };
423
424 &io_domains {
425 status = "okay";
426
427 bt656-supply = <&vcc1v8_dvp>;
428 audio-supply = <&vcc_1v8>;
429 sdmmc-supply = <&vccio_sd>;
430 gpio1830-supply = <&vcc_3v0>;
431 };
432
433 &pmu_io_domains {
434 status = "okay";
435 pmu1830-supply = <&vcc_3v0>;
436 };
437
438 &pinctrl {
439 bt {
440 bt_reg_on_h: bt-reg-on-h {
441 rockchip,pins = <0 RK_
442 };
443
444 bt_host_wake_l: bt-host-wake-l
445 rockchip,pins = <0 RK_
446 };
447
448 bt_wake_l: bt-wake-l {
449 rockchip,pins = <2 RK_
450 };
451 };
452
453 pmic {
454 pmic_int_l: pmic-int-l {
455 rockchip,pins = <1 RK_
456 };
457
458 vsel1_pin: vsel1-pin {
459 rockchip,pins = <1 RK_
460 };
461
462 vsel2_pin: vsel2-pin {
463 rockchip,pins = <1 RK_
464 };
465 };
466
467 usb2 {
468 vcc5v0_host3_en: vcc5v0-host3-
469 rockchip,pins = <2 RK_
470 };
471 };
472
473 wifi {
474 wifi_reg_on_h: wifi-reg-on-h {
475 rockchip,pins =
476 <0 RK_PB2 RK_F
477 };
478
479 wifi_host_wake_l: wifi-host-wa
480 rockchip,pins = <0 RK_
481 };
482 };
483 };
484
485 &pwm2 {
486 status = "okay";
487 };
488
489 &saradc {
490 status = "okay";
491
492 vref-supply = <&vcc_1v8>;
493 };
494
495 &sdio0 {
496 #address-cells = <1>;
497 #size-cells = <0>;
498 bus-width = <4>;
499 clock-frequency = <50000000>;
500 cap-sdio-irq;
501 cap-sd-highspeed;
502 keep-power-in-suspend;
503 mmc-pwrseq = <&sdio_pwrseq>;
504 non-removable;
505 pinctrl-names = "default";
506 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s
507 sd-uhs-sdr104;
508 status = "okay";
509
510 brcmf: wifi@1 {
511 compatible = "brcm,bcm4329-fma
512 reg = <1>;
513 interrupt-parent = <&gpio0>;
514 interrupts = <RK_PA3 IRQ_TYPE_
515 interrupt-names = "host-wake";
516 pinctrl-names = "default";
517 pinctrl-0 = <&wifi_host_wake_l
518 };
519 };
520
521 &sdhci {
522 bus-width = <8>;
523 mmc-hs400-1_8v;
524 mmc-hs400-enhanced-strobe;
525 non-removable;
526 status = "okay";
527 };
528
529 &sdmmc {
530 bus-width = <4>;
531 cap-mmc-highspeed;
532 cap-sd-highspeed;
533 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_
534 disable-wp;
535 max-frequency = <150000000>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdm
538 status = "okay";
539 };
540
541 &tcphy0 {
542 status = "okay";
543 };
544
545 &tcphy1 {
546 status = "okay";
547 };
548
549 &tsadc {
550 status = "okay";
551
552 /* tshut mode 0:CRU 1:GPIO */
553 rockchip,hw-tshut-mode = <1>;
554 /* tshut polarity 0:LOW 1:HIGH */
555 rockchip,hw-tshut-polarity = <1>;
556 };
557
558 &u2phy0 {
559 status = "okay";
560
561 u2phy0_otg: otg-port {
562 status = "okay";
563 };
564
565 u2phy0_host: host-port {
566 phy-supply = <&vcc5v0_host0>;
567 status = "okay";
568 };
569 };
570
571 &u2phy1 {
572 status = "okay";
573
574 u2phy1_otg: otg-port {
575 status = "okay";
576 };
577
578 u2phy1_host: host-port {
579 phy-supply = <&vcc5v0_host1>;
580 status = "okay";
581 };
582 };
583
584 &uart0 {
585 pinctrl-names = "default";
586 pinctrl-0 = <&uart0_xfer &uart0_cts &u
587 status = "okay";
588
589 bluetooth {
590 compatible = "brcm,bcm43438-bt
591 clocks = <&rk808 1>;
592 clock-names = "ext_clock";
593 device-wakeup-gpios = <&gpio2
594 host-wakeup-gpios = <&gpio0 RK
595 shutdown-gpios = <&gpio0 RK_PB
596 pinctrl-names = "default";
597 pinctrl-0 = <&bt_host_wake_l &
598 };
599 };
600
601 &uart2 {
602 status = "okay";
603 };
604
605 &usb_host0_ehci {
606 status = "okay";
607 };
608
609 &usb_host0_ohci {
610 status = "okay";
611 };
612
613 &usb_host1_ehci {
614 status = "okay";
615 };
616
617 &usb_host1_ohci {
618 status = "okay";
619 };
620
621 &usbdrd3_0 {
622 status = "okay";
623 };
624
625 &usbdrd_dwc3_0 {
626 status = "okay";
627 dr_mode = "otg";
628 };
629
630 &usbdrd3_1 {
631 status = "okay";
632 };
633
634 &usbdrd_dwc3_1 {
635 status = "okay";
636 dr_mode = "host";
637 };
638
639 &vopb {
640 status = "okay";
641 };
642
643 &vopb_mmu {
644 status = "okay";
645 };
646
647 &vopl {
648 status = "okay";
649 };
650
651 &vopl_mmu {
652 status = "okay";
653 };
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