1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2019 Andy Yan <andy.yan@gmail.
4 */
5
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.
8 #include <dt-bindings/interrupt-controller/irq
9 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399.dtsi"
11
12 / {
13 model = "Leez RK3399 P710";
14 compatible = "leez,p710", "rockchip,rk
15
16 aliases {
17 ethernet0 = &gmac;
18 mmc0 = &sdio0;
19 mmc1 = &sdmmc;
20 mmc2 = &sdhci;
21 };
22
23 chosen {
24 stdout-path = "serial2:1500000
25 };
26
27 clkin_gmac: external-gmac-clock {
28 compatible = "fixed-clock";
29 clock-frequency = <125000000>;
30 clock-output-names = "clkin_gm
31 #clock-cells = <0>;
32 };
33
34 sdio_pwrseq: sdio-pwrseq {
35 compatible = "mmc-pwrseq-simpl
36 clocks = <&rk808 1>;
37 clock-names = "ext_clock";
38 pinctrl-names = "default";
39 pinctrl-0 = <&wifi_reg_on_h>;
40 reset-gpios = <&gpio0 RK_PB2 G
41 };
42
43 dc5v_adp: dc5v-adp {
44 compatible = "regulator-fixed"
45 regulator-name = "dc5v_adapter
46 regulator-always-on;
47 regulator-boot-on;
48 regulator-min-microvolt = <500
49 regulator-max-microvolt = <500
50 };
51
52 vcc3v3_lan: vcc3v3-lan {
53 compatible = "regulator-fixed"
54 regulator-name = "vcc3v3_lan";
55 regulator-always-on;
56 regulator-boot-on;
57 regulator-min-microvolt = <330
58 regulator-max-microvolt = <330
59 vin-supply = <&vcc3v3_sys>;
60 };
61
62 vcc3v3_sys: vcc3v3-sys {
63 compatible = "regulator-fixed"
64 regulator-name = "vcc3v3_sys";
65 regulator-always-on;
66 regulator-boot-on;
67 regulator-min-microvolt = <330
68 regulator-max-microvolt = <330
69 vin-supply = <&vcc5v0_sys>;
70 };
71
72 vcc5v0_host0: vcc5v0_host1: vcc5v0-hos
73 compatible = "regulator-fixed"
74 regulator-name = "vcc5v0_host"
75 regulator-boot-on;
76 regulator-always-on;
77 regulator-min-microvolt = <550
78 regulator-max-microvolt = <550
79 vin-supply = <&vcc5v0_sys>;
80 };
81
82 vcc5v0_host3: vcc5v0-host3 {
83 compatible = "regulator-fixed"
84 regulator-name = "vcc5v0_host3
85 enable-active-high;
86 gpio = <&gpio2 RK_PA2 GPIO_ACT
87 pinctrl-names = "default";
88 pinctrl-0 = <&vcc5v0_host3_en>
89 regulator-always-on;
90 vin-supply = <&vcc5v0_sys>;
91 };
92
93 vcc5v0_sys: vcc5v0-sys {
94 compatible = "regulator-fixed"
95 regulator-name = "vcc5v0_sys";
96 regulator-always-on;
97 regulator-boot-on;
98 regulator-min-microvolt = <500
99 regulator-max-microvolt = <500
100 vin-supply = <&dc5v_adp>;
101 };
102
103 vdd_log: vdd-log {
104 compatible = "pwm-regulator";
105 pwms = <&pwm2 0 25000 1>;
106 pwm-supply = <&vcc5v0_sys>;
107 regulator-name = "vdd_log";
108 regulator-always-on;
109 regulator-boot-on;
110 regulator-min-microvolt = <800
111 regulator-max-microvolt = <140
112 };
113 };
114
115 &cpu_l0 {
116 cpu-supply = <&vdd_cpu_l>;
117 };
118
119 &cpu_l1 {
120 cpu-supply = <&vdd_cpu_l>;
121 };
122
123 &cpu_l2 {
124 cpu-supply = <&vdd_cpu_l>;
125 };
126
127 &cpu_l3 {
128 cpu-supply = <&vdd_cpu_l>;
129 };
130
131 &cpu_b0 {
132 cpu-supply = <&vdd_cpu_b>;
133 };
134
135 &cpu_b1 {
136 cpu-supply = <&vdd_cpu_b>;
137 };
138
139 &emmc_phy {
140 status = "okay";
141 };
142
143 &gmac {
144 assigned-clocks = <&cru SCLK_RMII_SRC>
145 assigned-clock-parents = <&clkin_gmac>
146 clock_in_out = "input";
147 phy-supply = <&vcc3v3_lan>;
148 phy-mode = "rgmii";
149 pinctrl-names = "default";
150 pinctrl-0 = <&rgmii_pins>;
151 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_
152 snps,reset-active-low;
153 snps,reset-delays-us = <0 10000 50000>
154 tx_delay = <0x28>;
155 rx_delay = <0x11>;
156 status = "okay";
157 };
158
159 &gpu {
160 mali-supply = <&vdd_gpu>;
161 status = "okay";
162 };
163
164 &hdmi {
165 ddc-i2c-bus = <&i2c7>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&hdmi_cec>;
168 status = "okay";
169 };
170
171 &hdmi_sound {
172 status = "okay";
173 };
174
175 &i2c0 {
176 clock-frequency = <400000>;
177 i2c-scl-rising-time-ns = <168>;
178 i2c-scl-falling-time-ns = <4>;
179 status = "okay";
180
181 rk808: pmic@1b {
182 compatible = "rockchip,rk808";
183 reg = <0x1b>;
184 interrupt-parent = <&gpio1>;
185 interrupts = <21 IRQ_TYPE_LEVE
186 #clock-cells = <1>;
187 clock-output-names = "xin32k",
188 pinctrl-names = "default";
189 pinctrl-0 = <&pmic_int_l>;
190 rockchip,system-power-controll
191 wakeup-source;
192
193 vcc1-supply = <&vcc5v0_sys>;
194 vcc2-supply = <&vcc5v0_sys>;
195 vcc3-supply = <&vcc5v0_sys>;
196 vcc4-supply = <&vcc5v0_sys>;
197 vcc6-supply = <&vcc5v0_sys>;
198 vcc7-supply = <&vcc5v0_sys>;
199 vcc8-supply = <&vcc3v3_sys>;
200 vcc9-supply = <&vcc5v0_sys>;
201 vcc10-supply = <&vcc5v0_sys>;
202 vcc11-supply = <&vcc5v0_sys>;
203 vcc12-supply = <&vcc3v3_sys>;
204 vddio-supply = <&vcc_1v8>;
205
206 regulators {
207 vdd_center: DCDC_REG1
208 regulator-name
209 regulator-alwa
210 regulator-boot
211 regulator-min-
212 regulator-max-
213 regulator-ramp
214 regulator-stat
215 regula
216 };
217 };
218
219 vdd_cpu_l: DCDC_REG2 {
220 regulator-name
221 regulator-alwa
222 regulator-boot
223 regulator-min-
224 regulator-max-
225 regulator-ramp
226 regulator-stat
227 regula
228 };
229 };
230
231 vcc_ddr: DCDC_REG3 {
232 regulator-name
233 regulator-alwa
234 regulator-boot
235 regulator-stat
236 regula
237 };
238 };
239
240 vcc_1v8: DCDC_REG4 {
241 regulator-name
242 regulator-alwa
243 regulator-boot
244 regulator-min-
245 regulator-max-
246 regulator-stat
247 regula
248 regula
249 };
250 };
251
252 vcc1v8_dvp: LDO_REG1 {
253 regulator-name
254 regulator-alwa
255 regulator-boot
256 regulator-min-
257 regulator-max-
258 regulator-stat
259 regula
260 };
261 };
262
263 vcc1v8_hdmi: LDO_REG2
264 regulator-name
265 regulator-alwa
266 regulator-boot
267 regulator-min-
268 regulator-max-
269 regulator-stat
270 regula
271 };
272 };
273
274 vcca_1v8: LDO_REG3 {
275 regulator-name
276 regulator-alwa
277 regulator-boot
278 regulator-min-
279 regulator-max-
280 regulator-stat
281 regula
282 regula
283 };
284 };
285
286 vccio_sd: LDO_REG4 {
287 regulator-name
288 regulator-alwa
289 regulator-boot
290 regulator-min-
291 regulator-max-
292 regulator-stat
293 regula
294 regula
295 };
296 };
297
298 vcca3v0_codec: LDO_REG
299 regulator-name
300 regulator-alwa
301 regulator-boot
302 regulator-min-
303 regulator-max-
304 regulator-stat
305 regula
306 };
307 };
308
309 vcc_1v5: LDO_REG6 {
310 regulator-name
311 regulator-alwa
312 regulator-boot
313 regulator-min-
314 regulator-max-
315 regulator-stat
316 regula
317 regula
318 };
319 };
320
321 vcc0v9_hdmi: LDO_REG7
322 regulator-name
323 regulator-alwa
324 regulator-boot
325 regulator-min-
326 regulator-max-
327 regulator-stat
328 regula
329 };
330 };
331
332 vcc_3v0: LDO_REG8 {
333 regulator-name
334 regulator-alwa
335 regulator-boot
336 regulator-min-
337 regulator-max-
338 regulator-stat
339 regula
340 regula
341 };
342 };
343 };
344 };
345
346 vdd_cpu_b: regulator@40 {
347 compatible = "silergy,syr827";
348 reg = <0x40>;
349 fcs,suspend-voltage-selector =
350 pinctrl-names = "default";
351 pinctrl-0 = <&vsel1_pin>;
352 regulator-name = "vdd_cpu_b";
353 regulator-min-microvolt = <712
354 regulator-max-microvolt = <150
355 regulator-ramp-delay = <1000>;
356 regulator-always-on;
357 regulator-boot-on;
358 vin-supply = <&vcc5v0_sys>;
359
360 regulator-state-mem {
361 regulator-off-in-suspe
362 };
363 };
364
365 vdd_gpu: regulator@41 {
366 compatible = "silergy,syr828";
367 reg = <0x41>;
368 fcs,suspend-voltage-selector =
369 pinctrl-names = "default";
370 pinctrl-0 = <&vsel2_pin>;
371 regulator-name = "vdd_gpu";
372 regulator-min-microvolt = <712
373 regulator-max-microvolt = <150
374 regulator-ramp-delay = <1000>;
375 regulator-always-on;
376 regulator-boot-on;
377 vin-supply = <&vcc5v0_sys>;
378
379 regulator-state-mem {
380 regulator-off-in-suspe
381 };
382 };
383 };
384
385 &i2c1 {
386 i2c-scl-rising-time-ns = <300>;
387 i2c-scl-falling-time-ns = <15>;
388 status = "okay";
389 };
390
391 &i2c3 {
392 i2c-scl-rising-time-ns = <450>;
393 i2c-scl-falling-time-ns = <15>;
394 status = "okay";
395 };
396
397 &i2c4 {
398 i2c-scl-rising-time-ns = <600>;
399 i2c-scl-falling-time-ns = <20>;
400 status = "okay";
401 };
402
403 &i2c7 {
404 status = "okay";
405 };
406
407 &i2s0 {
408 rockchip,playback-channels = <8>;
409 rockchip,capture-channels = <8>;
410 status = "okay";
411 };
412
413 &i2s1 {
414 rockchip,playback-channels = <2>;
415 rockchip,capture-channels = <2>;
416 status = "okay";
417 };
418
419 &i2s2 {
420 status = "okay";
421 };
422
423 &io_domains {
424 status = "okay";
425
426 bt656-supply = <&vcc1v8_dvp>;
427 audio-supply = <&vcc_1v8>;
428 sdmmc-supply = <&vccio_sd>;
429 gpio1830-supply = <&vcc_3v0>;
430 };
431
432 &pmu_io_domains {
433 status = "okay";
434 pmu1830-supply = <&vcc_3v0>;
435 };
436
437 &pinctrl {
438 bt {
439 bt_reg_on_h: bt-reg-on-h {
440 rockchip,pins = <0 RK_
441 };
442
443 bt_host_wake_l: bt-host-wake-l
444 rockchip,pins = <0 RK_
445 };
446
447 bt_wake_l: bt-wake-l {
448 rockchip,pins = <2 RK_
449 };
450 };
451
452 pmic {
453 pmic_int_l: pmic-int-l {
454 rockchip,pins = <1 RK_
455 };
456
457 vsel1_pin: vsel1-pin {
458 rockchip,pins = <1 RK_
459 };
460
461 vsel2_pin: vsel2-pin {
462 rockchip,pins = <1 RK_
463 };
464 };
465
466 usb2 {
467 vcc5v0_host3_en: vcc5v0-host3-
468 rockchip,pins = <2 RK_
469 };
470 };
471
472 wifi {
473 wifi_reg_on_h: wifi-reg-on-h {
474 rockchip,pins =
475 <0 RK_PB2 RK_F
476 };
477
478 wifi_host_wake_l: wifi-host-wa
479 rockchip,pins = <0 RK_
480 };
481 };
482 };
483
484 &pwm2 {
485 status = "okay";
486 };
487
488 &saradc {
489 status = "okay";
490
491 vref-supply = <&vcc_1v8>;
492 };
493
494 &sdio0 {
495 #address-cells = <1>;
496 #size-cells = <0>;
497 bus-width = <4>;
498 clock-frequency = <50000000>;
499 cap-sdio-irq;
500 cap-sd-highspeed;
501 keep-power-in-suspend;
502 mmc-pwrseq = <&sdio_pwrseq>;
503 non-removable;
504 pinctrl-names = "default";
505 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s
506 sd-uhs-sdr104;
507 status = "okay";
508
509 brcmf: wifi@1 {
510 compatible = "brcm,bcm4329-fma
511 reg = <1>;
512 interrupt-parent = <&gpio0>;
513 interrupts = <RK_PA3 IRQ_TYPE_
514 interrupt-names = "host-wake";
515 pinctrl-names = "default";
516 pinctrl-0 = <&wifi_host_wake_l
517 };
518 };
519
520 &sdhci {
521 bus-width = <8>;
522 mmc-hs400-1_8v;
523 mmc-hs400-enhanced-strobe;
524 non-removable;
525 status = "okay";
526 };
527
528 &sdmmc {
529 bus-width = <4>;
530 cap-mmc-highspeed;
531 cap-sd-highspeed;
532 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_
533 disable-wp;
534 max-frequency = <150000000>;
535 pinctrl-names = "default";
536 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdm
537 status = "okay";
538 };
539
540 &tcphy0 {
541 status = "okay";
542 };
543
544 &tcphy1 {
545 status = "okay";
546 };
547
548 &tsadc {
549 status = "okay";
550
551 /* tshut mode 0:CRU 1:GPIO */
552 rockchip,hw-tshut-mode = <1>;
553 /* tshut polarity 0:LOW 1:HIGH */
554 rockchip,hw-tshut-polarity = <1>;
555 };
556
557 &u2phy0 {
558 status = "okay";
559
560 u2phy0_otg: otg-port {
561 status = "okay";
562 };
563
564 u2phy0_host: host-port {
565 phy-supply = <&vcc5v0_host0>;
566 status = "okay";
567 };
568 };
569
570 &u2phy1 {
571 status = "okay";
572
573 u2phy1_otg: otg-port {
574 status = "okay";
575 };
576
577 u2phy1_host: host-port {
578 phy-supply = <&vcc5v0_host1>;
579 status = "okay";
580 };
581 };
582
583 &uart0 {
584 pinctrl-names = "default";
585 pinctrl-0 = <&uart0_xfer &uart0_cts &u
586 status = "okay";
587
588 bluetooth {
589 compatible = "brcm,bcm43438-bt
590 clocks = <&rk808 1>;
591 clock-names = "ext_clock";
592 device-wakeup-gpios = <&gpio2
593 host-wakeup-gpios = <&gpio0 RK
594 shutdown-gpios = <&gpio0 RK_PB
595 pinctrl-names = "default";
596 pinctrl-0 = <&bt_host_wake_l &
597 };
598 };
599
600 &uart2 {
601 status = "okay";
602 };
603
604 &usb_host0_ehci {
605 status = "okay";
606 };
607
608 &usb_host0_ohci {
609 status = "okay";
610 };
611
612 &usb_host1_ehci {
613 status = "okay";
614 };
615
616 &usb_host1_ohci {
617 status = "okay";
618 };
619
620 &usbdrd3_0 {
621 status = "okay";
622 };
623
624 &usbdrd_dwc3_0 {
625 status = "okay";
626 dr_mode = "otg";
627 };
628
629 &usbdrd3_1 {
630 status = "okay";
631 };
632
633 &usbdrd_dwc3_1 {
634 status = "okay";
635 dr_mode = "host";
636 };
637
638 &vopb {
639 status = "okay";
640 };
641
642 &vopb_mmu {
643 status = "okay";
644 };
645
646 &vopl {
647 status = "okay";
648 };
649
650 &vopl_mmu {
651 status = "okay";
652 };
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