1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2019 Fuzhou Rockchip Electron
4 * Copyright (c) 2019 Radxa Limited
5 * Copyright (c) 2022 Amarula Solutions(India)
6 */
7
8 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-t-opp.dtsi"
12
13 / {
14 model = "Radxa ROCK 4C+";
15 compatible = "radxa,rock-4c-plus", "ro
16
17 aliases {
18 ethernet0 = &gmac;
19 mmc0 = &sdhci;
20 mmc1 = &sdmmc;
21 };
22
23 chosen {
24 stdout-path = "serial2:1500000
25 };
26
27 clkin_gmac: external-gmac-clock {
28 compatible = "fixed-clock";
29 clock-frequency = <125000000>;
30 clock-output-names = "clkin_gm
31 #clock-cells = <0>;
32 };
33
34 leds {
35 compatible = "gpio-leds";
36 pinctrl-names = "default";
37 pinctrl-0 = <&user_led1 &user_
38
39 /* USER_LED1 */
40 led-0 {
41 function = LED_FUNCTIO
42 color = <LED_COLOR_ID_
43 gpios = <&gpio3 RK_PD4
44 linux,default-trigger
45 };
46
47 /* USER_LED2 */
48 led-1 {
49 function = LED_FUNCTIO
50 color = <LED_COLOR_ID_
51 gpios = <&gpio3 RK_PD5
52 linux,default-trigger
53 };
54 };
55
56 sdio_pwrseq: sdio-pwrseq {
57 compatible = "mmc-pwrseq-simpl
58 clocks = <&rk809 1>;
59 clock-names = "ext_clock";
60 pinctrl-names = "default";
61 pinctrl-0 = <&wifi_enable_h>;
62 reset-gpios = <&gpio0 RK_PB2 G
63 };
64
65 vcc_3v3: vcc-3v3-regulator {
66 compatible = "regulator-fixed"
67 regulator-name = "vcc_3v3";
68 regulator-always-on;
69 regulator-boot-on;
70 regulator-min-microvolt = <330
71 regulator-max-microvolt = <330
72 vin-supply = <&vcc3v3_sys>;
73 };
74
75 vcc3v3_phy1: vcc3v3-phy1-regulator {
76 compatible = "regulator-fixed"
77 regulator-name = "vcc3v3_phy1"
78 regulator-always-on;
79 regulator-boot-on;
80 regulator-min-microvolt = <330
81 regulator-max-microvolt = <330
82 vin-supply = <&vcc_3v3>;
83 };
84
85 vcc5v0_host1: vcc5v0-host-regulator {
86 compatible = "regulator-fixed"
87 enable-active-high;
88 gpio = <&gpio3 RK_PD6 GPIO_ACT
89 pinctrl-names = "default";
90 pinctrl-0 = <&vcc5v0_host_en>;
91 regulator-name = "vcc5v0_host1
92 regulator-always-on;
93 regulator-boot-on;
94 vin-supply = <&vcc5v0_host0_s0
95 };
96
97 vcc5v0_sys: vcc5v0-sys-regulator {
98 compatible = "regulator-fixed"
99 regulator-name = "vcc5v0_sys";
100 regulator-always-on;
101 regulator-boot-on;
102 regulator-min-microvolt = <500
103 regulator-max-microvolt = <500
104 };
105
106 vcc5v0_typec: vcc5v0-typec-regulator {
107 compatible = "regulator-fixed"
108 enable-active-high;
109 gpio = <&gpio1 RK_PA3 GPIO_ACT
110 pinctrl-names = "default";
111 pinctrl-0 = <&vcc5v0_typec0_en
112 regulator-name = "vcc5v0_typec
113 regulator-always-on;
114 regulator-boot-on;
115 vin-supply = <&vcc5v0_sys>;
116 };
117
118 vdd_log: vdd-log-regulator {
119 compatible = "regulator-fixed"
120 regulator-name = "vdd_log";
121 regulator-always-on;
122 regulator-boot-on;
123 regulator-min-microvolt = <950
124 regulator-max-microvolt = <950
125 vin-supply = <&vcc5v0_sys>;
126 };
127 };
128
129 &cpu_l0 {
130 cpu-supply = <&vdd_cpu_l>;
131 };
132
133 &cpu_l1 {
134 cpu-supply = <&vdd_cpu_l>;
135 };
136
137 &cpu_l2 {
138 cpu-supply = <&vdd_cpu_l>;
139 };
140
141 &cpu_l3 {
142 cpu-supply = <&vdd_cpu_l>;
143 };
144
145 &cpu_b0 {
146 cpu-supply = <&vdd_cpu_b>;
147 };
148
149 &cpu_b1 {
150 cpu-supply = <&vdd_cpu_b>;
151 };
152
153 &emmc_phy {
154 rockchip,enable-strobe-pulldown;
155 status = "okay";
156 };
157
158 &gmac {
159 assigned-clocks = <&cru SCLK_RMII_SRC>
160 assigned-clock-parents = <&clkin_gmac>
161 clock_in_out = "input";
162 phy-supply = <&vcc3v3_phy1>;
163 phy-mode = "rgmii";
164 pinctrl-names = "default";
165 pinctrl-0 = <&rgmii_pins>;
166 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_
167 snps,reset-active-low;
168 snps,reset-delays-us = <0 10000 50000>
169 tx_delay = <0x2a>;
170 rx_delay = <0x21>;
171 status = "okay";
172 };
173
174 &gpu {
175 mali-supply = <&vdd_gpu>;
176 status = "okay";
177 };
178
179 &hdmi {
180 avdd-0v9-supply = <&vcc_0v9_s0>;
181 avdd-1v8-supply = <&vcc_1v8_s0>;
182 ddc-i2c-bus = <&i2c3>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&hdmi_cec>;
185 status = "okay";
186 };
187
188 &hdmi_sound {
189 status = "okay";
190 };
191
192 &i2c0 {
193 status = "okay";
194 i2c-scl-falling-time-ns = <30>;
195 i2c-scl-rising-time-ns = <180>;
196 clock-frequency = <400000>;
197
198 rk809: pmic@20 {
199 compatible = "rockchip,rk809";
200 reg = <0x20>;
201 interrupt-parent = <&gpio1>;
202 interrupts = <RK_PC5 IRQ_TYPE_
203 #clock-cells = <1>;
204 clock-output-names = "rk808-cl
205 pinctrl-names = "default";
206 pinctrl-0 = <&pmic_int_l>;
207 rockchip,system-power-controll
208 wakeup-source;
209
210 vcc1-supply = <&vcc5v0_sys>;
211 vcc2-supply = <&vcc5v0_sys>;
212 vcc3-supply = <&vcc5v0_sys>;
213 vcc4-supply = <&vcc5v0_sys>;
214 vcc5-supply = <&vcc_buck5_s3>;
215 vcc6-supply = <&vcc_buck5_s3>;
216 vcc7-supply = <&vcc5v0_sys>;
217 vcc8-supply = <&vcc3v3_sys>;
218 vcc9-supply = <&vcc5v0_sys>;
219
220 regulators {
221 vdd_center: DCDC_REG1
222 regulator-alwa
223 regulator-boot
224 regulator-min-
225 regulator-max-
226 regulator-init
227 regulator-name
228 regulator-stat
229 regula
230 regula
231 };
232 };
233
234 vdd_cpu_l: DCDC_REG2 {
235 regulator-alwa
236 regulator-boot
237 regulator-min-
238 regulator-max-
239 regulator-ramp
240 regulator-init
241 regulator-name
242 regulator-stat
243 regula
244 };
245 };
246
247 vcc_ddr: DCDC_REG3 {
248 regulator-alwa
249 regulator-boot
250 regulator-name
251 regulator-init
252 regulator-stat
253 regula
254 };
255 };
256
257 vcc3v3_sys: DCDC_REG4
258 regulator-alwa
259 regulator-boot
260 regulator-min-
261 regulator-max-
262 regulator-init
263 regulator-name
264 regulator-stat
265 regula
266 regula
267 };
268 };
269
270 vcc_buck5_s3: DCDC_REG
271 regulator-alwa
272 regulator-boot
273 regulator-min-
274 regulator-max-
275 regulator-name
276 regulator-stat
277 regula
278 regula
279 };
280 };
281
282 vcc_0v9_s3: LDO_REG1 {
283 regulator-alwa
284 regulator-boot
285 regulator-min-
286 regulator-max-
287 regulator-name
288 regulator-stat
289 regula
290 };
291 };
292
293 vcc_1v8_s3: LDO_REG2 {
294 regulator-alwa
295 regulator-boot
296 regulator-min-
297 regulator-max-
298 regulator-name
299 regulator-stat
300 regula
301 regula
302 };
303 };
304
305 vcc_0v9_s0: LDO_REG3 {
306 regulator-alwa
307 regulator-boot
308 regulator-min-
309 regulator-max-
310 regulator-name
311 regulator-stat
312 regula
313 regula
314 };
315 };
316
317 vcc_1v8_s0: LDO_REG4 {
318 regulator-alwa
319 regulator-boot
320 regulator-min-
321 regulator-max-
322 regulator-name
323 regulator-stat
324 regula
325 };
326 };
327
328 vcc_mipi: LDO_REG5 {
329 regulator-alwa
330 regulator-boot
331 regulator-min-
332 regulator-max-
333 regulator-name
334 regulator-stat
335 regula
336 };
337 };
338
339 vcc_1v5_s0: LDO_REG6 {
340 regulator-alwa
341 regulator-boot
342 regulator-min-
343 regulator-max-
344 regulator-name
345 regulator-stat
346 regula
347 };
348 };
349
350 vcc_3v0_s0: LDO_REG7 {
351 regulator-alwa
352 regulator-boot
353 regulator-min-
354 regulator-max-
355 regulator-name
356 regulator-stat
357 regula
358 };
359 };
360
361 vcc_sdio_s0: LDO_REG8
362 regulator-alwa
363 regulator-boot
364 regulator-min-
365 regulator-max-
366 regulator-name
367 regulator-stat
368 regula
369 };
370 };
371
372 vcc_cam: LDO_REG9 {
373 regulator-alwa
374 regulator-boot
375 regulator-min-
376 regulator-max-
377 regulator-name
378 regulator-stat
379 regula
380 };
381 };
382
383 vcc5v0_host0_s0: SWITC
384 regulator-alwa
385 regulator-boot
386 regulator-name
387 regulator-stat
388 regula
389 };
390 };
391
392 lcd_3v3: SWITCH_REG2 {
393 regulator-alwa
394 regulator-boot
395 regulator-name
396 regulator-stat
397 regula
398 };
399 };
400 };
401 };
402
403 vdd_cpu_b: regulator@40 {
404 compatible = "silergy,syr827";
405 reg = <0x40>;
406 fcs,suspend-voltage-selector =
407 regulator-compatible = "fan535
408 pinctrl-0 = <&vsel1_gpio>;
409 vsel-gpios = <&gpio1 RK_PC1 GP
410 regulator-name = "vdd_cpu_b";
411 regulator-min-microvolt = <712
412 regulator-max-microvolt = <150
413 regulator-ramp-delay = <1000>;
414 regulator-always-on;
415 regulator-boot-on;
416 vin-supply = <&vcc5v0_sys>;
417 regulator-state-mem {
418 regulator-off-in-suspe
419 };
420 };
421
422 vdd_gpu: regulator@41 {
423 compatible = "silergy,syr828";
424 reg = <0x41>;
425 fcs,suspend-voltage-selector =
426 regulator-compatible = "fan535
427 pinctrl-0 = <&vsel2_gpio>;
428 vsel-gpios = <&gpio1 RK_PB6 GP
429 regulator-name = "vdd_gpu";
430 regulator-min-microvolt = <712
431 regulator-max-microvolt = <150
432 regulator-ramp-delay = <1000>;
433 regulator-always-on;
434 regulator-boot-on;
435 vin-supply = <&vcc5v0_sys>;
436 regulator-initial-mode = <1>;
437 regulator-state-mem {
438 regulator-off-in-suspe
439 };
440 };
441 };
442
443 &i2c3 {
444 i2c-scl-rising-time-ns = <450>;
445 i2c-scl-falling-time-ns = <15>;
446 status = "okay";
447 };
448
449 &i2s2 {
450 status = "okay";
451 };
452
453 &io_domains {
454 audio-supply = <&vcc_1v8_s0>;
455 bt656-supply = <&vcc_3v0_s0>;
456 gpio1830-supply = <&vcc_3v0_s0>;
457 sdmmc-supply = <&vcc_sdio_s0>;
458 status = "okay";
459 };
460
461 &pinctrl {
462 bt {
463 bt_enable_h: bt-enable-h {
464 rockchip,pins = <0 RK_
465 };
466
467 bt_host_wake_l: bt-host-wake-l
468 rockchip,pins = <0 RK_
469 };
470
471 bt_wake_l: bt-wake-l {
472 rockchip,pins = <2 RK_
473 };
474 };
475
476 leds {
477 user_led1: user-led1 {
478 rockchip,pins = <3 RK_
479 };
480
481 user_led2: user-led2 {
482 rockchip,pins = <3 RK_
483 };
484 };
485
486 pmic {
487 pmic_int_l: pmic-int-l {
488 rockchip,pins = <1 RK_
489 };
490
491 vsel1_gpio: vsel1-gpio {
492 rockchip,pins = <1 RK_
493 };
494
495 vsel2_gpio: vsel2-gpio {
496 rockchip,pins = <1 RK_
497 };
498 };
499
500 sdmmc {
501 sdmmc_bus4: sdmmc-bus4 {
502 rockchip,pins = <4 8 1
503 <4 9 1
504 <4 10
505 <4 11
506 };
507
508 sdmmc_clk: sdmmc-clk {
509 rockchip,pins = <4 12
510 };
511
512 sdmmc_cmd: sdmmc-cmd {
513 rockchip,pins = <4 13
514 };
515 };
516
517 usb-typec {
518 vcc5v0_typec0_en: vcc5v0-typec
519 rockchip,pins = <1 RK_
520 };
521 };
522
523 usb2 {
524 vcc5v0_host_en: vcc5v0-host-en
525 rockchip,pins = <3 RK_
526 };
527 };
528
529 wifi {
530 wifi_enable_h: wifi-enable-h {
531 rockchip,pins = <0 RK_
532 };
533
534 wifi_host_wake_l: wifi-host-wa
535 rockchip,pins = <0 RK_
536 };
537 };
538 };
539
540 &pmu_io_domains {
541 pmu1830-supply = <&vcc_3v0_s0>;
542 status = "okay";
543 };
544
545 &saradc {
546 status = "okay";
547 vref-supply = <&vcc_1v8_s3>;
548 };
549
550 &sdhci {
551 max-frequency = <150000000>;
552 bus-width = <8>;
553 mmc-hs400-1_8v;
554 mmc-hs400-enhanced-strobe;
555 non-removable;
556 status = "okay";
557 };
558
559 &sdio0 {
560 #address-cells = <1>;
561 #size-cells = <0>;
562 bus-width = <4>;
563 clock-frequency = <50000000>;
564 cap-sdio-irq;
565 cap-sd-highspeed;
566 keep-power-in-suspend;
567 mmc-pwrseq = <&sdio_pwrseq>;
568 non-removable;
569 pinctrl-names = "default";
570 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s
571 sd-uhs-sdr104;
572 status = "okay";
573
574 brcmf: wifi@1 {
575 compatible = "brcm,bcm4329-fma
576 reg = <1>;
577 interrupt-parent = <&gpio0>;
578 interrupts = <RK_PA3 IRQ_TYPE_
579 interrupt-names = "host-wake";
580 pinctrl-names = "default";
581 pinctrl-0 = <&wifi_host_wake_l
582 };
583 };
584
585 &sdmmc {
586 bus-width = <4>;
587 cap-mmc-highspeed;
588 cap-sd-highspeed;
589 card-detect-delay = <800>;
590 disable-wp;
591 pinctrl-names = "default";
592 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sd
593 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_
594 vqmmc-supply = <&vcc_sdio_s0>;
595 status = "okay";
596 };
597
598 &tcphy0 {
599 status = "okay";
600 };
601
602 &tcphy1 {
603 status = "okay";
604 };
605
606 &tsadc {
607 rockchip,hw-tshut-mode = <1>;
608 rockchip,hw-tshut-polarity = <1>;
609 status = "okay";
610 };
611
612 &u2phy0 {
613 status = "okay";
614
615 u2phy0_otg: otg-port {
616 status = "okay";
617 };
618
619 u2phy0_host: host-port {
620 phy-supply = <&vcc5v0_host1>;
621 status = "okay";
622 };
623 };
624
625 &u2phy1 {
626 status = "okay";
627
628 u2phy1_otg: otg-port {
629 status = "okay";
630 };
631
632 u2phy1_host: host-port {
633 phy-supply = <&vcc5v0_host1>;
634 status = "okay";
635 };
636 };
637
638 &uart0 {
639 pinctrl-names = "default";
640 pinctrl-0 = <&uart0_xfer &uart0_cts &u
641 status = "okay";
642
643 bluetooth {
644 compatible = "brcm,bcm4345c5";
645 clocks = <&rk809 1>;
646 clock-names = "lpo";
647 device-wakeup-gpios = <&gpio2
648 host-wakeup-gpios = <&gpio0 RK
649 shutdown-gpios = <&gpio0 RK_PB
650 max-speed = <1500000>;
651 pinctrl-names = "default";
652 pinctrl-0 = <&bt_host_wake_l &
653 vbat-supply = <&vcc3v3_sys>;
654 vddio-supply = <&vcc_1v8_s3>;
655 };
656 };
657
658 &uart2 {
659 status = "okay";
660 };
661
662 &usb_host0_ehci {
663 status = "okay";
664 };
665
666 &usb_host0_ohci {
667 status = "okay";
668 };
669
670 &usb_host1_ehci {
671 status = "okay";
672 };
673
674 &usb_host1_ohci {
675 status = "okay";
676 };
677
678 &usbdrd3_0 {
679 extcon = <&u2phy0>;
680 status = "okay";
681 };
682
683 &usbdrd_dwc3_0 {
684 status = "okay";
685 dr_mode = "host";
686 };
687
688 &usbdrd3_1 {
689 status = "okay";
690 };
691
692 &usbdrd_dwc3_1 {
693 status = "okay";
694 dr_mode = "host";
695 };
696
697 &vopb {
698 status = "okay";
699 };
700
701 &vopb_mmu {
702 status = "okay";
703 };
704
705 &vopl {
706 status = "okay";
707 };
708
709 &vopl_mmu {
710 status = "okay";
711 };
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