1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
9 #include <dt-bindings/usb/pd.h>
10 #include "rk3566.dtsi"
11
12 / {
13 chassis-type = "tablet";
14
15 aliases {
16 mmc0 = &sdhci;
17 mmc1 = &sdmmc0;
18 };
19
20 chosen {
21 stdout-path = "serial2:1500000
22 };
23
24 adc-keys {
25 compatible = "adc-keys";
26 io-channels = <&saradc 0>;
27 io-channel-names = "buttons";
28 keyup-threshold-microvolt = <1
29 poll-interval = <25>;
30
31 button-vol-up {
32 label = "Volume Up";
33 linux,code = <KEY_VOLU
34 press-threshold-microv
35 };
36
37 button-vol-down {
38 label = "Volume Down";
39 linux,code = <KEY_VOLU
40 press-threshold-microv
41 };
42 };
43
44 backlight: backlight {
45 compatible = "pwm-backlight";
46 pwms = <&pwm4 0 25000 0>;
47 brightness-levels = <20 220>;
48 num-interpolated-steps = <200>
49 default-brightness-level = <10
50 power-supply = <&vcc_sys>;
51 };
52
53 battery: battery {
54 compatible = "simple-battery";
55 charge-full-design-microamp-ho
56 charge-term-current-microamp =
57 constant-charge-current-max-mi
58 constant-charge-voltage-max-mi
59 voltage-max-design-microvolt =
60 voltage-min-design-microvolt =
61
62 ocv-capacity-celsius = <20>;
63 ocv-capacity-table-0 = <432200
64 <408000
65 <388500
66 <377600
67 <364000
68 <340000
69 };
70
71 gpio_keys: gpio-keys {
72 compatible = "gpio-keys";
73 pinctrl-names = "default";
74 pinctrl-0 = <&kb_id_det>;
75
76 tablet-mode-switch {
77 debounce-interval = <2
78 gpios = <&gpio4 RK_PA4
79 label = "Tablet Mode";
80 linux,input-type = <EV
81 linux,code = <SW_TABLE
82 };
83 };
84
85 hdmi-connector {
86 compatible = "hdmi-connector";
87 type = "d";
88
89 port {
90 hdmi_con_in: endpoint
91 remote-endpoin
92 };
93 };
94 };
95
96 led-0 {
97 compatible = "regulator-led";
98 vled-supply = <&vcc5v0_flashle
99 color = <LED_COLOR_ID_WHITE>;
100 function = LED_FUNCTION_FLASH;
101 };
102
103 rk817-sound {
104 compatible = "simple-audio-car
105 pinctrl-names = "default";
106 pinctrl-0 = <&hp_det_l>;
107 simple-audio-card,format = "i2
108 simple-audio-card,name = "rk81
109 simple-audio-card,mclk-fs = <2
110
111 simple-audio-card,widgets =
112 "Microphone", "Mic Jac
113 "Headphone", "Headphon
114 "Speaker", "Internal S
115
116 simple-audio-card,routing =
117 "MICR", "Mic Jack",
118 "Headphones", "HPOL",
119 "Headphones", "HPOR",
120 "Internal Speakers", "
121 "Internal Speakers", "
122 "Speaker Amplifier INL
123 "Speaker Amplifier INR
124 simple-audio-card,hp-det-gpio
125 simple-audio-card,aux-devs = <
126 simple-audio-card,pin-switches
127
128 simple-audio-card,cpu {
129 sound-dai = <&i2s1_8ch
130 };
131
132 simple-audio-card,codec {
133 sound-dai = <&rk817>;
134 };
135 };
136
137 speaker_amp: speaker-amplifier {
138 compatible = "simple-audio-amp
139 pinctrl-names = "default";
140 pinctrl-0 = <&spk_ctl>;
141 enable-gpios = <&gpio4 RK_PC2
142 sound-name-prefix = "Speaker A
143 VCC-supply = <&vcc_bat>;
144 };
145
146 vcc_3v3: vcc-3v3-regulator {
147 compatible = "regulator-fixed"
148 regulator-name = "vcc_3v3";
149 regulator-always-on;
150 regulator-boot-on;
151 regulator-min-microvolt = <330
152 regulator-max-microvolt = <330
153 vin-supply = <&vcc3v3_sys>;
154 };
155
156 vcc3v3_minipcie: vcc3v3-minipcie-regul
157 compatible = "regulator-fixed"
158 enable-active-high;
159 gpio = <&gpio4 RK_PC3 GPIO_ACT
160 pinctrl-names = "default";
161 pinctrl-0 = <&pcie_pwren_h>;
162 regulator-name = "vcc3v3_minip
163 regulator-min-microvolt = <330
164 regulator-max-microvolt = <330
165 vin-supply = <&vcc_sys>;
166 };
167
168 vcc3v3_sd: vcc3v3-sd-regulator {
169 compatible = "regulator-fixed"
170 gpio = <&gpio0 RK_PA5 GPIO_ACT
171 pinctrl-names = "default";
172 pinctrl-0 = <&sdmmc_pwren_l>;
173 regulator-name = "vcc3v3_sd";
174 regulator-min-microvolt = <330
175 regulator-max-microvolt = <330
176 vin-supply = <&vcc3v3_sys>;
177 };
178
179 vcc5v0_flashled: vcc5v0-flashled-regul
180 compatible = "regulator-fixed"
181 enable-active-high;
182 gpio = <&gpio4 RK_PA5 GPIO_ACT
183 pinctrl-names = "default";
184 pinctrl-0 = <&flash_led_en_h>;
185 regulator-name = "vcc5v0_flash
186 regulator-min-microvolt = <500
187 regulator-max-microvolt = <500
188 vin-supply = <&vcc5v_midu>;
189 };
190
191 vcc5v0_usb_host0: vcc5v0-usb-host0-reg
192 compatible = "regulator-fixed"
193 enable-active-high;
194 gpio = <&gpio4 RK_PC4 GPIO_ACT
195 pinctrl-names = "default";
196 pinctrl-0 = <&usb_host_pwren1_
197 regulator-name = "vcc5v0_usb_h
198 regulator-min-microvolt = <500
199 regulator-max-microvolt = <500
200 vin-supply = <&vcc5v_midu>;
201 };
202
203 vcc5v0_usb_host2: vcc5v0-usb-host2-reg
204 compatible = "regulator-fixed"
205 enable-active-high;
206 gpio = <&gpio4 RK_PC5 GPIO_ACT
207 pinctrl-names = "default";
208 pinctrl-0 = <&usb_host_pwren2_
209 regulator-name = "vcc5v0_usb_h
210 regulator-min-microvolt = <500
211 regulator-max-microvolt = <500
212 vin-supply = <&vcc5v_midu>;
213 };
214
215 vcc_bat: vcc-bat-regulator {
216 compatible = "regulator-fixed"
217 regulator-name = "vcc_bat";
218 regulator-always-on;
219 regulator-boot-on;
220 };
221
222 vcc_sys: vcc-sys-regulator {
223 compatible = "regulator-fixed"
224 regulator-name = "vcc_sys";
225 regulator-always-on;
226 regulator-boot-on;
227 vin-supply = <&vcc_bat>;
228 };
229
230 vdd1v2_dvp: vdd1v2-dvp-regulator {
231 compatible = "regulator-fixed"
232 regulator-name = "vdd1v2_dvp";
233 regulator-min-microvolt = <120
234 regulator-max-microvolt = <120
235 vin-supply = <&vcc_3v3>;
236 };
237 };
238
239 &combphy1 {
240 status = "okay";
241 };
242
243 &combphy2 {
244 status = "okay";
245 };
246
247 &cpu0 {
248 cpu-supply = <&vdd_cpu>;
249 };
250
251 &cpu1 {
252 cpu-supply = <&vdd_cpu>;
253 };
254
255 &cpu2 {
256 cpu-supply = <&vdd_cpu>;
257 };
258
259 &cpu3 {
260 cpu-supply = <&vdd_cpu>;
261 };
262
263 &cru {
264 assigned-clocks = <&pmucru CLK_RTC_32K
265 <&pmucru PLL_PPLL>,
266 assigned-clock-rates = <32768>, <12000
267 assigned-clock-parents = <&pmucru CLK_
268 };
269
270 &csi_dphy {
271 status = "okay";
272 };
273
274 &dsi0 {
275 status = "okay";
276 clock-master;
277 #address-cells = <1>;
278 #size-cells = <0>;
279
280 lcd: panel@0 {
281 compatible = "boe,th101mb31ig0
282 reg = <0>;
283 backlight = <&backlight>;
284 enable-gpios = <&gpio0 RK_PC7
285 rotation = <90>;
286 power-supply = <&vcc_3v3>;
287
288 port@0 {
289 panel_in_dsi: endpoint
290 remote-endpoin
291 };
292 };
293 };
294 };
295
296 &dsi0_in {
297 dsi0_in_vp1: endpoint {
298 remote-endpoint = <&vp1_out_ds
299 };
300 };
301
302 &dsi0_out {
303 dsi0_out_con: endpoint {
304 remote-endpoint = <&panel_in_d
305 };
306 };
307
308 &dsi_dphy0 {
309 status = "okay";
310 };
311
312 &gpu {
313 mali-supply = <&vdd_gpu_npu>;
314 status = "okay";
315 };
316
317 &hdmi {
318 avdd-0v9-supply = <&vdda_0v9_p>;
319 avdd-1v8-supply = <&vcc_1v8>;
320 status = "okay";
321 };
322
323 &hdmi_in {
324 hdmi_in_vp0: endpoint {
325 remote-endpoint = <&vp0_out_hd
326 };
327 };
328
329 &hdmi_out {
330 hdmi_out_con: endpoint {
331 remote-endpoint = <&hdmi_con_i
332 };
333 };
334
335 &hdmi_sound {
336 status = "okay";
337 };
338
339 &i2c0 {
340 clock-frequency = <400000>;
341 status = "okay";
342
343 vdd_cpu: regulator@1c {
344 compatible = "tcs,tcs4525";
345 reg = <0x1c>;
346 fcs,suspend-voltage-selector =
347 regulator-name = "vdd_cpu";
348 regulator-min-microvolt = <800
349 regulator-max-microvolt = <115
350 regulator-ramp-delay = <2300>;
351 regulator-always-on;
352 regulator-boot-on;
353 vin-supply = <&vcc_sys>;
354
355 regulator-state-mem {
356 regulator-off-in-suspe
357 };
358 };
359
360 rk817: pmic@20 {
361 compatible = "rockchip,rk817";
362 reg = <0x20>;
363 interrupt-parent = <&gpio0>;
364 interrupts = <RK_PA3 IRQ_TYPE_
365 assigned-clocks = <&cru I2S1_M
366 assigned-clock-parents = <&cru
367 clock-names = "mclk";
368 clocks = <&cru I2S1_MCLKOUT_TX
369 clock-output-names = "rk808-cl
370 #clock-cells = <1>;
371 pinctrl-names = "default";
372 pinctrl-0 = <&pmic_int_l>, <&i
373 rockchip,system-power-controll
374 #sound-dai-cells = <0>;
375 wakeup-source;
376
377 vcc1-supply = <&vcc_sys>;
378 vcc2-supply = <&vcc_sys>;
379 vcc3-supply = <&vcc_sys>;
380 vcc4-supply = <&vcc_sys>;
381 vcc5-supply = <&vcc_sys>;
382 vcc6-supply = <&vcc_sys>;
383 vcc7-supply = <&vcc_sys>;
384 vcc8-supply = <&vcc_sys>;
385 vcc9-supply = <&vcc5v_midu>;
386
387 regulators {
388 vdd_logic: DCDC_REG1 {
389 regulator-alwa
390 regulator-boot
391 regulator-min-
392 regulator-max-
393 regulator-ramp
394 regulator-init
395 regulator-name
396 regulator-stat
397 regula
398 };
399 };
400
401 vdd_gpu_npu: DCDC_REG2
402 regulator-min-
403 regulator-max-
404 regulator-ramp
405 regulator-init
406 regulator-name
407 regulator-stat
408 regula
409 };
410 };
411
412 vcc_ddr: DCDC_REG3 {
413 regulator-alwa
414 regulator-boot
415 regulator-init
416 regulator-name
417 regulator-stat
418 regula
419 };
420 };
421
422 vcc3v3_sys: DCDC_REG4
423 regulator-alwa
424 regulator-boot
425 regulator-min-
426 regulator-max-
427 regulator-init
428 regulator-name
429 regulator-stat
430 regula
431 };
432 };
433
434 vcca1v8_pmu: LDO_REG1
435 regulator-alwa
436 regulator-boot
437 regulator-min-
438 regulator-max-
439 regulator-name
440 regulator-stat
441 regula
442 };
443 };
444
445 vdda_0v9_p: LDO_REG2 {
446 regulator-alwa
447 regulator-boot
448 regulator-min-
449 regulator-max-
450 regulator-name
451 regulator-stat
452 regula
453 };
454 };
455
456 vdda0v9_pmu: LDO_REG3
457 regulator-alwa
458 regulator-boot
459 regulator-min-
460 regulator-max-
461 regulator-name
462 regulator-stat
463 regula
464 };
465 };
466
467 vccio_acodec: LDO_REG4
468 regulator-alwa
469 regulator-boot
470 regulator-min-
471 regulator-max-
472 regulator-name
473 regulator-stat
474 regula
475 };
476 };
477
478 vccio_sd: LDO_REG5 {
479 regulator-alwa
480 regulator-boot
481 regulator-min-
482 regulator-max-
483 regulator-name
484 regulator-stat
485 regula
486 };
487 };
488
489 vcc3v3_pmu: LDO_REG6 {
490 regulator-alwa
491 regulator-boot
492 regulator-min-
493 regulator-max-
494 regulator-name
495 regulator-stat
496 regula
497 };
498 };
499
500 vcc_1v8: LDO_REG7 {
501 regulator-alwa
502 regulator-boot
503 regulator-min-
504 regulator-max-
505 regulator-name
506 regulator-stat
507 regula
508 };
509 };
510
511 vcc1v8_dvp: LDO_REG8 {
512 regulator-alwa
513 regulator-boot
514 regulator-min-
515 regulator-max-
516 regulator-name
517 regulator-stat
518 regula
519 };
520 };
521
522 vcc2v8_dvp: LDO_REG9 {
523 regulator-alwa
524 regulator-boot
525 regulator-min-
526 regulator-max-
527 regulator-name
528 regulator-stat
529 regula
530 };
531 };
532
533 vcc5v_midu: BOOST {
534 regulator-alwa
535 regulator-boot
536 regulator-min-
537 regulator-max-
538 regulator-name
539 regulator-stat
540 regula
541 };
542 };
543
544 vbus: OTG_SWITCH {
545 regulator-min-
546 regulator-max-
547 regulator-name
548 regulator-stat
549 regula
550 };
551 };
552 };
553
554 charger {
555 monitored-battery = <&
556 rockchip,resistor-sens
557 rockchip,sleep-enter-c
558 rockchip,sleep-filter-
559 };
560 };
561 };
562
563 &i2c1 {
564 clock-frequency = <400000>;
565 status = "okay";
566
567 touchscreen@5d {
568 compatible = "goodix,gt911";
569 reg = <0x5d>;
570 interrupt-parent = <&gpio0>;
571 interrupts = <RK_PB0 IRQ_TYPE_
572 pinctrl-names = "default";
573 pinctrl-0 = <&tp_int_l_pmuio2>
574 AVDD28-supply = <&vcc3v3_pmu>;
575 VDDIO-supply = <&vcca1v8_pmu>;
576 irq-gpios = <&gpio0 RK_PB0 GPI
577 reset-gpios = <&gpio0 RK_PC2 G
578 };
579 };
580
581 &i2c2 {
582 clock-frequency = <400000>;
583 pinctrl-0 = <&i2c2m1_xfer>;
584 status = "okay";
585
586 vcm@c {
587 compatible = "dongwoon,dw9714"
588 reg = <0x0c>;
589 vcc-supply = <&vcc1v8_dvp>;
590 };
591
592 camera@36 {
593 compatible = "ovti,ov5648";
594 reg = <0x36>;
595 pinctrl-names = "default";
596 pinctrl-0 = <&camerab_pdn_l &c
597
598 clocks = <&cru CLK_CIF_OUT>;
599 assigned-clocks = <&cru CLK_CI
600 assigned-clock-rates = <240000
601
602 avdd-supply = <&vcc2v8_dvp>;
603 dvdd-supply = <&vdd1v2_dvp>;
604 dovdd-supply = <&vcc1v8_dvp>;
605 powerdown-gpios = <&gpio4 RK_P
606 reset-gpios = <&gpio4 RK_PB1 G
607
608 port {
609 endpoint {
610 data-lanes = <
611 remote-endpoin
612 link-frequenci
613 };
614 };
615 };
616 };
617
618 &i2c5 {
619 clock-frequency = <400000>;
620 status = "okay";
621
622 accelerometer@18 {
623 compatible = "silan,sc7a20";
624 reg = <0x18>;
625 interrupt-parent = <&gpio3>;
626 interrupts = <RK_PA2 IRQ_TYPE_
627 pinctrl-names = "default";
628 pinctrl-0 = <&gsensor_int_l>;
629 st,drdy-int-pin = <1>;
630 vdd-supply = <&vcc_1v8>;
631 vddio-supply = <&vcc_1v8>;
632 mount-matrix = "1", "0", "0",
633 "0", "0", "1",
634 "0", "1", "0";
635 };
636 };
637
638 &i2s0_8ch {
639 status = "okay";
640 };
641
642 &i2s1_8ch {
643 pinctrl-names = "default";
644 pinctrl-0 = <&i2s1m0_sclktx
645 &i2s1m0_lrcktx
646 &i2s1m0_sdi0
647 &i2s1m0_sdo0>;
648 rockchip,trcm-sync-tx-only;
649 status = "okay";
650 };
651
652 &pcie2x1 {
653 pinctrl-names = "default";
654 pinctrl-0 = <&pcie_reset_h>;
655 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTI
656 vpcie3v3-supply = <&vcc3v3_minipcie>;
657 status = "okay";
658 };
659
660 &pinctrl {
661 camerab {
662 camerab_pdn_l: camerab-pdn-l {
663 rockchip,pins = <4 RK_
664 };
665
666 camerab_rst_l: camerab-rst-l {
667 rockchip,pins = <4 RK_
668 };
669 };
670
671 cameraf {
672 cameraf_pdn_l: cameraf-pdn-l {
673 rockchip,pins = <4 RK_
674 };
675
676 cameraf_rst_l: cameraf-rst-l {
677 rockchip,pins = <4 RK_
678 };
679 };
680
681 flash {
682 flash_led_en_h: flash-led-en-h
683 rockchip,pins = <4 RK_
684 };
685 };
686
687 fspi {
688 fspi_dual_io_pins: fspi-dual-i
689 rockchip,pins =
690 /* fspi_clk */
691 <1 RK_PD0 1 &p
692 /* fspi_cs0n *
693 <1 RK_PD3 1 &p
694 /* fspi_d0 */
695 <1 RK_PD1 1 &p
696 /* fspi_d1 */
697 <1 RK_PD2 1 &p
698 };
699 };
700
701 gsensor {
702 gsensor_int_l: gsensor-int-l {
703 rockchip,pins = <3 RK_
704 };
705 };
706
707 kb {
708 kb_id_det: kb-id-det {
709 rockchip,pins = <4 RK_
710 };
711 };
712
713 lcd {
714 lcd_pwren_h: lcd-pwren-h {
715 rockchip,pins = <0 RK_
716 };
717 };
718
719 pcie {
720 pcie_pwren_h: pcie-pwren-h {
721 rockchip,pins = <4 RK_
722 };
723
724 pcie_reset_h: pcie-reset-h {
725 rockchip,pins = <1 RK_
726 };
727 };
728
729 pmic {
730 pmic_int_l: pmic-int-l {
731 rockchip,pins = <0 RK_
732 };
733 };
734
735 sdmmc {
736 sdmmc_pwren_l: sdmmc-pwren-l {
737 rockchip,pins = <0 RK_
738 };
739 };
740
741 sound {
742 hp_det_l: hp-det-l {
743 rockchip,pins = <4 RK_
744 };
745
746 spk_ctl: spk-ctl {
747 rockchip,pins = <4 RK_
748 };
749 };
750
751 tp {
752 tp_int_l_pmuio2: tp-int-l-pmui
753 rockchip,pins = <0 RK_
754 };
755
756 tp_rst_l_pmuio2: tp-rst-l-pmui
757 rockchip,pins = <0 RK_
758 };
759 };
760
761 usb {
762 usbcc_int_l: usbcc-int-l {
763 rockchip,pins = <0 RK_
764 };
765
766 usb_host_pwren1_h: usb-host-pw
767 rockchip,pins = <4 RK_
768 };
769
770 usb_host_pwren2_h: usb-host-pw
771 rockchip,pins = <4 RK_
772 };
773 };
774
775 wifi {
776 host_wake_wl: host-wake-wl {
777 rockchip,pins = <0 RK_
778 };
779
780 wifi_wake_host_h: wifi-wake-ho
781 rockchip,pins = <0 RK_
782 };
783 };
784 };
785
786 &pmu_io_domains {
787 pmuio1-supply = <&vcc3v3_pmu>;
788 pmuio2-supply = <&vcca1v8_pmu>;
789 vccio1-supply = <&vccio_acodec>;
790 vccio2-supply = <&vcc_1v8>;
791 vccio3-supply = <&vccio_sd>;
792 vccio4-supply = <&vcc_1v8>;
793 vccio5-supply = <&vcc_1v8>;
794 vccio6-supply = <&vcc1v8_dvp>;
795 vccio7-supply = <&vcc_3v3>;
796 status = "okay";
797 };
798
799 &pwm4 {
800 status = "okay";
801 };
802
803 &saradc {
804 vref-supply = <&vcc_1v8>;
805 status = "okay";
806 };
807
808 &sdhci {
809 bus-width = <8>;
810 no-sdio;
811 no-sd;
812 non-removable;
813 max-frequency = <200000000>;
814 mmc-hs200-1_8v;
815 pinctrl-names = "default";
816 pinctrl-0 = <&emmc_bus8
817 &emmc_clk
818 &emmc_cmd
819 &emmc_datastrobe
820 &emmc_rstnout>;
821 vmmc-supply = <&vcc_3v3>;
822 vqmmc-supply = <&vcc_1v8>;
823 status = "okay";
824 };
825
826 &sdmmc0 {
827 bus-width = <4>;
828 cap-sd-highspeed;
829 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_
830 disable-wp;
831 pinctrl-names = "default";
832 pinctrl-0 = <&sdmmc0_bus4
833 &sdmmc0_clk
834 &sdmmc0_cmd
835 &sdmmc0_det>;
836 sd-uhs-sdr104;
837 vmmc-supply = <&vcc3v3_sd>;
838 vqmmc-supply = <&vccio_sd>;
839 status = "okay";
840 };
841
842 &sdmmc1 {
843 bus-width = <4>;
844 cap-sd-highspeed;
845 cap-sdio-irq;
846 keep-power-in-suspend;
847 non-removable;
848 pinctrl-names = "default";
849 pinctrl-0 = <&sdmmc1_bus4
850 &sdmmc1_cmd
851 &sdmmc1_clk>;
852 sd-uhs-sdr104;
853 vqmmc-supply = <&vcca1v8_pmu>;
854 status = "okay";
855 };
856
857 &sfc {
858 pinctrl-names = "default";
859 pinctrl-0 = <&fspi_dual_io_pins>;
860 status = "okay";
861 #address-cells = <1>;
862 #size-cells = <0>;
863
864 flash@0 {
865 compatible = "jedec,spi-nor";
866 reg = <0>;
867 spi-max-frequency = <100000000
868 spi-rx-bus-width = <2>;
869 spi-tx-bus-width = <1>;
870 };
871 };
872
873 &tsadc {
874 rockchip,hw-tshut-mode = <1>;
875 rockchip,hw-tshut-polarity = <0>;
876 status = "okay";
877 };
878
879 &uart2 {
880 status = "okay";
881 };
882
883 &usb_host0_ehci {
884 status = "okay";
885 };
886
887 &usb_host0_ohci {
888 status = "okay";
889 };
890
891 &usb_host0_xhci {
892 status = "okay";
893 };
894
895 &usb_host1_xhci {
896 status = "okay";
897 };
898
899 &usb2phy0 {
900 status = "okay";
901 };
902
903 &usb2phy0_host {
904 phy-supply = <&vcc5v0_usb_host0>;
905 status = "okay";
906 };
907
908 &usb2phy0_otg {
909 status = "okay";
910 };
911
912 &usb2phy1 {
913 status = "okay";
914 };
915
916 &usb2phy1_otg {
917 phy-supply = <&vcc5v0_usb_host2>;
918 status = "okay";
919 };
920
921 &vop {
922 assigned-clocks = <&cru DCLK_VOP0>, <&
923 assigned-clock-parents = <&pmucru PLL_
924 status = "okay";
925 };
926
927 &vop_mmu {
928 status = "okay";
929 };
930
931 &vp0 {
932 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_E
933 reg = <ROCKCHIP_VOP2_EP_HDMI0>
934 remote-endpoint = <&hdmi_in_vp
935 };
936 };
937
938 &vp1 {
939 vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_E
940 reg = <ROCKCHIP_VOP2_EP_MIPI0>
941 remote-endpoint = <&dsi0_in_vp
942 };
943 };
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