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Linux/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts

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Diff markup

Differences between /arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts (Version linux-6.12-rc7) and /arch/i386/boot/dts/rockchip/rk3568-radxa-e25.dts (Version linux-5.18.19)


  1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)     
  2                                                   
  3 /dts-v1/;                                         
  4 #include "rk3568-radxa-cm3i.dtsi"                 
  5                                                   
  6 / {                                               
  7         model = "Radxa E25 Carrier Board";        
  8         compatible = "radxa,e25", "radxa,cm3i"    
  9                                                   
 10         aliases {                                 
 11                 mmc1 = &sdmmc0;                   
 12         };                                        
 13                                                   
 14         pwm-leds {                                
 15                 compatible = "pwm-leds-multico    
 16                                                   
 17                 multi-led {                       
 18                         color = <LED_COLOR_ID_    
 19                         max-brightness = <255>    
 20                                                   
 21                         led-red {                 
 22                                 color = <LED_C    
 23                                 pwms = <&pwm1     
 24                         };                        
 25                                                   
 26                         led-green {               
 27                                 color = <LED_C    
 28                                 pwms = <&pwm2     
 29                         };                        
 30                                                   
 31                         led-blue {                
 32                                 color = <LED_C    
 33                                 pwms = <&pwm12    
 34                         };                        
 35                 };                                
 36         };                                        
 37                                                   
 38         vbus_typec: vbus-typec-regulator {        
 39                 compatible = "regulator-fixed"    
 40                 enable-active-high;               
 41                 gpio = <&gpio0 RK_PB7 GPIO_ACT    
 42                 pinctrl-names = "default";        
 43                 pinctrl-0 = <&vbus_typec_en>;     
 44                 regulator-name = "vbus_typec";    
 45                 regulator-min-microvolt = <500    
 46                 regulator-max-microvolt = <500    
 47                 vin-supply = <&vcc5v0_sys>;       
 48         };                                        
 49                                                   
 50         /* actually fed by vcc5v0_sys, depende    
 51          * on pi6c clock generator                
 52          */                                       
 53         vcc3v3_minipcie: vcc3v3-minipcie-regul    
 54                 compatible = "regulator-fixed"    
 55                 enable-active-high;               
 56                 gpio = <&gpio3 RK_PA7 GPIO_ACT    
 57                 pinctrl-names = "default";        
 58                 pinctrl-0 = <&minipcie_enable_    
 59                 regulator-name = "vcc3v3_minip    
 60                 regulator-min-microvolt = <330    
 61                 regulator-max-microvolt = <330    
 62                 vin-supply = <&vcc3v3_pi6c_05>    
 63         };                                        
 64                                                   
 65         vcc3v3_ngff: vcc3v3-ngff-regulator {      
 66                 compatible = "regulator-fixed"    
 67                 enable-active-high;               
 68                 gpio = <&gpio0 RK_PD6 GPIO_ACT    
 69                 pinctrl-names = "default";        
 70                 pinctrl-0 = <&ngffpcie_enable_    
 71                 regulator-name = "vcc3v3_ngff"    
 72                 regulator-min-microvolt = <330    
 73                 regulator-max-microvolt = <330    
 74                 vin-supply = <&vcc5v0_sys>;       
 75         };                                        
 76                                                   
 77         vcc3v3_pcie30x1: vcc3v3-pcie30x1-regul    
 78                 compatible = "regulator-fixed"    
 79                 enable-active-high;               
 80                 gpio = <&gpio0 RK_PC5 GPIO_ACT    
 81                 pinctrl-names = "default";        
 82                 pinctrl-0 = <&pcie30x1_enable_    
 83                 regulator-name = "vcc3v3_pcie3    
 84                 regulator-min-microvolt = <330    
 85                 regulator-max-microvolt = <330    
 86                 vin-supply = <&vcc5v0_sys>;       
 87         };                                        
 88                                                   
 89         vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulat    
 90                 compatible = "regulator-fixed"    
 91                 enable-active-high;               
 92                 gpios = <&gpio0 RK_PC7 GPIO_AC    
 93                 pinctrl-names = "default";        
 94                 pinctrl-0 = <&pcie_enable_h>;     
 95                 regulator-name = "vcc3v3_pcie"    
 96                 regulator-min-microvolt = <330    
 97                 regulator-max-microvolt = <330    
 98                 vin-supply = <&vcc5v0_sys>;       
 99         };                                        
100 };                                                
101                                                   
102 &combphy1 {                                       
103         phy-supply = <&vcc3v3_pcie30x1>;          
104 };                                                
105                                                   
106 &display_subsystem {                              
107         status = "disabled";                      
108 };                                                
109                                                   
110 &pcie2x1 {                                        
111         pinctrl-names = "default";                
112         pinctrl-0 = <&pcie20_reset_h>;            
113         reset-gpios = <&gpio1 RK_PB2 GPIO_ACTI    
114         vpcie3v3-supply = <&vcc3v3_pi6c_05>;      
115         status = "okay";                          
116 };                                                
117                                                   
118 &pcie30phy {                                      
119         data-lanes = <1 2>;                       
120         status = "okay";                          
121 };                                                
122                                                   
123 &pcie3x1 {                                        
124         num-lanes = <1>;                          
125         pinctrl-names = "default";                
126         pinctrl-0 = <&pcie30x1m0_pins>;           
127         reset-gpios = <&gpio0 RK_PC3 GPIO_ACTI    
128         vpcie3v3-supply = <&vcc3v3_minipcie>;     
129         status = "okay";                          
130 };                                                
131                                                   
132 &pcie3x2 {                                        
133         num-lanes = <1>;                          
134         pinctrl-names = "default";                
135         pinctrl-0 = <&pcie30x2_reset_h>;          
136         reset-gpios = <&gpio2 RK_PD6 GPIO_ACTI    
137         vpcie3v3-supply = <&vcc3v3_pi6c_05>;      
138         status = "okay";                          
139 };                                                
140                                                   
141 &pinctrl {                                        
142         pcie {                                    
143                 pcie20_reset_h: pcie20-reset-h    
144                         rockchip,pins = <1 RK_    
145                 };                                
146                                                   
147                 pcie30x1_enable_h: pcie30x1-en    
148                         rockchip,pins = <0 RK_    
149                 };                                
150                                                   
151                 pcie30x2_reset_h: pcie30x2-res    
152                         rockchip,pins = <2 RK_    
153                 };                                
154                                                   
155                 pcie_enable_h: pcie-enable-h {    
156                         rockchip,pins = <0 RK_    
157                 };                                
158         };                                        
159                                                   
160         usb {                                     
161                 minipcie_enable_h: minipcie-en    
162                         rockchip,pins = <3 RK_    
163                 };                                
164                                                   
165                 ngffpcie_enable_h: ngffpcie-en    
166                         rockchip,pins = <0 RK_    
167                 };                                
168                                                   
169                 vbus_typec_en: vbus_typec_en {    
170                         rockchip,pins = <0 RK_    
171                 };                                
172         };                                        
173 };                                                
174                                                   
175 &pwm1 {                                           
176         status = "okay";                          
177 };                                                
178                                                   
179 &pwm2 {                                           
180         status = "okay";                          
181 };                                                
182                                                   
183 &pwm12 {                                          
184         pinctrl-names = "default";                
185         pinctrl-0 = <&pwm12m1_pins>;              
186         status = "okay";                          
187 };                                                
188                                                   
189 &sata1 {                                          
190         status = "okay";                          
191 };                                                
192                                                   
193 &sdmmc0 {                                         
194         bus-width = <4>;                          
195         cap-sd-highspeed;                         
196         cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_    
197         /* Also used in pcie30x1_clkreqnm0 */     
198         disable-wp;                               
199         pinctrl-names = "default";                
200         pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk     
201         sd-uhs-sdr104;                            
202         vmmc-supply = <&vcc3v3_sd>;               
203         vqmmc-supply = <&vccio_sd>;               
204         status = "okay";                          
205 };                                                
206                                                   
207 &usb_host0_ehci {                                 
208         status = "okay";                          
209 };                                                
210                                                   
211 &usb_host0_ohci {                                 
212         status = "okay";                          
213 };                                                
214                                                   
215 &usb_host0_xhci {                                 
216         status = "okay";                          
217 };                                                
218                                                   
219 &usb_host1_ehci {                                 
220         status = "okay";                          
221 };                                                
222                                                   
223 &usb_host1_ohci {                                 
224         status = "okay";                          
225 };                                                
226                                                   
227 &usb2phy0_otg {                                   
228         phy-supply = <&vbus_typec>;               
229         status = "okay";                          
230 };                                                
231                                                   
232 &usb2phy1_host {                                  
233         phy-supply = <&vcc3v3_minipcie>;          
234         status = "okay";                          
235 };                                                
236                                                   
237 &usb2phy1_otg {                                   
238         phy-supply = <&vcc3v3_ngff>;              
239         status = "okay";                          
240 };                                                
                                                      

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