1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2024 Radxa Limited
4 * Copyright (c) 2024 Heiko Stuebner <heiko@snt
5 */
6
7 /dts-v1/;
8
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include "dt-bindings/usb/pd.h"
15 #include "rk3588.dtsi"
16
17 / {
18 model = "Radxa ROCK 5 ITX";
19 compatible = "radxa,rock-5-itx", "rock
20
21 aliases {
22 mmc0 = &sdhci;
23 mmc1 = &sdmmc;
24 mmc2 = &sdio;
25 };
26
27 chosen {
28 stdout-path = "serial2:1500000
29 };
30
31 adc_keys: adc-keys {
32 compatible = "adc-keys";
33 io-channels = <&saradc 0>;
34 io-channel-names = "buttons";
35 keyup-threshold-microvolt = <1
36 poll-interval = <100>;
37
38 button-maskrom {
39 label = "Mask Rom";
40 linux,code = <KEY_SETU
41 press-threshold-microv
42 };
43 };
44
45 analog-sound {
46 compatible = "audio-graph-card
47 label = "rk3588-es8316";
48 dais = <&i2s0_8ch_p0>;
49 hp-det-gpio = <&gpio1 RK_PD5 G
50 pinctrl-names = "default";
51 pinctrl-0 = <&hp_detect>;
52 routing = "MIC2", "Mic Jack",
53 "Headphones", "HPOL"
54 "Headphones", "HPOR"
55 widgets = "Microphone", "Mic J
56 "Headphone", "Headph
57 };
58
59 gpio-leds {
60 compatible = "gpio-leds";
61 pinctrl-names = "default";
62 pinctrl-0 = <&led_pins>;
63
64 power-led1 {
65 gpios = <&gpio0 RK_PB7
66 linux,default-trigger
67 };
68
69 hdd-led2 {
70 gpios = <&gpio0 RK_PC0
71 linux,default-trigger
72 };
73 };
74
75 fan0: pwm-fan {
76 compatible = "pwm-fan";
77 #cooling-cells = <2>;
78 cooling-levels = <0 64 128 192
79 fan-supply = <&vcc12v_dcin>;
80 pwms = <&pwm14 0 10000 0>;
81 };
82
83 /* M.2 E-KEY */
84 sdio_pwrseq: sdio-pwrseq {
85 compatible = "mmc-pwrseq-simpl
86 clocks = <&hym8563>;
87 clock-names = "ext_clock";
88 pinctrl-names = "default";
89 pinctrl-0 = <&wifi_enable_h>;
90 reset-gpios = <&gpio0 RK_PC4 G
91 };
92
93 typec_vin: regulator-typec-vin {
94 compatible = "regulator-fixed"
95 enable-active-high;
96 gpio = <&gpio1 RK_PB6 GPIO_ACT
97 pinctrl-names = "default";
98 pinctrl-0 = <&vbus5v0_typec_en
99 regulator-name = "typec_vin";
100 regulator-min-microvolt = <500
101 regulator-max-microvolt = <500
102 vin-supply = <&vcc5v0_sys>;
103 };
104
105 vcc12v_dcin: regulator-vcc12v-dcin {
106 compatible = "regulator-fixed"
107 regulator-name = "vcc12v_dcin"
108 regulator-always-on;
109 regulator-boot-on;
110 regulator-min-microvolt = <120
111 regulator-max-microvolt = <120
112 };
113
114 vcc33_io64: regulator-vcc33-io64 {
115 compatible = "regulator-fixed"
116 regulator-name = "vcc33_io64";
117 regulator-always-on;
118 regulator-boot-on;
119 regulator-min-microvolt = <330
120 regulator-max-microvolt = <330
121 vin-supply = <&vcc12v_dcin>;
122 };
123
124 vcc3v3_ekey: regulator-vcc3v3-ekey {
125 compatible = "regulator-fixed"
126 enable-active-high;
127 gpios = <&gpio1 RK_PD2 GPIO_AC
128 pinctrl-names = "default";
129 pinctrl-0 = <&ekey_en>;
130 regulator-name = "vcc3v3_ekey"
131 regulator-always-on;
132 regulator-boot-on;
133 regulator-min-microvolt = <330
134 regulator-max-microvolt = <330
135 startup-delay-us = <50000>;
136 vin-supply = <&vcc5v0_sys>;
137 };
138
139 vcc3v3_lan: vcc3v3_lan_phy2: regulator
140 compatible = "regulator-fixed"
141 regulator-name = "vcc3v3_lan";
142 regulator-always-on;
143 regulator-boot-on;
144 regulator-min-microvolt = <330
145 regulator-max-microvolt = <330
146 vin-supply = <&vcc_3v3_s3>;
147 };
148
149 vcc3v3_mkey: regulator-vcc3v3-mkey {
150 compatible = "regulator-fixed"
151 enable-active-high;
152 gpios = <&gpio1 RK_PA4 GPIO_AC
153 pinctrl-names = "default";
154 pinctrl-0 = <&pcie30x4_pwren_h
155 regulator-name = "vcc3v3_mkey"
156 regulator-min-microvolt = <330
157 regulator-max-microvolt = <330
158 startup-delay-us = <5000>;
159 vin-supply = <&vcc5v0_sys>;
160 };
161
162 vcc3v3_sys: regulator-vcc3v3-sys {
163 compatible = "regulator-fixed"
164 regulator-name = "vcc3v3_sys";
165 regulator-always-on;
166 regulator-boot-on;
167 regulator-min-microvolt = <330
168 regulator-max-microvolt = <330
169 vin-supply = <&vcc12v_dcin>;
170 };
171
172 vcc5v0_sys: regulator-vcc5v0-sys {
173 compatible = "regulator-fixed"
174 regulator-name = "vcc5v0_sys";
175 regulator-always-on;
176 regulator-boot-on;
177 regulator-min-microvolt = <500
178 regulator-max-microvolt = <500
179 vin-supply = <&vcc12v_dcin>;
180 };
181
182 vcc5v0_usb20: vcc5v0_usb12: vcc5v0_usb
183 compatible = "regulator-fixed"
184 enable-active-high;
185 gpio = <&gpio3 RK_PB7 GPIO_ACT
186 pinctrl-names = "default";
187 pinctrl-0 = <&usb_host_pwren_h
188 regulator-name = "vcc5v0_usb";
189 regulator-min-microvolt = <500
190 regulator-max-microvolt = <500
191 vin-supply = <&vcc5v0_sys>;
192 };
193
194 vcc_1v1_nldo_s3: regulator-vcc-1v1-nld
195 compatible = "regulator-fixed"
196 regulator-name = "vcc_1v1_nldo
197 regulator-always-on;
198 regulator-boot-on;
199 regulator-min-microvolt = <110
200 regulator-max-microvolt = <110
201 vin-supply = <&vcc5v0_sys>;
202 };
203 };
204
205 &combphy0_ps {
206 status = "okay";
207 };
208
209 &combphy1_ps {
210 status = "okay";
211 };
212
213 &combphy2_psu {
214 status = "okay";
215 };
216
217 &cpu_b0 {
218 cpu-supply = <&vdd_cpu_big0_s0>;
219 };
220
221 &cpu_b1 {
222 cpu-supply = <&vdd_cpu_big0_s0>;
223 };
224
225 &cpu_b2 {
226 cpu-supply = <&vdd_cpu_big1_s0>;
227 };
228
229 &cpu_b3 {
230 cpu-supply = <&vdd_cpu_big1_s0>;
231 };
232
233 &cpu_l0 {
234 cpu-supply = <&vdd_cpu_lit_s0>;
235 };
236
237 &cpu_l1 {
238 cpu-supply = <&vdd_cpu_lit_s0>;
239 };
240
241 &cpu_l2 {
242 cpu-supply = <&vdd_cpu_lit_s0>;
243 };
244
245 &cpu_l3 {
246 cpu-supply = <&vdd_cpu_lit_s0>;
247 };
248
249 &gpu {
250 mali-supply = <&vdd_gpu_s0>;
251 status = "okay";
252 };
253
254 &i2c0 {
255 pinctrl-names = "default";
256 pinctrl-0 = <&i2c0m2_xfer>;
257 status = "okay";
258
259 vdd_cpu_big0_s0: regulator@42 {
260 compatible = "rockchip,rk8602"
261 reg = <0x42>;
262 fcs,suspend-voltage-selector =
263 regulator-name = "vdd_cpu_big0
264 regulator-always-on;
265 regulator-boot-on;
266 regulator-min-microvolt = <550
267 regulator-max-microvolt = <105
268 regulator-ramp-delay = <2300>;
269 vin-supply = <&vcc5v0_sys>;
270
271 regulator-state-mem {
272 regulator-off-in-suspe
273 };
274 };
275
276 vdd_cpu_big1_s0: regulator@43 {
277 compatible = "rockchip,rk8603"
278 reg = <0x43>;
279 fcs,suspend-voltage-selector =
280 regulator-name = "vdd_cpu_big1
281 regulator-always-on;
282 regulator-boot-on;
283 regulator-min-microvolt = <550
284 regulator-max-microvolt = <105
285 regulator-ramp-delay = <2300>;
286 vin-supply = <&vcc5v0_sys>;
287
288 regulator-state-mem {
289 regulator-off-in-suspe
290 };
291 };
292 };
293
294 &i2c1 {
295 pinctrl-names = "default";
296 pinctrl-0 = <&i2c1m2_xfer>;
297 status = "okay";
298
299 vdd_npu_s0: regulator@42 {
300 compatible = "rockchip,rk8602"
301 reg = <0x42>;
302 fcs,suspend-voltage-selector =
303 regulator-name = "vdd_npu_s0";
304 regulator-always-on;
305 regulator-boot-on;
306 regulator-min-microvolt = <550
307 regulator-max-microvolt = <950
308 regulator-ramp-delay = <2300>;
309 vin-supply = <&vcc5v0_sys>;
310
311 regulator-state-mem {
312 regulator-off-in-suspe
313 };
314 };
315 };
316
317 /* CAM0 connector */
318 &i2c3 {
319 pinctrl-names = "default";
320 pinctrl-0 = <&i2c3m0_xfer>;
321 };
322
323 /* M.2 E-key */
324 &i2c4 {
325 pinctrl-names = "default";
326 pinctrl-0 = <&i2c4m1_xfer>;
327 };
328
329 /* RTC and LCD0 connector */
330 &i2c6 {
331 pinctrl-names = "default";
332 pinctrl-0 = <&i2c6m0_xfer>;
333 status = "okay";
334
335 hym8563: rtc@51 {
336 compatible = "haoyu,hym8563";
337 reg = <0x51>;
338 #clock-cells = <0>;
339 clock-output-names = "wifi_32k
340 interrupt-parent = <&gpio0>;
341 interrupts = <RK_PB0 IRQ_TYPE_
342 pinctrl-names = "default";
343 pinctrl-0 = <&rtc_int>;
344 };
345 };
346
347 /* Audio codec and CAM1 connector */
348 &i2c7 {
349 pinctrl-names = "default";
350 pinctrl-0 = <&i2c7m0_xfer>;
351 status = "okay";
352
353 es8316: audio-codec@11 {
354 compatible = "everest,es8316";
355 reg = <0x11>;
356 assigned-clocks = <&cru I2S0_8
357 assigned-clock-rates = <122880
358 clocks = <&cru I2S0_8CH_MCLKOU
359 clock-names = "mclk";
360 #sound-dai-cells = <0>;
361
362 port {
363 es8316_p0_0: endpoint
364 remote-endpoin
365 };
366 };
367 };
368 };
369
370 /* FUSB302 and LCD1 connector */
371 &i2c8 {
372 pinctrl-names = "default";
373 pinctrl-0 = <&i2c8m4_xfer>;
374 status = "okay";
375
376 usbc0: usb-typec@22 {
377 compatible = "fcs,fusb302";
378 reg = <0x22>;
379 interrupt-parent = <&gpio3>;
380 interrupts = <RK_PB4 IRQ_TYPE_
381 pinctrl-names = "default";
382 pinctrl-0 = <&usbc0_int>;
383 vbus-supply = <&typec_vin>;
384
385 usb_con: connector {
386 compatible = "usb-c-co
387 data-role = "dual";
388 label = "USB-C";
389 power-role = "source";
390 source-pdos =
391 <PDO_FIXED(500
392
393 ports {
394 #address-cells
395 #size-cells =
396
397 port@0 {
398 reg =
399
400 usbc0_
401
402 };
403 };
404
405 port@1 {
406 reg =
407
408 usbc0_
409
410 };
411 };
412
413 port@2 {
414 reg =
415
416 dp_alt
417
418 };
419 };
420 };
421 };
422 };
423 };
424
425 &i2c8m4_xfer {
426 rockchip,pins =
427 /* i2c8_scl_m4 */
428 <3 RK_PC2 9 &pcfg_pull_up_drv_
429 /* i2c8_sda_m4 */
430 <3 RK_PC3 9 &pcfg_pull_up_drv_
431 };
432
433 &i2s0_8ch {
434 pinctrl-names = "default";
435 pinctrl-0 = <&i2s0_lrck
436 &i2s0_mclk
437 &i2s0_sclk
438 &i2s0_sdi0
439 &i2s0_sdo0>;
440 status = "okay";
441
442 i2s0_8ch_p0: port {
443 i2s0_8ch_p0_0: endpoint {
444 dai-format = "i2s";
445 mclk-fs = <256>;
446 remote-endpoint = <&es
447 };
448 };
449 };
450
451 &package_thermal {
452 polling-delay = <1000>;
453
454 trips {
455 package_fan0: package-fan0 {
456 hysteresis = <2000>;
457 temperature = <50000>;
458 type = "active";
459 };
460
461 package_fan1: package-fan1 {
462 hysteresis = <2000>;
463 temperature = <65000>;
464 type = "active";
465 };
466 };
467
468 cooling-maps {
469 map0 {
470 cooling-device = <&fan
471 trip = <&package_fan0>
472 };
473 map1 {
474 cooling-device = <&fan
475 trip = <&package_fan1>
476 };
477 };
478 };
479
480 /* M.2 E-key */
481 &pcie2x1l0 {
482 pinctrl-names = "default";
483 pinctrl-0 = <&pcie30x1_0_perstn_m1_l>;
484 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTI
485 vpcie3v3-supply = <&vcc3v3_ekey>;
486 status = "okay";
487 };
488
489 /* RTL8125B_1 */
490 &pcie2x1l1 {
491 pinctrl-names = "default";
492 pinctrl-0 = <&pcie30x1_1_perstn>;
493 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTI
494 vpcie3v3-supply = <&vcc3v3_lan>;
495 status = "okay";
496 };
497
498 /* RTL8125B_2 */
499 &pcie2x1l2 {
500 pinctrl-names = "default";
501 pinctrl-0 = <&pcie20x1_2_perstn>;
502 reset-gpios = <&gpio3 RK_PB0 GPIO_ACTI
503 vpcie3v3-supply = <&vcc3v3_lan_phy2>;
504 status = "okay";
505 };
506
507 &pcie30phy {
508 data-lanes = <1 1 2 2>;
509 /* separate clock lines from the clock
510 rockchip,rx-common-refclk-mode = <0 0
511 status = "okay";
512 };
513
514 /* ASMedia ASM1164 Sata controller */
515 &pcie3x2 {
516 pinctrl-names = "default";
517 pinctrl-0 = <&pcie30x2_perstn_m1_l>;
518 reset-gpios = <&gpio4 RK_PB0 GPIO_ACTI
519 vpcie3v3-supply = <&vcc33_io64>;
520 status = "okay";
521 };
522
523 /* M.2 M.key */
524 &pcie3x4 {
525 num-lanes = <2>;
526 pinctrl-names = "default";
527 pinctrl-0 = <&pcie30x4_perstn_m1_l>;
528 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTI
529 vpcie3v3-supply = <&vcc3v3_mkey>;
530 status = "okay";
531 };
532
533 &pinctrl {
534 hym8563 {
535 rtc_int: rtc-int {
536 rockchip,pins = <0 RK_
537 };
538 };
539
540 leds {
541 led_pins: led-pins {
542 rockchip,pins = <0 RK_
543 <0 RK_
544 };
545 };
546
547 pcie {
548 pcie20x1_2_perstn: pcie20x1-2-
549 rockchip,pins = <3 RK_
550 };
551
552 pcie30x1_0_perstn_m1_l: pcie30
553 rockchip,pins = <4 RK_
554 };
555
556 pcie30x1_1_perstn: pcie30x1-1-
557 rockchip,pins = <4 RK_
558 };
559
560 pcie30x2_perstn_m1_l: pcie30x2
561 rockchip,pins = <4 RK_
562 };
563
564 pcie30x4_perstn_m1_l: pcie30x4
565 rockchip,pins = <4 RK_
566 };
567
568 ekey_en: ekey-en {
569 rockchip,pins = <1 RK_
570 };
571
572 pcie30x4_pwren_h: pcie30x4-pwr
573 rockchip,pins = <1 RK_
574 };
575 };
576
577 sound {
578 hp_detect: hp-detect {
579 rockchip,pins = <1 RK_
580 };
581 };
582
583 usb {
584 usb_host_pwren_h: usb-host-pwr
585 rockchip,pins = <3 RK_
586 };
587
588 vcc5v0_otg_en: vcc5v0-otg-en {
589 rockchip,pins = <2 RK_
590 };
591
592 gl3523_reset: rl3523-reset {
593 rockchip,pins = <3 RK_
594 };
595 };
596
597 usb-typec {
598 usbc0_int: usbc0-int {
599 rockchip,pins = <3 RK_
600 };
601
602 vbus5v0_typec_en: vbus5v0-type
603 rockchip,pins = <1 RK_
604 };
605 };
606
607 hdmirx {
608 hdmirx_det: hdmirx-det {
609 rockchip,pins = <1 RK_
610 };
611 };
612
613 sdio-pwrseq {
614 wifi_enable_h: wifi-enable-h {
615 rockchip,pins = <0 RK_
616 };
617 };
618
619 wireless-wlan {
620 wifi_host_wake_irq: wifi-host-
621 rockchip,pins = <0 RK_
622 };
623 };
624
625 bt {
626 bt_enable_h: bt-enable-h {
627 rockchip,pins = <2 RK_
628 };
629
630 bt_host_wake_l: bt-host-wake-l
631 rockchip,pins = <0 RK_
632 };
633
634 bt_wake_l: bt-wake-l {
635 rockchip,pins = <4 RK_
636 };
637 };
638
639 dp {
640 dp1_hpd: dp1-hpd {
641 rockchip,pins = <3 RK_
642 };
643 };
644 };
645
646 &pwm14 {
647 pinctrl-names = "default";
648 pinctrl-0 = <&pwm14m1_pins>;
649 status = "okay";
650 };
651
652 &saradc {
653 vref-supply = <&avcc_1v8_s0>;
654 status = "okay";
655 };
656
657 &sdhci {
658 bus-width = <8>;
659 max-frequency = <200000000>;
660 mmc-hs400-1_8v;
661 mmc-hs400-enhanced-strobe;
662 mmc-hs200-1_8v;
663 no-sdio;
664 no-sd;
665 non-removable;
666 status = "okay";
667 };
668
669 &sdmmc {
670 bus-width = <4>;
671 cap-mmc-highspeed;
672 cap-sd-highspeed;
673 disable-wp;
674 max-frequency = <200000000>;
675 no-sdio;
676 no-mmc;
677 pinctrl-names = "default";
678 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &s
679 sd-uhs-sdr104;
680 vmmc-supply = <&vcc_3v3_s3>;
681 vqmmc-supply = <&vccio_sd_s0>;
682 status = "okay";
683 };
684
685 /* M.2 E-KEY */
686 &sdio {
687 broken-cd;
688 bus-width = <4>;
689 cap-sdio-irq;
690 keep-power-in-suspend;
691 max-frequency = <150000000>;
692 mmc-pwrseq = <&sdio_pwrseq>;
693 no-sd;
694 no-mmc;
695 non-removable;
696 pinctrl-names = "default";
697 pinctrl-0 = <&sdiom0_pins>;
698 sd-uhs-sdr104;
699 vmmc-supply = <&vcc3v3_ekey>;
700 status = "okay";
701 };
702
703 &sfc {
704 pinctrl-names = "default";
705 pinctrl-0 = <&fspim2_pins>;
706 status = "okay";
707
708 spi_flash: flash@0 {
709 compatible = "jedec,spi-nor";
710 reg = <0x0>;
711 spi-max-frequency = <50000000>
712 spi-rx-bus-width = <4>;
713 spi-tx-bus-width = <1>;
714 };
715 };
716
717 &spi2 {
718 status = "okay";
719 assigned-clocks = <&cru CLK_SPI2>;
720 assigned-clock-rates = <200000000>;
721 num-cs = <1>;
722 pinctrl-names = "default";
723 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>
724
725 pmic@0 {
726 compatible = "rockchip,rk806";
727 reg = <0x0>;
728 gpio-controller;
729 #gpio-cells = <2>;
730 interrupt-parent = <&gpio0>;
731 interrupts = <7 IRQ_TYPE_LEVEL
732 pinctrl-names = "default";
733 pinctrl-0 = <&pmic_pins>, <&rk
734 <&rk806_dvs2_null>
735 spi-max-frequency = <1000000>;
736 system-power-controller;
737
738 vcc1-supply = <&vcc5v0_sys>;
739 vcc2-supply = <&vcc5v0_sys>;
740 vcc3-supply = <&vcc5v0_sys>;
741 vcc4-supply = <&vcc5v0_sys>;
742 vcc5-supply = <&vcc5v0_sys>;
743 vcc6-supply = <&vcc5v0_sys>;
744 vcc7-supply = <&vcc5v0_sys>;
745 vcc8-supply = <&vcc5v0_sys>;
746 vcc9-supply = <&vcc5v0_sys>;
747 vcc10-supply = <&vcc5v0_sys>;
748 vcc11-supply = <&vcc_2v0_pldo_
749 vcc12-supply = <&vcc5v0_sys>;
750 vcc13-supply = <&vcc_1v1_nldo_
751 vcc14-supply = <&vcc_1v1_nldo_
752 vcca-supply = <&vcc5v0_sys>;
753
754 rk806_dvs1_null: dvs1-null-pin
755 pins = "gpio_pwrctrl1"
756 function = "pin_fun0";
757 };
758
759 rk806_dvs2_null: dvs2-null-pin
760 pins = "gpio_pwrctrl2"
761 function = "pin_fun0";
762 };
763
764 rk806_dvs3_null: dvs3-null-pin
765 pins = "gpio_pwrctrl3"
766 function = "pin_fun0";
767 };
768
769 regulators {
770 vdd_gpu_s0: vdd_gpu_me
771 regulator-boot
772 regulator-min-
773 regulator-max-
774 regulator-ramp
775 regulator-name
776 regulator-enab
777
778 regulator-stat
779 regula
780 };
781 };
782
783 vdd_cpu_lit_s0: vdd_cp
784 regulator-alwa
785 regulator-boot
786 regulator-min-
787 regulator-max-
788 regulator-ramp
789 regulator-name
790
791 regulator-stat
792 regula
793 };
794 };
795
796 vdd_log_s0: dcdc-reg3
797 regulator-alwa
798 regulator-boot
799 regulator-min-
800 regulator-max-
801 regulator-ramp
802 regulator-name
803
804 regulator-stat
805 regula
806 regula
807 };
808 };
809
810 vdd_vdenc_s0: vdd_vden
811 regulator-alwa
812 regulator-boot
813 regulator-min-
814 regulator-max-
815 regulator-ramp
816 regulator-name
817
818 regulator-stat
819 regula
820 };
821 };
822
823 vdd_ddr_s0: dcdc-reg5
824 regulator-alwa
825 regulator-boot
826 regulator-min-
827 regulator-max-
828 regulator-ramp
829 regulator-name
830
831 regulator-stat
832 regula
833 regula
834 };
835 };
836
837 vdd2_ddr_s3: dcdc-reg6
838 regulator-alwa
839 regulator-boot
840 regulator-name
841
842 regulator-stat
843 regula
844 };
845 };
846
847 vcc_2v0_pldo_s3: dcdc-
848 regulator-alwa
849 regulator-boot
850 regulator-min-
851 regulator-max-
852 regulator-ramp
853 regulator-name
854
855 regulator-stat
856 regula
857 regula
858 };
859 };
860
861 vcc_3v3_s3: dcdc-reg8
862 regulator-alwa
863 regulator-boot
864 regulator-min-
865 regulator-max-
866 regulator-name
867
868 regulator-stat
869 regula
870 regula
871 };
872 };
873
874 vddq_ddr_s0: dcdc-reg9
875 regulator-alwa
876 regulator-boot
877 regulator-name
878
879 regulator-stat
880 regula
881 };
882 };
883
884 vcc_1v8_s3: dcdc-reg10
885 regulator-alwa
886 regulator-boot
887 regulator-min-
888 regulator-max-
889 regulator-name
890
891 regulator-stat
892 regula
893 regula
894 };
895 };
896
897 avcc_1v8_s0: pldo-reg1
898 regulator-alwa
899 regulator-boot
900 regulator-min-
901 regulator-max-
902 regulator-name
903
904 regulator-stat
905 regula
906 regula
907 };
908 };
909
910 vcc_1v8_s0: pldo-reg2
911 regulator-alwa
912 regulator-boot
913 regulator-min-
914 regulator-max-
915 regulator-name
916
917 regulator-stat
918 regula
919 regula
920 };
921 };
922
923 avdd_1v2_s0: pldo-reg3
924 regulator-alwa
925 regulator-boot
926 regulator-min-
927 regulator-max-
928 regulator-name
929
930 regulator-stat
931 regula
932 };
933 };
934
935 vcc_3v3_s0: pldo-reg4
936 regulator-alwa
937 regulator-boot
938 regulator-min-
939 regulator-max-
940 regulator-ramp
941 regulator-name
942
943 regulator-stat
944 regula
945 regula
946 };
947 };
948
949 vccio_sd_s0: pldo-reg5
950 regulator-alwa
951 regulator-boot
952 regulator-min-
953 regulator-max-
954 regulator-ramp
955 regulator-name
956
957 regulator-stat
958 regula
959 };
960 };
961
962 pldo6_s3: pldo-reg6 {
963 regulator-alwa
964 regulator-boot
965 regulator-min-
966 regulator-max-
967 regulator-name
968
969 regulator-stat
970 regula
971 regula
972 };
973 };
974
975 vdd_0v75_s3: nldo-reg1
976 regulator-alwa
977 regulator-boot
978 regulator-min-
979 regulator-max-
980 regulator-name
981
982 regulator-stat
983 regula
984 regula
985 };
986 };
987
988 vdd_ddr_pll_s0: nldo-r
989 regulator-alwa
990 regulator-boot
991 regulator-min-
992 regulator-max-
993 regulator-name
994
995 regulator-stat
996 regula
997 regula
998 };
999 };
1000
1001 avdd_0v75_s0: nldo-re
1002 regulator-alw
1003 regulator-boo
1004 regulator-min
1005 regulator-max
1006 regulator-nam
1007
1008 regulator-sta
1009 regul
1010 };
1011 };
1012
1013 vdd_0v85_s0: nldo-reg
1014 regulator-alw
1015 regulator-boo
1016 regulator-min
1017 regulator-max
1018 regulator-nam
1019
1020 regulator-sta
1021 regul
1022 regul
1023 };
1024 };
1025
1026 vdd_0v75_s0: nldo-reg
1027 regulator-alw
1028 regulator-boo
1029 regulator-min
1030 regulator-max
1031 regulator-nam
1032
1033 regulator-sta
1034 regul
1035 regul
1036 };
1037 };
1038 };
1039 };
1040 };
1041
1042 &tsadc {
1043 status = "okay";
1044 };
1045
1046 &uart2 {
1047 pinctrl-0 = <&uart2m0_xfer>;
1048 status = "okay";
1049 };
1050
1051 /* Connected to M.2 E-key */
1052 &uart6 {
1053 pinctrl-names = "default";
1054 pinctrl-0 = <&uart6m1_xfer &uart6m1_c
1055 status = "okay";
1056 };
1057
1058 &u2phy0 {
1059 status = "okay";
1060 };
1061
1062 &u2phy0_otg {
1063 status = "okay";
1064 };
1065
1066 &u2phy1 {
1067 status = "okay";
1068 };
1069
1070 &u2phy1_otg {
1071 /* connected to USB3 hub, which is po
1072 phy-supply = <&vcc5v0_usb12>;
1073 status = "okay";
1074 };
1075
1076 &u2phy2 {
1077 status = "okay";
1078 };
1079
1080 &u2phy2_host {
1081 /* connected to USB2 hub, which is po
1082 phy-supply = <&vcc5v0_usb20>;
1083 status = "okay";
1084 };
1085
1086 &u2phy3 {
1087 status = "okay";
1088 };
1089
1090 &u2phy3_host {
1091 phy-supply = <&vcc5v0_usb20>;
1092 status = "okay";
1093 };
1094
1095 &usb_host0_ehci {
1096 status = "okay";
1097 };
1098
1099 &usb_host0_ohci {
1100 status = "okay";
1101 };
1102
1103 &usb_host1_ehci {
1104 status = "okay";
1105 };
1106
1107 &usb_host1_ohci {
1108 status = "okay";
1109 };
1110
1111 &usb_host0_xhci {
1112 usb-role-switch;
1113 status = "okay";
1114
1115 port {
1116 #address-cells = <1>;
1117 #size-cells = <0>;
1118
1119 dwc3_0_role_switch: endpoint@
1120 reg = <0>;
1121 remote-endpoint = <&u
1122 };
1123 };
1124 };
1125
1126 &usb_host1_xhci {
1127 dr_mode = "host";
1128 #address-cells = <1>;
1129 #size-cells = <0>;
1130 status = "okay";
1131
1132 /* 2.0 hub on port 1 */
1133 hub_2_0: hub@1 {
1134 compatible = "usb5e3,610";
1135 reg = <1>;
1136 peer-hub = <&hub_3_0>;
1137 vdd-supply = <&vcc_3v3_s3>;
1138 };
1139
1140 /* 3.0 hub on port 4 */
1141 hub_3_0: hub@2 {
1142 compatible = "usb5e3,620";
1143 reg = <2>;
1144 peer-hub = <&hub_2_0>;
1145 pinctrl-names = "default";
1146 pinctrl-0 = <&gl3523_reset>;
1147 reset-gpios = <&gpio3 RK_PB1
1148 vdd-supply = <&vcc_3v3_s3>;
1149 };
1150 };
1151
1152 &usbdp_phy0 {
1153 mode-switch;
1154 orientation-switch;
1155 sbu1-dc-gpios = <&gpio4 RK_PB7 GPIO_A
1156 sbu2-dc-gpios = <&gpio4 RK_PC0 GPIO_A
1157 status = "okay";
1158
1159 port {
1160 #address-cells = <1>;
1161 #size-cells = <0>;
1162 usbdp_phy0_orientation_switch
1163 reg = <0>;
1164 remote-endpoint = <&u
1165 };
1166
1167 usbdp_phy0_dp_altmode_mux: en
1168 reg = <1>;
1169 remote-endpoint = <&d
1170 };
1171 };
1172 };
1173
1174 &usbdp_phy1 {
1175 rockchip,dp-lane-mux = <2 3>;
1176 status = "okay";
1177 };
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