1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2022 Rockchip Electronics Co.
4 *
5 */
6
7 #include "rk3588-extra.dtsi"
8
9 / {
10 cluster0_opp_table: opp-table-cluster0
11 compatible = "operating-points
12 opp-shared;
13
14 opp-1416000000 {
15 opp-hz = /bits/ 64 <14
16 opp-microvolt = <75000
17 clock-latency-ns = <40
18 opp-suspend;
19 };
20 opp-1608000000 {
21 opp-hz = /bits/ 64 <16
22 opp-microvolt = <88750
23 clock-latency-ns = <40
24 };
25 opp-1704000000 {
26 opp-hz = /bits/ 64 <17
27 opp-microvolt = <93750
28 clock-latency-ns = <40
29 };
30 };
31
32 cluster1_opp_table: opp-table-cluster1
33 compatible = "operating-points
34 opp-shared;
35
36 opp-1416000000 {
37 opp-hz = /bits/ 64 <14
38 opp-microvolt = <75000
39 clock-latency-ns = <40
40 };
41 opp-1608000000 {
42 opp-hz = /bits/ 64 <16
43 opp-microvolt = <78750
44 clock-latency-ns = <40
45 };
46 opp-1800000000 {
47 opp-hz = /bits/ 64 <18
48 opp-microvolt = <87500
49 clock-latency-ns = <40
50 };
51 opp-2016000000 {
52 opp-hz = /bits/ 64 <20
53 opp-microvolt = <95000
54 clock-latency-ns = <40
55 };
56 };
57
58 cluster2_opp_table: opp-table-cluster2
59 compatible = "operating-points
60 opp-shared;
61
62 opp-1416000000 {
63 opp-hz = /bits/ 64 <14
64 opp-microvolt = <75000
65 clock-latency-ns = <40
66 };
67 opp-1608000000 {
68 opp-hz = /bits/ 64 <16
69 opp-microvolt = <78750
70 clock-latency-ns = <40
71 };
72 opp-1800000000 {
73 opp-hz = /bits/ 64 <18
74 opp-microvolt = <87500
75 clock-latency-ns = <40
76 };
77 opp-2016000000 {
78 opp-hz = /bits/ 64 <20
79 opp-microvolt = <95000
80 clock-latency-ns = <40
81 };
82 };
83
84 gpu_opp_table: opp-table {
85 compatible = "operating-points
86
87 opp-300000000 {
88 opp-hz = /bits/ 64 <30
89 opp-microvolt = <75000
90 };
91 opp-400000000 {
92 opp-hz = /bits/ 64 <40
93 opp-microvolt = <75000
94 };
95 opp-500000000 {
96 opp-hz = /bits/ 64 <50
97 opp-microvolt = <75000
98 };
99 opp-600000000 {
100 opp-hz = /bits/ 64 <60
101 opp-microvolt = <75000
102 };
103 opp-700000000 {
104 opp-hz = /bits/ 64 <70
105 opp-microvolt = <75000
106 };
107 opp-850000000 {
108 opp-hz = /bits/ 64 <80
109 opp-microvolt = <78750
110 };
111 };
112 };
113
114 &cpu_b0 {
115 operating-points-v2 = <&cluster1_opp_t
116 };
117
118 &cpu_b1 {
119 operating-points-v2 = <&cluster1_opp_t
120 };
121
122 &cpu_b2 {
123 operating-points-v2 = <&cluster2_opp_t
124 };
125
126 &cpu_b3 {
127 operating-points-v2 = <&cluster2_opp_t
128 };
129
130 &cpu_l0 {
131 operating-points-v2 = <&cluster0_opp_t
132 };
133
134 &cpu_l1 {
135 operating-points-v2 = <&cluster0_opp_t
136 };
137
138 &cpu_l2 {
139 operating-points-v2 = <&cluster0_opp_t
140 };
141
142 &cpu_l3 {
143 operating-points-v2 = <&cluster0_opp_t
144 };
145
146 &gpu {
147 operating-points-v2 = <&gpu_opp_table>
148 };
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