1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/usb/pd.h>
10 #include "rk3588s.dtsi"
11
12 / {
13 model = "Xunlong Orange Pi 5";
14 compatible = "xunlong,orangepi-5", "ro
15
16 aliases {
17 ethernet0 = &gmac1;
18 mmc0 = &sdmmc;
19 };
20
21 chosen {
22 stdout-path = "serial2:1500000
23 };
24
25 adc-keys {
26 compatible = "adc-keys";
27 io-channels = <&saradc 1>;
28 io-channel-names = "buttons";
29 keyup-threshold-microvolt = <1
30 poll-interval = <100>;
31
32 button-recovery {
33 label = "Recovery";
34 linux,code = <KEY_VEND
35 press-threshold-microv
36 };
37 };
38
39 leds {
40 compatible = "gpio-leds";
41 pinctrl-names = "default";
42 pinctrl-0 = <&leds_gpio>;
43
44 led-1 {
45 gpios = <&gpio1 RK_PA2
46 label = "status_led";
47 linux,default-trigger
48 };
49 };
50
51 vbus_typec: vbus-typec-regulator {
52 compatible = "regulator-fixed"
53 enable-active-high;
54 gpio = <&gpio3 RK_PC0 GPIO_ACT
55 pinctrl-names = "default";
56 pinctrl-0 = <&typec5v_pwren>;
57 regulator-name = "vbus_typec";
58 regulator-min-microvolt = <500
59 regulator-max-microvolt = <500
60 vin-supply = <&vcc5v0_sys>;
61 };
62
63 vcc5v0_sys: vcc5v0-sys-regulator {
64 compatible = "regulator-fixed"
65 regulator-name = "vcc5v0_sys";
66 regulator-always-on;
67 regulator-boot-on;
68 regulator-min-microvolt = <500
69 regulator-max-microvolt = <500
70 };
71
72 vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator
73 compatible = "regulator-fixed"
74 enable-active-low;
75 gpios = <&gpio4 RK_PB5 GPIO_AC
76 regulator-name = "vcc_3v3_sd_s
77 regulator-boot-on;
78 regulator-min-microvolt = <330
79 regulator-max-microvolt = <330
80 vin-supply = <&vcc_3v3_s3>;
81 };
82
83 vcc3v3_pcie20: vcc3v3-pcie20-regulator
84 compatible = "regulator-fixed"
85 enable-active-high;
86 gpios = <&gpio0 RK_PC5 GPIO_AC
87 regulator-name = "vcc3v3_pcie2
88 regulator-boot-on;
89 regulator-min-microvolt = <180
90 regulator-max-microvolt = <180
91 startup-delay-us = <50000>;
92 vin-supply = <&vcc5v0_sys>;
93 };
94 };
95
96 &combphy0_ps {
97 status = "okay";
98 };
99
100 &combphy2_psu {
101 status = "okay";
102 };
103
104 &cpu_b0 {
105 cpu-supply = <&vdd_cpu_big0_s0>;
106 };
107
108 &cpu_b1 {
109 cpu-supply = <&vdd_cpu_big0_s0>;
110 };
111
112 &cpu_b2 {
113 cpu-supply = <&vdd_cpu_big1_s0>;
114 };
115
116 &cpu_b3 {
117 cpu-supply = <&vdd_cpu_big1_s0>;
118 };
119
120 &cpu_l0 {
121 cpu-supply = <&vdd_cpu_lit_s0>;
122 };
123
124 &cpu_l1 {
125 cpu-supply = <&vdd_cpu_lit_s0>;
126 };
127
128 &cpu_l2 {
129 cpu-supply = <&vdd_cpu_lit_s0>;
130 };
131
132 &cpu_l3 {
133 cpu-supply = <&vdd_cpu_lit_s0>;
134 };
135
136 &gmac1 {
137 clock_in_out = "output";
138 phy-handle = <&rgmii_phy1>;
139 phy-mode = "rgmii-rxid";
140 pinctrl-0 = <&gmac1_miim
141 &gmac1_tx_bus2
142 &gmac1_rx_bus2
143 &gmac1_rgmii_clk
144 &gmac1_rgmii_bus>;
145 pinctrl-names = "default";
146 tx_delay = <0x42>;
147 status = "okay";
148 };
149
150 &gpu {
151 mali-supply = <&vdd_gpu_s0>;
152 status = "okay";
153 };
154
155 &i2c0 {
156 pinctrl-names = "default";
157 pinctrl-0 = <&i2c0m2_xfer>;
158 status = "okay";
159
160 vdd_cpu_big0_s0: regulator@42 {
161 compatible = "rockchip,rk8602"
162 reg = <0x42>;
163 fcs,suspend-voltage-selector =
164 regulator-name = "vdd_cpu_big0
165 regulator-always-on;
166 regulator-boot-on;
167 regulator-min-microvolt = <550
168 regulator-max-microvolt = <105
169 regulator-ramp-delay = <2300>;
170 vin-supply = <&vcc5v0_sys>;
171
172 regulator-state-mem {
173 regulator-off-in-suspe
174 };
175 };
176
177 vdd_cpu_big1_s0: regulator@43 {
178 compatible = "rockchip,rk8603"
179 reg = <0x43>;
180 fcs,suspend-voltage-selector =
181 regulator-name = "vdd_cpu_big1
182 regulator-always-on;
183 regulator-boot-on;
184 regulator-min-microvolt = <550
185 regulator-max-microvolt = <105
186 regulator-ramp-delay = <2300>;
187 vin-supply = <&vcc5v0_sys>;
188
189 regulator-state-mem {
190 regulator-off-in-suspe
191 };
192 };
193 };
194
195 &i2c2 {
196 status = "okay";
197
198 vdd_npu_s0: regulator@42 {
199 compatible = "rockchip,rk8602"
200 reg = <0x42>;
201 fcs,suspend-voltage-selector =
202 regulator-name = "vdd_npu_s0";
203 regulator-always-on;
204 regulator-boot-on;
205 regulator-min-microvolt = <550
206 regulator-max-microvolt = <950
207 regulator-ramp-delay = <2300>;
208 vin-supply = <&vcc5v0_sys>;
209
210 regulator-state-mem {
211 regulator-off-in-suspe
212 };
213 };
214 };
215
216 &i2c6 {
217 pinctrl-names = "default";
218 pinctrl-0 = <&i2c6m3_xfer>;
219 status = "okay";
220
221 usbc0: usb-typec@22 {
222 compatible = "fcs,fusb302";
223 reg = <0x22>;
224 interrupt-parent = <&gpio0>;
225 interrupts = <RK_PD3 IRQ_TYPE_
226 pinctrl-names = "default";
227 pinctrl-0 = <&usbc0_int>;
228 vbus-supply = <&vbus_typec>;
229 status = "okay";
230
231 usb_con: connector {
232 compatible = "usb-c-co
233 label = "USB-C";
234 data-role = "dual";
235 op-sink-microwatt = <1
236 power-role = "dual";
237 sink-pdos =
238 <PDO_FIXED(500
239 source-pdos =
240 <PDO_FIXED(500
241 try-power-role = "sour
242
243 ports {
244 #address-cells
245 #size-cells =
246
247 port@0 {
248 reg =
249 usbc0_
250
251 };
252 };
253
254 port@1 {
255 reg =
256 usbc0_
257
258 };
259 };
260
261 port@2 {
262 reg =
263 usbc0_
264
265 };
266 };
267 };
268 };
269 };
270
271 hym8563: rtc@51 {
272 compatible = "haoyu,hym8563";
273 reg = <0x51>;
274 #clock-cells = <0>;
275 clock-output-names = "hym8563"
276 pinctrl-names = "default";
277 pinctrl-0 = <&hym8563_int>;
278 interrupt-parent = <&gpio0>;
279 interrupts = <RK_PB0 IRQ_TYPE_
280 wakeup-source;
281 };
282 };
283
284 &mdio1 {
285 rgmii_phy1: ethernet-phy@1 {
286 compatible = "ethernet-phy-iee
287 reg = <0x1>;
288 reset-assert-us = <20000>;
289 reset-deassert-us = <100000>;
290 reset-gpios = <&gpio3 RK_PB2 G
291 };
292 };
293
294 &pcie2x1l2 {
295 reset-gpios = <&gpio3 RK_PD1 GPIO_ACTI
296 vpcie3v3-supply = <&vcc3v3_pcie20>;
297 status = "okay";
298 };
299
300 &pinctrl {
301 gpio-func {
302 leds_gpio: leds-gpio {
303 rockchip,pins = <0 RK_
304 };
305 };
306
307 hym8563 {
308 hym8563_int: hym8563-int {
309 rockchip,pins = <0 RK_
310 };
311 };
312
313 usb-typec {
314 usbc0_int: usbc0-int {
315 rockchip,pins = <0 RK_
316 };
317
318 typec5v_pwren: typec5v-pwren {
319 rockchip,pins = <3 RK_
320 };
321 };
322 };
323
324 &saradc {
325 vref-supply = <&avcc_1v8_s0>;
326 status = "okay";
327 };
328
329 &sdmmc {
330 bus-width = <4>;
331 cap-sd-highspeed;
332 disable-wp;
333 max-frequency = <150000000>;
334 no-mmc;
335 no-sdio;
336 sd-uhs-sdr104;
337 vmmc-supply = <&vcc_3v3_sd_s0>;
338 vqmmc-supply = <&vccio_sd_s0>;
339 status = "okay";
340 };
341
342 &sfc {
343 pinctrl-names = "default";
344 pinctrl-0 = <&fspim0_pins>;
345 status = "okay";
346
347 flash@0 {
348 compatible = "jedec,spi-nor";
349 reg = <0x0>;
350 spi-max-frequency = <100000000
351 spi-rx-bus-width = <4>;
352 spi-tx-bus-width = <1>;
353 };
354 };
355
356 &spi2 {
357 status = "okay";
358 assigned-clocks = <&cru CLK_SPI2>;
359 assigned-clock-rates = <200000000>;
360 num-cs = <1>;
361 pinctrl-names = "default";
362 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>
363
364 pmic@0 {
365 compatible = "rockchip,rk806";
366 reg = <0x0>;
367 interrupt-parent = <&gpio0>;
368 interrupts = <7 IRQ_TYPE_LEVEL
369 pinctrl-names = "default";
370 pinctrl-0 = <&pmic_pins>, <&rk
371 <&rk806_dvs2_n
372 spi-max-frequency = <1000000>;
373 system-power-controller;
374
375 vcc1-supply = <&vcc5v0_sys>;
376 vcc2-supply = <&vcc5v0_sys>;
377 vcc3-supply = <&vcc5v0_sys>;
378 vcc4-supply = <&vcc5v0_sys>;
379 vcc5-supply = <&vcc5v0_sys>;
380 vcc6-supply = <&vcc5v0_sys>;
381 vcc7-supply = <&vcc5v0_sys>;
382 vcc8-supply = <&vcc5v0_sys>;
383 vcc9-supply = <&vcc5v0_sys>;
384 vcc10-supply = <&vcc5v0_sys>;
385 vcc11-supply = <&vcc_2v0_pldo_
386 vcc12-supply = <&vcc5v0_sys>;
387 vcc13-supply = <&vcc_1v1_nldo_
388 vcc14-supply = <&vcc_1v1_nldo_
389 vcca-supply = <&vcc5v0_sys>;
390
391 gpio-controller;
392 #gpio-cells = <2>;
393
394 rk806_dvs1_null: dvs1-null-pin
395 pins = "gpio_pwrctrl1"
396 function = "pin_fun0";
397 };
398
399 rk806_dvs2_null: dvs2-null-pin
400 pins = "gpio_pwrctrl2"
401 function = "pin_fun0";
402 };
403
404 rk806_dvs3_null: dvs3-null-pin
405 pins = "gpio_pwrctrl3"
406 function = "pin_fun0";
407 };
408
409 regulators {
410 vdd_gpu_s0: dcdc-reg1
411 regulator-name
412 regulator-boot
413 regulator-min-
414 regulator-max-
415 regulator-ramp
416 regulator-enab
417
418 regulator-stat
419 regula
420 };
421 };
422
423 vdd_cpu_lit_s0: dcdc-r
424 regulator-name
425 regulator-alwa
426 regulator-boot
427 regulator-min-
428 regulator-max-
429 regulator-ramp
430
431 regulator-stat
432 regula
433 };
434 };
435
436 vdd_log_s0: dcdc-reg3
437 regulator-name
438 regulator-alwa
439 regulator-boot
440 regulator-min-
441 regulator-max-
442 regulator-ramp
443
444 regulator-stat
445 regula
446 regula
447 };
448 };
449
450 vdd_vdenc_s0: dcdc-reg
451 regulator-name
452 regulator-alwa
453 regulator-boot
454 regulator-min-
455 regulator-max-
456 regulator-ramp
457
458 regulator-stat
459 regula
460 };
461 };
462
463 vdd_ddr_s0: dcdc-reg5
464 regulator-name
465 regulator-alwa
466 regulator-boot
467 regulator-min-
468 regulator-max-
469 regulator-ramp
470
471 regulator-stat
472 regula
473 regula
474 };
475 };
476
477 vcc_1v1_nldo_s3: vdd2_
478 regulator-name
479 regulator-alwa
480 regulator-boot
481 regulator-max-
482 regulator-min-
483
484 regulator-stat
485 regula
486 };
487 };
488
489 vcc_2v0_pldo_s3: dcdc-
490 regulator-name
491 regulator-alwa
492 regulator-boot
493 regulator-min-
494 regulator-max-
495 regulator-ramp
496
497 regulator-stat
498 regula
499 regula
500 };
501 };
502
503 vcc_3v3_s3: dcdc-reg8
504 regulator-name
505 regulator-alwa
506 regulator-boot
507 regulator-min-
508 regulator-max-
509
510 regulator-stat
511 regula
512 regula
513 };
514 };
515
516 vddq_ddr_s0: dcdc-reg9
517 regulator-name
518 regulator-alwa
519 regulator-boot
520
521 regulator-stat
522 regula
523 };
524 };
525
526 vcc_1v8_s3: dcdc-reg10
527 regulator-name
528 regulator-alwa
529 regulator-boot
530 regulator-min-
531 regulator-max-
532
533 regulator-stat
534 regula
535 regula
536 };
537 };
538
539 avcc_1v8_s0: pldo-reg1
540 regulator-name
541 regulator-alwa
542 regulator-boot
543 regulator-min-
544 regulator-max-
545
546 regulator-stat
547 regula
548 };
549 };
550
551 vcc_1v8_s0: pldo-reg2
552 regulator-name
553 regulator-alwa
554 regulator-boot
555 regulator-min-
556 regulator-max-
557
558 regulator-stat
559 regula
560 regula
561 };
562 };
563
564 avdd_1v2_s0: pldo-reg3
565 regulator-name
566 regulator-alwa
567 regulator-boot
568 regulator-min-
569 regulator-max-
570
571 regulator-stat
572 regula
573 };
574 };
575
576 vcc_3v3_s0: pldo-reg4
577 regulator-name
578 regulator-alwa
579 regulator-boot
580 regulator-min-
581 regulator-max-
582 regulator-ramp
583
584 regulator-stat
585 regula
586 };
587 };
588
589 vccio_sd_s0: pldo-reg5
590 regulator-name
591 regulator-alwa
592 regulator-boot
593 regulator-min-
594 regulator-max-
595 regulator-ramp
596
597 regulator-stat
598 regula
599 };
600 };
601
602 pldo6_s3: pldo-reg6 {
603 regulator-name
604 regulator-alwa
605 regulator-boot
606 regulator-min-
607 regulator-max-
608
609 regulator-stat
610 regula
611 regula
612 };
613 };
614
615 vdd_0v75_s3: nldo-reg1
616 regulator-name
617 regulator-alwa
618 regulator-boot
619 regulator-min-
620 regulator-max-
621
622 regulator-stat
623 regula
624 regula
625 };
626 };
627
628 vdd_ddr_pll_s0: nldo-r
629 regulator-name
630 regulator-alwa
631 regulator-boot
632 regulator-min-
633 regulator-max-
634
635 regulator-stat
636 regula
637 regula
638 };
639 };
640
641 avdd_0v75_s0: nldo-reg
642 regulator-name
643 regulator-alwa
644 regulator-boot
645 regulator-min-
646 regulator-max-
647
648 regulator-stat
649 regula
650 };
651 };
652
653 vdd_0v85_s0: nldo-reg4
654 regulator-name
655 regulator-alwa
656 regulator-boot
657 regulator-min-
658 regulator-max-
659
660 regulator-stat
661 regula
662 };
663 };
664
665 vdd_0v75_s0: nldo-reg5
666 regulator-name
667 regulator-alwa
668 regulator-boot
669 regulator-min-
670 regulator-max-
671
672 regulator-stat
673 regula
674 };
675 };
676 };
677 };
678 };
679
680 &tsadc {
681 status = "okay";
682 };
683
684 &u2phy0 {
685 status = "okay";
686 };
687
688 &u2phy0_otg {
689 status = "okay";
690 };
691
692 &u2phy2 {
693 status = "okay";
694 };
695
696 &u2phy2_host {
697 status = "okay";
698 };
699
700 &u2phy3 {
701 status = "okay";
702 };
703
704 &u2phy3_host {
705 status = "okay";
706 };
707
708 &uart2 {
709 pinctrl-0 = <&uart2m0_xfer>;
710 status = "okay";
711 };
712
713 &usbdp_phy0 {
714 mode-switch;
715 orientation-switch;
716 sbu1-dc-gpios = <&gpio4 RK_PA5 GPIO_AC
717 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_AC
718 status = "okay";
719
720 port {
721 #address-cells = <1>;
722 #size-cells = <0>;
723
724 usbdp_phy0_typec_ss: endpoint@
725 reg = <0>;
726 remote-endpoint = <&us
727 };
728
729 usbdp_phy0_typec_sbu: endpoint
730 reg = <1>;
731 remote-endpoint = <&us
732 };
733 };
734 };
735
736 &usb_host0_ehci {
737 status = "okay";
738 };
739
740 &usb_host0_ohci {
741 status = "okay";
742 };
743
744 &usb_host0_xhci {
745 dr_mode = "otg";
746 usb-role-switch;
747 status = "okay";
748
749 port {
750 usb_host0_xhci_drd_sw: endpoin
751 remote-endpoint = <&us
752 };
753 };
754 };
755
756 &usb_host1_ehci {
757 status = "okay";
758 };
759
760 &usb_host1_ohci {
761 status = "okay";
762 };
763
764 &usb_host2_xhci {
765 status = "okay";
766 };
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