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Linux/arch/arm64/boot/dts/ti/k3-am62.dtsi

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Diff markup

Differences between /arch/arm64/boot/dts/ti/k3-am62.dtsi (Version linux-6.12-rc7) and /arch/i386/boot/dts/ti/k3-am62.dtsi (Version linux-4.4.302)


  1 // SPDX-License-Identifier: GPL-2.0-only OR MI    
  2 /*                                                
  3  * Device Tree Source for AM62 SoC Family         
  4  *                                                
  5  * Copyright (C) 2020-2024 Texas Instruments I    
  6  */                                               
  7                                                   
  8 #include <dt-bindings/gpio/gpio.h>                
  9 #include <dt-bindings/interrupt-controller/irq    
 10 #include <dt-bindings/interrupt-controller/arm    
 11 #include <dt-bindings/soc/ti,sci_pm_domain.h>     
 12                                                   
 13 #include "k3-pinctrl.h"                           
 14                                                   
 15 / {                                               
 16         model = "Texas Instruments K3 AM625 So    
 17         compatible = "ti,am625";                  
 18         interrupt-parent = <&gic500>;             
 19         #address-cells = <2>;                     
 20         #size-cells = <2>;                        
 21                                                   
 22         chosen { };                               
 23                                                   
 24         firmware {                                
 25                 optee {                           
 26                         compatible = "linaro,o    
 27                         method = "smc";           
 28                 };                                
 29                                                   
 30                 psci: psci {                      
 31                         compatible = "arm,psci    
 32                         method = "smc";           
 33                 };                                
 34         };                                        
 35                                                   
 36         a53_timer0: timer-cl0-cpu0 {              
 37                 compatible = "arm,armv8-timer"    
 38                 interrupts = <GIC_PPI 13 IRQ_T    
 39                              <GIC_PPI 14 IRQ_T    
 40                              <GIC_PPI 11 IRQ_T    
 41                              <GIC_PPI 10 IRQ_T    
 42         };                                        
 43                                                   
 44         pmu: pmu {                                
 45                 compatible = "arm,cortex-a53-p    
 46                 interrupts = <GIC_PPI 7 IRQ_TY    
 47         };                                        
 48                                                   
 49         cbass_main: bus@f0000 {                   
 50                 bootph-all;                       
 51                 compatible = "simple-bus";        
 52                 #address-cells = <2>;             
 53                 #size-cells = <2>;                
 54                                                   
 55                 ranges = <0x00 0x000f0000 0x00    
 56                          <0x00 0x00420000 0x00    
 57                          <0x00 0x00600000 0x00    
 58                          <0x00 0x00703000 0x00    
 59                          <0x00 0x0070c000 0x00    
 60                          <0x00 0x00a40000 0x00    
 61                          <0x00 0x01000000 0x00    
 62                          <0x00 0x08000000 0x00    
 63                          <0x00 0x0e000000 0x00    
 64                          <0x00 0x0fd00000 0x00    
 65                          <0x00 0x20000000 0x00    
 66                          <0x00 0x30040000 0x00    
 67                          <0x00 0x30101000 0x00    
 68                          <0x00 0x30200000 0x00    
 69                          <0x00 0x31000000 0x00    
 70                          <0x00 0x31100000 0x00    
 71                          <0x00 0x3b000000 0x00    
 72                          <0x00 0x40900000 0x00    
 73                          <0x00 0x43600000 0x00    
 74                          <0x00 0x44043000 0x00    
 75                          <0x00 0x44860000 0x00    
 76                          <0x00 0x48000000 0x00    
 77                          <0x00 0x50000000 0x00    
 78                          <0x00 0x60000000 0x00    
 79                          <0x00 0x70000000 0x00    
 80                          <0x01 0x00000000 0x01    
 81                          <0x05 0x00000000 0x05    
 82                                                   
 83                          /* MCU Domain Range *    
 84                          <0x00 0x04000000 0x00    
 85                                                   
 86                          /* Wakeup Domain Rang    
 87                          <0x00 0x00b00000 0x00    
 88                          <0x00 0x2b000000 0x00    
 89                          <0x00 0x43000000 0x00    
 90                                                   
 91                 cbass_mcu: bus@4000000 {          
 92                         bootph-all;               
 93                         compatible = "simple-b    
 94                         #address-cells = <2>;     
 95                         #size-cells = <2>;        
 96                         ranges = <0x00 0x04000    
 97                 };                                
 98                                                   
 99                 cbass_wakeup: bus@b00000 {        
100                         bootph-all;               
101                         compatible = "simple-b    
102                         #address-cells = <2>;     
103                         #size-cells = <2>;        
104                         ranges = <0x00 0x00b00    
105                                  <0x00 0x2b000    
106                                  <0x00 0x43000    
107                 };                                
108         };                                        
109                                                   
110         dss_vp1_clk: clock-divider-oldi {         
111                 compatible = "fixed-factor-clo    
112                 clocks = <&k3_clks 186 0>;        
113                 #clock-cells = <0>;               
114                 clock-div = <7>;                  
115                 clock-mult = <1>;                 
116         };                                        
117                                                   
118         #include "k3-am62-thermal.dtsi"           
119 };                                                
120                                                   
121 /* Now include the peripherals for each bus se    
122 #include "k3-am62-main.dtsi"                      
123 #include "k3-am62-mcu.dtsi"                       
124 #include "k3-am62-wakeup.dtsi"                    
                                                      

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