1 // SPDX-License-Identifier: GPL-2.0-only OR MI 2 /** 3 * DT overlay for HSE NAND expansion card on A 4 * 5 * Copyright (C) 2021-2024 Texas Instruments I 6 */ 7 8 /dts-v1/; 9 /plugin/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq 12 #include "k3-pinctrl.h" 13 14 &main_pmx0 { 15 gpmc0_default_pins: gpmc0-default-pins 16 bootph-all; 17 pinctrl-single,pins = < 18 AM64X_IOPAD(0x0094, PI 19 AM64X_IOPAD(0x003c, PI 20 AM64X_IOPAD(0x0040, PI 21 AM64X_IOPAD(0x0064, PI 22 AM64X_IOPAD(0x0068, PI 23 AM64X_IOPAD(0x006c, PI 24 AM64X_IOPAD(0x0070, PI 25 AM64X_IOPAD(0x0074, PI 26 AM64X_IOPAD(0x0078, PI 27 AM64X_IOPAD(0x0044, PI 28 AM64X_IOPAD(0x0048, PI 29 AM64X_IOPAD(0x004c, PI 30 AM64X_IOPAD(0x0050, PI 31 AM64X_IOPAD(0x0054, PI 32 AM64X_IOPAD(0x0058, PI 33 AM64X_IOPAD(0x005c, PI 34 AM64X_IOPAD(0x0060, PI 35 AM64X_IOPAD(0x0098, PI 36 AM64X_IOPAD(0x009c, PI 37 AM64X_IOPAD(0x00a8, PI 38 AM64X_IOPAD(0x00ac, PI 39 AM64X_IOPAD(0x00b0, PI 40 AM64X_IOPAD(0x00b4, PI 41 AM64X_IOPAD(0x007c, PI 42 AM64X_IOPAD(0x0084, PI 43 AM64X_IOPAD(0x0088, PI 44 AM64X_IOPAD(0x008c, PI 45 AM64X_IOPAD(0x0090, PI 46 AM64X_IOPAD(0x00a0, PI 47 AM64X_IOPAD(0x00a4, PI 48 >; 49 }; 50 }; 51 52 &main_gpio0 { 53 gpmc0-hog { 54 bootph-all; 55 gpio-hog; 56 gpios = <36 0>; 57 input; 58 line-name = "GPMC0_MUX_DIR"; 59 }; 60 }; 61 62 &elm0 { 63 bootph-all; 64 status = "okay"; 65 }; 66 67 &gpmc0 { 68 status = "okay"; 69 pinctrl-names = "default"; 70 pinctrl-0 = <&gpmc0_default_pins>; 71 #address-cells = <2>; 72 #size-cells = <1>; 73 74 nand@0,0 { 75 compatible = "ti,am64-nand"; 76 reg = <0 0 64>; /* dev 77 interrupt-parent = <&gpmc0>; 78 interrupts = <0 IRQ_TYPE_NONE> 79 <1 IRQ_TYPE_NONE> 80 rb-gpios = <&gpmc0 0 GPIO_ACTI 81 ti,nand-xfer-type = "prefetch- 82 ti,nand-ecc-opt = "bch8"; 83 ti,elm-id = <&elm0>; 84 nand-bus-width = <8>; 85 gpmc,device-width = <1>; 86 gpmc,sync-clk-ps = <0>; 87 gpmc,cs-on-ns = <0>; 88 gpmc,cs-rd-off-ns = <40>; 89 gpmc,cs-wr-off-ns = <40>; 90 gpmc,adv-on-ns = <0>; 91 gpmc,adv-rd-off-ns = <25>; 92 gpmc,adv-wr-off-ns = <25>; 93 gpmc,we-on-ns = <0>; 94 gpmc,we-off-ns = <20>; 95 gpmc,oe-on-ns = <3>; 96 gpmc,oe-off-ns = <30>; 97 gpmc,access-ns = <30>; 98 gpmc,rd-cycle-ns = <40>; 99 gpmc,wr-cycle-ns = <40>; 100 gpmc,bus-turnaround-ns = <0>; 101 gpmc,cycle2cycle-delay-ns = <0 102 gpmc,clk-activation-ns = <0>; 103 gpmc,wr-access-ns = <40>; 104 gpmc,wr-data-mux-bus-ns = <0>; 105 106 partitions { 107 compatible = "fixed-pa 108 #address-cells = <1>; 109 #size-cells = <1>; 110 111 partition@0 { 112 bootph-all; 113 label = "NAND. 114 reg = <0x00000 115 }; 116 partition@200000 { 117 bootph-all; 118 label = "NAND. 119 reg = <0x00200 120 }; 121 partition@400000 { 122 bootph-all; 123 label = "NAND. 124 reg = <0x00400 125 }; 126 partition@600000 { 127 bootph-all; 128 label = "NAND. 129 reg = <0x00600 130 }; 131 partition@a00000 { 132 bootph-all; 133 label = "NAND. 134 reg = <0x00a00 135 }; 136 partition@a40000 { 137 bootph-all; 138 label = "NAND. 139 reg = <0x00a40 140 }; 141 partition@a80000 { 142 bootph-all; 143 label = "NAND. 144 reg = <0x00a80 145 }; 146 }; 147 }; 148 };
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