1 /* SPDX-License-Identifier: GPL-2.0-only */ !! 1 /* $Id: entry.S,v 1.170 2001/11/13 00:57:05 davem Exp $
2 /* !! 2 * arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
3 * Low-level exception handling code <<
4 * 3 *
5 * Copyright (C) 2012 ARM Ltd. !! 4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
6 * Authors: Catalin Marinas <catalin.marina !! 5 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
7 * Will Deacon <will.deacon@arm.co !! 6 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
>> 7 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
>> 8 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
8 */ 9 */
9 10
10 #include <linux/arm-smccc.h> !! 11 #include <linux/config.h>
11 #include <linux/init.h> !! 12 #include <linux/errno.h>
12 #include <linux/linkage.h> !! 13
13 !! 14 #include <asm/head.h>
14 #include <asm/alternative.h> !! 15 #include <asm/asi.h>
15 #include <asm/assembler.h> !! 16 #include <asm/smp.h>
16 #include <asm/asm-offsets.h> !! 17 #include <asm/kgdb.h>
17 #include <asm/asm_pointer_auth.h> !! 18 #include <asm/contregs.h>
18 #include <asm/bug.h> <<
19 #include <asm/cpufeature.h> <<
20 #include <asm/errno.h> <<
21 #include <asm/esr.h> <<
22 #include <asm/irq.h> <<
23 #include <asm/memory.h> <<
24 #include <asm/mmu.h> <<
25 #include <asm/processor.h> <<
26 #include <asm/ptrace.h> 19 #include <asm/ptrace.h>
27 #include <asm/scs.h> !! 20 #include <asm/psr.h>
28 #include <asm/thread_info.h> !! 21 #include <asm/cprefix.h>
29 #include <asm/asm-uaccess.h> !! 22 #include <asm/vaddrs.h>
30 #include <asm/unistd.h> !! 23 #include <asm/memreg.h>
31 !! 24 #include <asm/page.h>
32 .macro clear_gp_regs !! 25 #ifdef CONFIG_SUN4
33 .irp n,0,1,2,3,4,5,6,7,8,9,10,11,12 !! 26 #include <asm/pgtsun4.h>
34 mov x\n, xzr !! 27 #else
35 .endr !! 28 #include <asm/pgtsun4c.h>
36 .endm !! 29 #endif
37 !! 30 #include <asm/winmacro.h>
38 .macro kernel_ventry, el:req, ht:req, !! 31 #include <asm/signal.h>
39 .align 7 !! 32 #include <asm/obio.h>
40 .Lventry_start\@: !! 33 #include <asm/mxcc.h>
41 .if \el == 0 <<
42 /* <<
43 * This must be the first instruction <<
44 * skipped by the trampoline vectors, <<
45 */ <<
46 b .Lskip_tramp_vectors_cleanup\@ <<
47 .if \regsize == 64 <<
48 mrs x30, tpidrro_el0 <<
49 msr tpidrro_el0, xzr <<
50 .else <<
51 mov x30, xzr <<
52 .endif <<
53 .Lskip_tramp_vectors_cleanup\@: <<
54 .endif <<
55 34
56 sub sp, sp, #PT_REGS_SIZE !! 35 #include <asm/asmmacro.h>
57 #ifdef CONFIG_VMAP_STACK <<
58 /* <<
59 * Test whether the SP has overflowed, <<
60 * Task and IRQ stacks are aligned so <<
61 * should always be zero. <<
62 */ <<
63 add sp, sp, x0 <<
64 sub x0, sp, x0 <<
65 tbnz x0, #THREAD_SHIFT, 0f <<
66 sub x0, sp, x0 <<
67 sub sp, sp, x0 <<
68 b el\el\ht\()_\regsize\()_\label <<
69 36
70 0: !! 37 #define curptr g6
71 /* <<
72 * Either we've just detected an overf <<
73 * while on the overflow stack. Either <<
74 * userspace, and can clobber EL0 regi <<
75 */ <<
76 38
77 /* Stash the original SP (minus PT_REG !! 39 #define NR_SYSCALLS 256 /* Each OS is different... */
78 msr tpidr_el0, x0 <<
79 40
80 /* Recover the original x0 value and s !! 41 /* These are just handy. */
81 sub x0, sp, x0 !! 42 #define _SV save %sp, -STACKFRAME_SZ, %sp
82 msr tpidrro_el0, x0 !! 43 #define _RS restore
83 44
84 /* Switch to the overflow stack */ !! 45 #define FLUSH_ALL_KERNEL_WINDOWS \
85 adr_this_cpu sp, overflow_stack + OVER !! 46 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
>> 47 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
86 48
87 /* !! 49 /* First, KGDB low level things. This is a rewrite
88 * Check whether we were already on th !! 50 * of the routines found in the sparc-stub.c asm() statement
89 * after panic() re-enables interrupts !! 51 * from the gdb distribution. This is also dual-purpose
90 */ !! 52 * as a software trap for userlevel programs.
91 mrs x0, tpidr_el0 !! 53 */
92 sub x0, sp, x0 !! 54 .data
93 tst x0, #~(OVERFLOW_STACK_SIZE - 1 !! 55 .align 4
94 b.ne __bad_stack <<
95 <<
96 /* We were already on the overflow sta <<
97 sub sp, sp, x0 <<
98 mrs x0, tpidrro_el0 <<
99 #endif <<
100 b el\el\ht\()_\regsize\()_\label <<
101 .org .Lventry_start\@ + 128 // Did we over <<
102 .endm <<
103 <<
104 .macro tramp_alias, dst, sym <<
105 .set .Lalias\@, TRAMP_VALIAS + \sym <<
106 movz \dst, :abs_g2_s:.Lalias\@ <<
107 movk \dst, :abs_g1_nc:.Lalias\@ <<
108 movk \dst, :abs_g0_nc:.Lalias\@ <<
109 .endm <<
110 56
111 /* !! 57 in_trap_handler:
112 * This macro corrupts x0-x3. It is th !! 58 .word 0
113 * them if required. !! 59
114 */ !! 60 .text
115 .macro apply_ssbd, state, tmp1, tmp2 !! 61 .align 4
116 alternative_cb ARM64_ALWAYS_SYSTEM, spectre_v !! 62
117 b .L__asm_ssbd_skip\@ !! 63 ! This function is called when any SPARC trap (except window overflow or
118 alternative_cb_end !! 64 ! underflow) occurs. It makes sure that the invalid register window is still
119 ldr_this_cpu \tmp2, arm64_ssbd_call !! 65 ! available before jumping into C code. It will also restore the world if you
120 cbz \tmp2, .L__asm_ssbd_skip\@ !! 66 ! return from handle_exception.
121 ldr \tmp2, [tsk, #TSK_TI_FLAGS] !! 67
122 tbnz \tmp2, #TIF_SSBD, .L__asm_ssbd !! 68 .globl C_LABEL(trap_low)
123 mov w0, #ARM_SMCCC_ARCH_WORKAROUND !! 69 C_LABEL(trap_low):
124 mov w1, #\state !! 70 rd %wim, %l3
125 alternative_cb ARM64_ALWAYS_SYSTEM, smccc_pat !! 71 SAVE_ALL
126 nop !! 72
127 alternative_cb_end !! 73 sethi %hi(in_trap_handler), %l4
128 .L__asm_ssbd_skip\@: !! 74 ld [%lo(in_trap_handler) + %l4], %l5
129 .endm !! 75 inc %l5
130 !! 76 st %l5, [%lo(in_trap_handler) + %l4]
131 /* Check for MTE asynchronous tag chec !! 77
132 .macro check_mte_async_tcf, tmp, ti_fl !! 78 /* Make sure kgdb sees the same state we just saved. */
133 #ifdef CONFIG_ARM64_MTE !! 79 LOAD_PT_GLOBALS(sp)
134 .arch_extension lse !! 80 LOAD_PT_INS(sp)
135 alternative_if_not ARM64_MTE !! 81 ld [%sp + STACKFRAME_SZ + PT_Y], %l4
136 b 1f !! 82 ld [%sp + STACKFRAME_SZ + PT_WIM], %l3
137 alternative_else_nop_endif !! 83 ld [%sp + STACKFRAME_SZ + PT_PSR], %l0
138 /* !! 84 ld [%sp + STACKFRAME_SZ + PT_PC], %l1
139 * Asynchronous tag check faults are o !! 85 ld [%sp + STACKFRAME_SZ + PT_NPC], %l2
140 * ASYM (3) modes. In each of these mo !! 86 rd %tbr, %l5 /* Never changes... */
141 * set, so skip the check if it is uns !! 87
142 */ !! 88 /* Make kgdb exception frame. */
143 tbz \thread_sctlr, #(SCTLR_EL1_TCF !! 89 sub %sp,(16+1+6+1+72)*4,%sp ! Make room for input & locals
144 mrs_s \tmp, SYS_TFSRE0_EL1 !! 90 ! + hidden arg + arg spill
145 tbz \tmp, #SYS_TFSR_EL1_TF0_SHIFT, !! 91 ! + doubleword alignment
146 /* Asynchronous TCF occurred for TTBR0 !! 92 ! + registers[72] local var
147 mov \tmp, #_TIF_MTE_ASYNC_FAULT !! 93 SAVE_KGDB_GLOBALS(sp)
148 add \ti_flags, tsk, #TSK_TI_FLAGS !! 94 SAVE_KGDB_INS(sp)
149 stset \tmp, [\ti_flags] !! 95 SAVE_KGDB_SREGS(sp, l4, l0, l3, l5, l1, l2)
150 1: !! 96
151 #endif !! 97 /* We are increasing PIL, so two writes. */
152 .endm !! 98 or %l0, PSR_PIL, %l0
>> 99 wr %l0, 0, %psr
>> 100 WRITE_PAUSE
>> 101 wr %l0, PSR_ET, %psr
>> 102 WRITE_PAUSE
>> 103
>> 104 call C_LABEL(handle_exception)
>> 105 add %sp, STACKFRAME_SZ, %o0 ! Pass address of registers
>> 106
>> 107 /* Load new kgdb register set. */
>> 108 LOAD_KGDB_GLOBALS(sp)
>> 109 LOAD_KGDB_INS(sp)
>> 110 LOAD_KGDB_SREGS(sp, l4, l0, l3, l5, l1, l2)
>> 111 wr %l4, 0x0, %y
>> 112
>> 113 sethi %hi(in_trap_handler), %l4
>> 114 ld [%lo(in_trap_handler) + %l4], %l5
>> 115 dec %l5
>> 116 st %l5, [%lo(in_trap_handler) + %l4]
>> 117
>> 118 add %sp,(16+1+6+1+72)*4,%sp ! Undo the kgdb trap frame.
>> 119
>> 120 /* Now take what kgdb did and place it into the pt_regs
>> 121 * frame which SparcLinux RESTORE_ALL understands.,
>> 122 */
>> 123 STORE_PT_INS(sp)
>> 124 STORE_PT_GLOBALS(sp)
>> 125 STORE_PT_YREG(sp, g2)
>> 126 STORE_PT_PRIV(sp, l0, l1, l2)
>> 127
>> 128 RESTORE_ALL
>> 129
>> 130
>> 131 #ifdef CONFIG_BLK_DEV_FD
>> 132 .text
>> 133 .align 4
>> 134 .globl C_LABEL(floppy_hardint)
>> 135 C_LABEL(floppy_hardint):
>> 136 /*
>> 137 * This code cannot touch registers %l0 %l1 and %l2
>> 138 * because SAVE_ALL depends on their values. It depends
>> 139 * on %l3 also, but we regenerate it before a call.
>> 140 * Other registers are:
>> 141 * %l3 -- base address of fdc registers
>> 142 * %l4 -- pdma_vaddr
>> 143 * %l5 -- scratch for ld/st address
>> 144 * %l6 -- pdma_size
>> 145 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
>> 146 */
>> 147
>> 148 /* Do we have work to do? */
>> 149 sethi %hi(C_LABEL(doing_pdma)), %l7
>> 150 ld [%l7 + %lo(C_LABEL(doing_pdma))], %l7
>> 151 cmp %l7, 0
>> 152 be floppy_dosoftint
>> 153 nop
>> 154
>> 155 /* Load fdc register base */
>> 156 sethi %hi(C_LABEL(fdc_status)), %l3
>> 157 ld [%l3 + %lo(C_LABEL(fdc_status))], %l3
>> 158
>> 159 /* Setup register addresses */
>> 160 sethi %hi(C_LABEL(pdma_vaddr)), %l5 ! transfer buffer
>> 161 ld [%l5 + %lo(C_LABEL(pdma_vaddr))], %l4
>> 162 sethi %hi(C_LABEL(pdma_size)), %l5 ! bytes to go
>> 163 ld [%l5 + %lo(C_LABEL(pdma_size))], %l6
>> 164 next_byte:
>> 165 ldub [%l3], %l7
>> 166
>> 167 andcc %l7, 0x80, %g0 ! Does fifo still have data
>> 168 bz floppy_fifo_emptied ! fifo has been emptied...
>> 169 andcc %l7, 0x20, %g0 ! in non-dma mode still?
>> 170 bz floppy_overrun ! nope, overrun
>> 171 andcc %l7, 0x40, %g0 ! 0=write 1=read
>> 172 bz floppy_write
>> 173 sub %l6, 0x1, %l6
>> 174
>> 175 /* Ok, actually read this byte */
>> 176 ldub [%l3 + 1], %l7
>> 177 orcc %g0, %l6, %g0
>> 178 stb %l7, [%l4]
>> 179 bne next_byte
>> 180 add %l4, 0x1, %l4
>> 181
>> 182 b floppy_tdone
>> 183 nop
>> 184
>> 185 floppy_write:
>> 186 /* Ok, actually write this byte */
>> 187 ldub [%l4], %l7
>> 188 orcc %g0, %l6, %g0
>> 189 stb %l7, [%l3 + 1]
>> 190 bne next_byte
>> 191 add %l4, 0x1, %l4
>> 192
>> 193 /* fall through... */
>> 194 floppy_tdone:
>> 195 sethi %hi(C_LABEL(pdma_vaddr)), %l5
>> 196 st %l4, [%l5 + %lo(C_LABEL(pdma_vaddr))]
>> 197 sethi %hi(C_LABEL(pdma_size)), %l5
>> 198 st %l6, [%l5 + %lo(C_LABEL(pdma_size))]
>> 199 /* Flip terminal count pin */
>> 200 set C_LABEL(auxio_register), %l7
>> 201 ld [%l7], %l7
>> 202
>> 203 set C_LABEL(sparc_cpu_model), %l5
>> 204 ld [%l5], %l5
>> 205 subcc %l5, 1, %g0 /* enum { sun4c = 1 }; */
>> 206 be 1f
>> 207 ldub [%l7], %l5
>> 208
>> 209 or %l5, 0xc2, %l5
>> 210 stb %l5, [%l7]
>> 211 andn %l5, 0x02, %l5
>> 212 b 2f
>> 213 nop
153 214
154 /* Clear the MTE asynchronous tag chec <<
155 .macro clear_mte_async_tcf thread_sctl <<
156 #ifdef CONFIG_ARM64_MTE <<
157 alternative_if ARM64_MTE <<
158 /* See comment in check_mte_async_tcf <<
159 tbz \thread_sctlr, #(SCTLR_EL1_TCF <<
160 dsb ish <<
161 msr_s SYS_TFSRE0_EL1, xzr <<
162 1: 215 1:
163 alternative_else_nop_endif !! 216 or %l5, 0xf4, %l5
164 #endif !! 217 stb %l5, [%l7]
165 .endm !! 218 andn %l5, 0x04, %l5
166 219
167 .macro mte_set_gcr, mte_ctrl, tmp !! 220 2:
168 #ifdef CONFIG_ARM64_MTE !! 221 /* Kill some time so the bits set */
169 ubfx \tmp, \mte_ctrl, #MTE_CTRL_GCR !! 222 WRITE_PAUSE
170 orr \tmp, \tmp, #SYS_GCR_EL1_RRND !! 223 WRITE_PAUSE
171 msr_s SYS_GCR_EL1, \tmp !! 224
172 #endif !! 225 stb %l5, [%l7]
173 .endm !! 226
>> 227 /* Prevent recursion */
>> 228 sethi %hi(C_LABEL(doing_pdma)), %l7
>> 229 b floppy_dosoftint
>> 230 st %g0, [%l7 + %lo(C_LABEL(doing_pdma))]
>> 231
>> 232 /* We emptied the FIFO, but we haven't read everything
>> 233 * as of yet. Store the current transfer address and
>> 234 * bytes left to read so we can continue when the next
>> 235 * fast IRQ comes in.
>> 236 */
>> 237 floppy_fifo_emptied:
>> 238 sethi %hi(C_LABEL(pdma_vaddr)), %l5
>> 239 st %l4, [%l5 + %lo(C_LABEL(pdma_vaddr))]
>> 240 sethi %hi(C_LABEL(pdma_size)), %l7
>> 241 st %l6, [%l7 + %lo(C_LABEL(pdma_size))]
>> 242
>> 243 /* Restore condition codes */
>> 244 wr %l0, 0x0, %psr
>> 245 WRITE_PAUSE
>> 246
>> 247 jmp %l1
>> 248 rett %l2
>> 249
>> 250 floppy_overrun:
>> 251 sethi %hi(C_LABEL(pdma_vaddr)), %l5
>> 252 st %l4, [%l5 + %lo(C_LABEL(pdma_vaddr))]
>> 253 sethi %hi(C_LABEL(pdma_size)), %l5
>> 254 st %l6, [%l5 + %lo(C_LABEL(pdma_size))]
>> 255 /* Prevent recursion */
>> 256 sethi %hi(C_LABEL(doing_pdma)), %l7
>> 257 st %g0, [%l7 + %lo(C_LABEL(doing_pdma))]
>> 258
>> 259 /* fall through... */
>> 260 floppy_dosoftint:
>> 261 rd %wim, %l3
>> 262 SAVE_ALL
>> 263
>> 264 /* Set all IRQs off. */
>> 265 or %l0, PSR_PIL, %l4
>> 266 wr %l4, 0x0, %psr
>> 267 WRITE_PAUSE
>> 268 wr %l4, PSR_ET, %psr
>> 269 WRITE_PAUSE
>> 270
>> 271 mov 11, %o0 ! floppy irq level (unused anyway)
>> 272 mov %g0, %o1 ! devid is not used in fast interrupts
>> 273 call C_LABEL(sparc_floppy_irq)
>> 274 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
>> 275
>> 276 RESTORE_ALL
>> 277
>> 278 #endif /* (CONFIG_BLK_DEV_FD) */
>> 279
>> 280 /* Bad trap handler */
>> 281 .globl bad_trap_handler
>> 282 bad_trap_handler:
>> 283 SAVE_ALL
>> 284
>> 285 wr %l0, PSR_ET, %psr
>> 286 WRITE_PAUSE
>> 287
>> 288 mov %l7, %o0 ! trap number
>> 289 mov %l0, %o1 ! psr
>> 290 call C_LABEL(do_hw_interrupt)
>> 291 mov %l1, %o2 ! pc
>> 292
>> 293 RESTORE_ALL
>> 294
>> 295 /* For now all IRQ's not registered get sent here. handler_irq() will
>> 296 * see if a routine is registered to handle this interrupt and if not
>> 297 * it will say so on the console.
>> 298 */
174 299
175 .macro mte_set_kernel_gcr, tmp, tmp2 !! 300 .align 4
176 #ifdef CONFIG_KASAN_HW_TAGS !! 301 .globl real_irq_entry, patch_handler_irq
177 alternative_cb ARM64_ALWAYS_SYSTEM, kasan_hw_ !! 302 real_irq_entry:
178 b 1f !! 303 SAVE_ALL
179 alternative_cb_end !! 304
180 mov \tmp, KERNEL_GCR_EL1 !! 305 #ifdef CONFIG_SMP
181 msr_s SYS_GCR_EL1, \tmp !! 306 .globl patchme_maybe_smp_msg
>> 307
>> 308 cmp %l7, 12
>> 309 patchme_maybe_smp_msg:
>> 310 bgu maybe_smp4m_msg
>> 311 nop
>> 312 #endif
>> 313
>> 314 real_irq_continue:
>> 315 or %l0, PSR_PIL, %g2
>> 316 wr %g2, 0x0, %psr
>> 317 WRITE_PAUSE
>> 318 wr %g2, PSR_ET, %psr
>> 319 WRITE_PAUSE
>> 320 mov %l7, %o0 ! irq level
>> 321 patch_handler_irq:
>> 322 call C_LABEL(handler_irq)
>> 323 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
>> 324 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
>> 325 wr %g2, PSR_ET, %psr ! keep ET up
>> 326 WRITE_PAUSE
>> 327
>> 328 RESTORE_ALL
>> 329
>> 330 #ifdef CONFIG_SMP
>> 331 /* SMP per-cpu ticker interrupts are handled specially. */
>> 332 smp4m_ticker:
>> 333 bne real_irq_continue+4
>> 334 or %l0, PSR_PIL, %g2
>> 335 wr %g2, 0x0, %psr
>> 336 WRITE_PAUSE
>> 337 wr %g2, PSR_ET, %psr
>> 338 WRITE_PAUSE
>> 339 call C_LABEL(smp4m_percpu_timer_interrupt)
>> 340 add %sp, STACKFRAME_SZ, %o0
>> 341 wr %l0, PSR_ET, %psr
>> 342 WRITE_PAUSE
>> 343 RESTORE_ALL
>> 344
>> 345 /* Here is where we check for possible SMP IPI passed to us
>> 346 * on some level other than 15 which is the NMI and only used
>> 347 * for cross calls. That has a separate entry point below.
>> 348 */
>> 349 maybe_smp4m_msg:
>> 350 GET_PROCESSOR_MID(o3, o2)
>> 351 set C_LABEL(sun4m_interrupts), %l5
>> 352 ld [%l5], %o5
>> 353 sethi %hi(0x60000000), %o4
>> 354 sll %o3, 12, %o3
>> 355 ld [%o5 + %o3], %o1
>> 356 andcc %o1, %o4, %g0
>> 357 be,a smp4m_ticker
>> 358 cmp %l7, 14
>> 359 cmp %l7, 13
>> 360 add %o5, %o3, %o5
>> 361 bne,a 1f
>> 362 sethi %hi(0x40000000), %o2
>> 363 sethi %hi(0x20000000), %o2
>> 364 1:
>> 365 st %o2, [%o5 + 0x4]
>> 366 WRITE_PAUSE
>> 367 ld [%o5], %g0
>> 368 WRITE_PAUSE
>> 369 or %l0, PSR_PIL, %l4
>> 370 wr %l4, 0x0, %psr
>> 371 WRITE_PAUSE
>> 372 wr %l4, PSR_ET, %psr
>> 373 WRITE_PAUSE
>> 374 cmp %l7, 13
>> 375 bne 2f
>> 376 nop
>> 377 call C_LABEL(smp_reschedule_irq)
>> 378 add %o7, 8, %o7
>> 379 2:
>> 380 call C_LABEL(smp_stop_cpu_irq)
>> 381 nop
>> 382 RESTORE_ALL
>> 383
>> 384 .align 4
>> 385 .globl linux_trap_ipi15_sun4m
>> 386 linux_trap_ipi15_sun4m:
>> 387 SAVE_ALL
>> 388 sethi %hi(0x80000000), %o2
>> 389 GET_PROCESSOR_MID(o0, o1)
>> 390 set C_LABEL(sun4m_interrupts), %l5
>> 391 ld [%l5], %o5
>> 392 sll %o0, 12, %o0
>> 393 add %o5, %o0, %o5
>> 394 ld [%o5], %o3
>> 395 andcc %o3, %o2, %g0
>> 396 be 1f ! Must be an NMI async memory error
>> 397 st %o2, [%o5 + 4]
>> 398 WRITE_PAUSE
>> 399 ld [%o5], %g0
>> 400 WRITE_PAUSE
>> 401 or %l0, PSR_PIL, %l4
>> 402 wr %l4, 0x0, %psr
>> 403 WRITE_PAUSE
>> 404 wr %l4, PSR_ET, %psr
>> 405 WRITE_PAUSE
>> 406 call C_LABEL(smp4m_cross_call_irq)
>> 407 nop
>> 408 b ret_trap_lockless_ipi
>> 409 clr %l6
182 1: 410 1:
>> 411 /* NMI async memory error handling. */
>> 412 sethi %hi(0x80000000), %l4
>> 413 sethi %hi(0x4000), %o3
>> 414 sub %o5, %o0, %o5
>> 415 add %o5, %o3, %l5
>> 416 st %l4, [%l5 + 0xc]
>> 417 WRITE_PAUSE
>> 418 ld [%l5], %g0
>> 419 WRITE_PAUSE
>> 420 or %l0, PSR_PIL, %l4
>> 421 wr %l4, 0x0, %psr
>> 422 WRITE_PAUSE
>> 423 wr %l4, PSR_ET, %psr
>> 424 WRITE_PAUSE
>> 425 call C_LABEL(sun4m_nmi)
>> 426 nop
>> 427 st %l4, [%l5 + 0x8]
>> 428 WRITE_PAUSE
>> 429 ld [%l5], %g0
>> 430 WRITE_PAUSE
>> 431 RESTORE_ALL
>> 432
>> 433 .globl smp4d_ticker
>> 434 /* SMP per-cpu ticker interrupts are handled specially. */
>> 435 smp4d_ticker:
>> 436 SAVE_ALL
>> 437 or %l0, PSR_PIL, %g2
>> 438 sethi %hi(CC_ICLR), %o0
>> 439 sethi %hi(1 << 14), %o1
>> 440 or %o0, %lo(CC_ICLR), %o0
>> 441 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
>> 442 wr %g2, 0x0, %psr
>> 443 WRITE_PAUSE
>> 444 wr %g2, PSR_ET, %psr
>> 445 WRITE_PAUSE
>> 446 call C_LABEL(smp4d_percpu_timer_interrupt)
>> 447 add %sp, STACKFRAME_SZ, %o0
>> 448 wr %l0, PSR_ET, %psr
>> 449 WRITE_PAUSE
>> 450 RESTORE_ALL
>> 451
>> 452 .align 4
>> 453 .globl linux_trap_ipi15_sun4d
>> 454 linux_trap_ipi15_sun4d:
>> 455 SAVE_ALL
>> 456 sethi %hi(CC_BASE), %o4
>> 457 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
>> 458 or %o4, (CC_EREG - CC_BASE), %o0
>> 459 ldda [%o0] ASI_M_MXCC, %o0
>> 460 andcc %o0, %o2, %g0
>> 461 bne 1f
>> 462 sethi %hi(BB_STAT2), %o2
>> 463 lduba [%o2] ASI_M_CTL, %o2
>> 464 andcc %o2, BB_STAT2_MASK, %g0
>> 465 bne 2f
>> 466 or %o4, (CC_ICLR - CC_BASE), %o0
>> 467 sethi %hi(1 << 15), %o1
>> 468 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
>> 469 or %l0, PSR_PIL, %l4
>> 470 wr %l4, 0x0, %psr
>> 471 WRITE_PAUSE
>> 472 wr %l4, PSR_ET, %psr
>> 473 WRITE_PAUSE
>> 474 call C_LABEL(smp4d_cross_call_irq)
>> 475 nop
>> 476 b ret_trap_lockless_ipi
>> 477 clr %l6
>> 478
>> 479 1: /* MXCC error */
>> 480 2: /* BB error */
>> 481 /* Disable PIL 15 */
>> 482 set CC_IMSK, %l4
>> 483 lduha [%l4] ASI_M_MXCC, %l5
>> 484 sethi %hi(1 << 15), %l7
>> 485 or %l5, %l7, %l5
>> 486 stha %l5, [%l4] ASI_M_MXCC
>> 487 /* FIXME */
>> 488 1: b,a 1b
>> 489
>> 490 #endif /* CONFIG_SMP */
>> 491
>> 492 /* This routine handles illegal instructions and privileged
>> 493 * instruction attempts from user code.
>> 494 */
>> 495 .align 4
>> 496 .globl bad_instruction
>> 497 bad_instruction:
>> 498 sethi %hi(0xc1f80000), %l4
>> 499 ld [%l1], %l5
>> 500 sethi %hi(0x81d80000), %l7
>> 501 and %l5, %l4, %l5
>> 502 cmp %l5, %l7
>> 503 be 1f
>> 504 SAVE_ALL
>> 505
>> 506 wr %l0, PSR_ET, %psr ! re-enable traps
>> 507 WRITE_PAUSE
>> 508
>> 509 add %sp, STACKFRAME_SZ, %o0
>> 510 mov %l1, %o1
>> 511 mov %l2, %o2
>> 512 call C_LABEL(do_illegal_instruction)
>> 513 mov %l0, %o3
>> 514
>> 515 RESTORE_ALL
>> 516
>> 517 1: /* unimplemented flush - just skip */
>> 518 jmpl %l2, %g0
>> 519 rett %l2 + 4
>> 520
>> 521 .align 4
>> 522 .globl priv_instruction
>> 523 priv_instruction:
>> 524 SAVE_ALL
>> 525
>> 526 wr %l0, PSR_ET, %psr
>> 527 WRITE_PAUSE
>> 528
>> 529 add %sp, STACKFRAME_SZ, %o0
>> 530 mov %l1, %o1
>> 531 mov %l2, %o2
>> 532 call C_LABEL(do_priv_instruction)
>> 533 mov %l0, %o3
>> 534
>> 535 RESTORE_ALL
>> 536
>> 537 /* This routine handles unaligned data accesses. */
>> 538 .align 4
>> 539 .globl mna_handler
>> 540 mna_handler:
>> 541 andcc %l0, PSR_PS, %g0
>> 542 be mna_fromuser
>> 543 nop
>> 544
>> 545 SAVE_ALL
>> 546
>> 547 wr %l0, PSR_ET, %psr
>> 548 WRITE_PAUSE
>> 549
>> 550 ld [%l1], %o1
>> 551 call C_LABEL(kernel_unaligned_trap)
>> 552 add %sp, STACKFRAME_SZ, %o0
>> 553
>> 554 RESTORE_ALL
>> 555
>> 556 mna_fromuser:
>> 557 SAVE_ALL
>> 558
>> 559 wr %l0, PSR_ET, %psr ! re-enable traps
>> 560 WRITE_PAUSE
>> 561
>> 562 ld [%l1], %o1
>> 563 call C_LABEL(user_unaligned_trap)
>> 564 add %sp, STACKFRAME_SZ, %o0
>> 565
>> 566 RESTORE_ALL
>> 567
>> 568 /* This routine handles floating point disabled traps. */
>> 569 .align 4
>> 570 .globl fpd_trap_handler
>> 571 fpd_trap_handler:
>> 572 SAVE_ALL
>> 573
>> 574 wr %l0, PSR_ET, %psr ! re-enable traps
>> 575 WRITE_PAUSE
>> 576
>> 577 add %sp, STACKFRAME_SZ, %o0
>> 578 mov %l1, %o1
>> 579 mov %l2, %o2
>> 580 call C_LABEL(do_fpd_trap)
>> 581 mov %l0, %o3
>> 582
>> 583 RESTORE_ALL
>> 584
>> 585 /* This routine handles Floating Point Exceptions. */
>> 586 .align 4
>> 587 .globl fpe_trap_handler
>> 588 fpe_trap_handler:
>> 589 set fpsave_magic, %l5
>> 590 cmp %l1, %l5
>> 591 be 1f
>> 592 sethi %hi(C_LABEL(fpsave)), %l5
>> 593 or %l5, %lo(C_LABEL(fpsave)), %l5
>> 594 cmp %l1, %l5
>> 595 bne 2f
>> 596 sethi %hi(fpsave_catch2), %l5
>> 597 or %l5, %lo(fpsave_catch2), %l5
>> 598 wr %l0, 0x0, %psr
>> 599 WRITE_PAUSE
>> 600 jmp %l5
>> 601 rett %l5 + 4
>> 602 1:
>> 603 sethi %hi(fpsave_catch), %l5
>> 604 or %l5, %lo(fpsave_catch), %l5
>> 605 wr %l0, 0x0, %psr
>> 606 WRITE_PAUSE
>> 607 jmp %l5
>> 608 rett %l5 + 4
>> 609
>> 610 2:
>> 611 SAVE_ALL
>> 612
>> 613 wr %l0, PSR_ET, %psr ! re-enable traps
>> 614 WRITE_PAUSE
>> 615
>> 616 add %sp, STACKFRAME_SZ, %o0
>> 617 mov %l1, %o1
>> 618 mov %l2, %o2
>> 619 call C_LABEL(do_fpe_trap)
>> 620 mov %l0, %o3
>> 621
>> 622 RESTORE_ALL
>> 623
>> 624 /* This routine handles Tag Overflow Exceptions. */
>> 625 .align 4
>> 626 .globl do_tag_overflow
>> 627 do_tag_overflow:
>> 628 SAVE_ALL
>> 629
>> 630 wr %l0, PSR_ET, %psr ! re-enable traps
>> 631 WRITE_PAUSE
>> 632
>> 633 add %sp, STACKFRAME_SZ, %o0
>> 634 mov %l1, %o1
>> 635 mov %l2, %o2
>> 636 call C_LABEL(handle_tag_overflow)
>> 637 mov %l0, %o3
>> 638
>> 639 RESTORE_ALL
>> 640
>> 641 /* This routine handles Watchpoint Exceptions. */
>> 642 .align 4
>> 643 .globl do_watchpoint
>> 644 do_watchpoint:
>> 645 SAVE_ALL
>> 646
>> 647 wr %l0, PSR_ET, %psr ! re-enable traps
>> 648 WRITE_PAUSE
>> 649
>> 650 add %sp, STACKFRAME_SZ, %o0
>> 651 mov %l1, %o1
>> 652 mov %l2, %o2
>> 653 call C_LABEL(handle_watchpoint)
>> 654 mov %l0, %o3
>> 655
>> 656 RESTORE_ALL
>> 657
>> 658 /* This routine handles Register Access Exceptions. */
>> 659 .align 4
>> 660 .globl do_reg_access
>> 661 do_reg_access:
>> 662 SAVE_ALL
>> 663
>> 664 wr %l0, PSR_ET, %psr ! re-enable traps
>> 665 WRITE_PAUSE
>> 666
>> 667 add %sp, STACKFRAME_SZ, %o0
>> 668 mov %l1, %o1
>> 669 mov %l2, %o2
>> 670 call C_LABEL(handle_reg_access)
>> 671 mov %l0, %o3
>> 672
>> 673 RESTORE_ALL
>> 674
>> 675 /* This routine handles Co-Processor Disabled Exceptions. */
>> 676 .align 4
>> 677 .globl do_cp_disabled
>> 678 do_cp_disabled:
>> 679 SAVE_ALL
>> 680
>> 681 wr %l0, PSR_ET, %psr ! re-enable traps
>> 682 WRITE_PAUSE
>> 683
>> 684 add %sp, STACKFRAME_SZ, %o0
>> 685 mov %l1, %o1
>> 686 mov %l2, %o2
>> 687 call C_LABEL(handle_cp_disabled)
>> 688 mov %l0, %o3
>> 689
>> 690 RESTORE_ALL
>> 691
>> 692 /* This routine handles Co-Processor Exceptions. */
>> 693 .align 4
>> 694 .globl do_cp_exception
>> 695 do_cp_exception:
>> 696 SAVE_ALL
>> 697
>> 698 wr %l0, PSR_ET, %psr ! re-enable traps
>> 699 WRITE_PAUSE
>> 700
>> 701 add %sp, STACKFRAME_SZ, %o0
>> 702 mov %l1, %o1
>> 703 mov %l2, %o2
>> 704 call C_LABEL(handle_cp_exception)
>> 705 mov %l0, %o3
>> 706
>> 707 RESTORE_ALL
>> 708
>> 709 /* This routine handles Hardware Divide By Zero Exceptions. */
>> 710 .align 4
>> 711 .globl do_hw_divzero
>> 712 do_hw_divzero:
>> 713 SAVE_ALL
>> 714
>> 715 wr %l0, PSR_ET, %psr ! re-enable traps
>> 716 WRITE_PAUSE
>> 717
>> 718 add %sp, STACKFRAME_SZ, %o0
>> 719 mov %l1, %o1
>> 720 mov %l2, %o2
>> 721 call C_LABEL(handle_hw_divzero)
>> 722 mov %l0, %o3
>> 723
>> 724 RESTORE_ALL
>> 725
>> 726 .align 4
>> 727 .globl do_flush_windows
>> 728 do_flush_windows:
>> 729 SAVE_ALL
>> 730
>> 731 wr %l0, PSR_ET, %psr
>> 732 WRITE_PAUSE
>> 733
>> 734 andcc %l0, PSR_PS, %g0
>> 735 bne dfw_kernel
>> 736 nop
>> 737
>> 738 call C_LABEL(flush_user_windows)
>> 739 nop
>> 740
>> 741 /* Advance over the trap instruction. */
>> 742 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
>> 743 add %l1, 0x4, %l2
>> 744 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
>> 745 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
>> 746
>> 747 RESTORE_ALL
>> 748
>> 749 .globl flush_patch_one
>> 750
>> 751 /* We get these for debugging routines using __builtin_return_address() */
>> 752 dfw_kernel:
>> 753 flush_patch_one:
>> 754 FLUSH_ALL_KERNEL_WINDOWS
>> 755
>> 756 /* Advance over the trap instruction. */
>> 757 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
>> 758 add %l1, 0x4, %l2
>> 759 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
>> 760 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
>> 761
>> 762 RESTORE_ALL
>> 763
>> 764 /* The getcc software trap. The user wants the condition codes from
>> 765 * the %psr in register %g1.
>> 766 */
>> 767
>> 768 .align 4
>> 769 .globl getcc_trap_handler
>> 770 getcc_trap_handler:
>> 771 srl %l0, 20, %g1 ! give user
>> 772 and %g1, 0xf, %g1 ! only ICC bits in %psr
>> 773 jmp %l2 ! advance over trap instruction
>> 774 rett %l2 + 0x4 ! like this...
>> 775
>> 776 /* The setcc software trap. The user has condition codes in %g1
>> 777 * that it would like placed in the %psr. Be careful not to flip
>> 778 * any unintentional bits!
>> 779 */
>> 780
>> 781 .align 4
>> 782 .globl setcc_trap_handler
>> 783 setcc_trap_handler:
>> 784 sll %g1, 0x14, %l4
>> 785 set PSR_ICC, %l5
>> 786 andn %l0, %l5, %l0 ! clear ICC bits in %psr
>> 787 and %l4, %l5, %l4 ! clear non-ICC bits in user value
>> 788 or %l4, %l0, %l4 ! or them in... mix mix mix
>> 789
>> 790 wr %l4, 0x0, %psr ! set new %psr
>> 791 WRITE_PAUSE ! TI scumbags...
>> 792
>> 793 jmp %l2 ! advance over trap instruction
>> 794 rett %l2 + 0x4 ! like this...
>> 795
>> 796 .align 4
>> 797 .globl linux_trap_nmi_sun4c
>> 798 linux_trap_nmi_sun4c:
>> 799 SAVE_ALL
>> 800
>> 801 /* Ugh, we need to clear the IRQ line. This is now
>> 802 * a very sun4c specific trap handler...
>> 803 */
>> 804 sethi %hi(C_LABEL(interrupt_enable)), %l5
>> 805 ld [%l5 + %lo(C_LABEL(interrupt_enable))], %l5
>> 806 ldub [%l5], %l6
>> 807 andn %l6, INTS_ENAB, %l6
>> 808 stb %l6, [%l5]
>> 809
>> 810 /* Now it is safe to re-enable traps without recursion. */
>> 811 or %l0, PSR_PIL, %l0
>> 812 wr %l0, PSR_ET, %psr
>> 813 WRITE_PAUSE
>> 814
>> 815 /* Now call the c-code with the pt_regs frame ptr and the
>> 816 * memory error registers as arguments. The ordering chosen
>> 817 * here is due to unlatching semantics.
>> 818 */
>> 819 sethi %hi(AC_SYNC_ERR), %o0
>> 820 add %o0, 0x4, %o0
>> 821 lda [%o0] ASI_CONTROL, %o2 ! sync vaddr
>> 822 sub %o0, 0x4, %o0
>> 823 lda [%o0] ASI_CONTROL, %o1 ! sync error
>> 824 add %o0, 0xc, %o0
>> 825 lda [%o0] ASI_CONTROL, %o4 ! async vaddr
>> 826 sub %o0, 0x4, %o0
>> 827 lda [%o0] ASI_CONTROL, %o3 ! async error
>> 828 call C_LABEL(sparc_lvl15_nmi)
>> 829 add %sp, STACKFRAME_SZ, %o0
>> 830
>> 831 RESTORE_ALL
>> 832
>> 833 .align 4
>> 834 .globl C_LABEL(invalid_segment_patch1_ff)
>> 835 .globl C_LABEL(invalid_segment_patch2_ff)
>> 836 C_LABEL(invalid_segment_patch1_ff): cmp %l4, 0xff
>> 837 C_LABEL(invalid_segment_patch2_ff): mov 0xff, %l3
>> 838
>> 839 .align 4
>> 840 .globl C_LABEL(invalid_segment_patch1_1ff)
>> 841 .globl C_LABEL(invalid_segment_patch2_1ff)
>> 842 C_LABEL(invalid_segment_patch1_1ff): cmp %l4, 0x1ff
>> 843 C_LABEL(invalid_segment_patch2_1ff): mov 0x1ff, %l3
>> 844
>> 845 .align 4
>> 846 .globl C_LABEL(num_context_patch1_16), C_LABEL(num_context_patch2_16)
>> 847 C_LABEL(num_context_patch1_16): mov 0x10, %l7
>> 848 C_LABEL(num_context_patch2_16): mov 0x10, %l7
>> 849
>> 850 .align 4
>> 851 .globl C_LABEL(vac_linesize_patch_32)
>> 852 C_LABEL(vac_linesize_patch_32): subcc %l7, 32, %l7
>> 853
>> 854 .align 4
>> 855 .globl C_LABEL(vac_hwflush_patch1_on), C_LABEL(vac_hwflush_patch2_on)
>> 856
>> 857 /*
>> 858 * Ugly, but we cant use hardware flushing on the sun4 and we'd require
>> 859 * two instructions (Anton)
>> 860 */
>> 861 #ifdef CONFIG_SUN4
>> 862 C_LABEL(vac_hwflush_patch1_on): nop
>> 863 #else
>> 864 C_LABEL(vac_hwflush_patch1_on): addcc %l7, -PAGE_SIZE, %l7
183 #endif 865 #endif
184 .endm <<
185 866
186 .macro mte_set_user_gcr, tsk, tmp, tmp !! 867 C_LABEL(vac_hwflush_patch2_on): sta %g0, [%l3 + %l7] ASI_HWFLUSHSEG
187 #ifdef CONFIG_KASAN_HW_TAGS <<
188 alternative_cb ARM64_ALWAYS_SYSTEM, kasan_hw_ <<
189 b 1f <<
190 alternative_cb_end <<
191 ldr \tmp, [\tsk, #THREAD_MTE_CTRL] <<
192 868
193 mte_set_gcr \tmp, \tmp2 !! 869 .globl C_LABEL(invalid_segment_patch1), C_LABEL(invalid_segment_patch2)
>> 870 .globl C_LABEL(num_context_patch1), C_LABEL(num_context_patch2)
>> 871 .globl C_LABEL(vac_linesize_patch), C_LABEL(vac_hwflush_patch1)
>> 872 .globl C_LABEL(vac_hwflush_patch2)
>> 873
>> 874 .align 4
>> 875 .globl sun4c_fault
>> 876
>> 877 ! %l0 = %psr
>> 878 ! %l1 = %pc
>> 879 ! %l2 = %npc
>> 880 ! %l3 = %wim
>> 881 ! %l7 = 1 for textfault
>> 882 ! We want error in %l5, vaddr in %l6
>> 883 sun4c_fault:
>> 884 #ifdef CONFIG_SUN4
>> 885 sethi %hi(C_LABEL(sun4c_memerr_reg)), %l4
>> 886 ld [%l4+%lo(C_LABEL(sun4c_memerr_reg))], %l4 ! memerr ctrl reg addr
>> 887 ld [%l4], %l6 ! memerr ctrl reg
>> 888 ld [%l4 + 4], %l5 ! memerr vaddr reg
>> 889 andcc %l6, 0x80, %g0 ! check for error type
>> 890 st %g0, [%l4 + 4] ! clear the error
>> 891 be 0f ! normal error
>> 892 sethi %hi(AC_BUS_ERROR), %l4 ! bus err reg addr
>> 893
>> 894 call C_LABEL(prom_halt) ! something weird happened
>> 895 ! what exactly did happen?
>> 896 ! what should we do here?
>> 897
>> 898 0: or %l4, %lo(AC_BUS_ERROR), %l4 ! bus err reg addr
>> 899 lduba [%l4] ASI_CONTROL, %l6 ! bus err reg
>> 900
>> 901 cmp %l7, 1 ! text fault?
>> 902 be 1f ! yes
>> 903 nop
>> 904
>> 905 ld [%l1], %l4 ! load instruction that caused fault
>> 906 srl %l4, 21, %l4
>> 907 andcc %l4, 1, %g0 ! store instruction?
>> 908
>> 909 be 1f ! no
>> 910 sethi %hi(SUN4C_SYNC_BADWRITE), %l4 ! yep
>> 911 ! %lo(SUN4C_SYNC_BADWRITE) = 0
>> 912 or %l4, %l6, %l6 ! set write bit to emulate sun4c
194 1: 913 1:
>> 914 #else
>> 915 sethi %hi(AC_SYNC_ERR), %l4
>> 916 add %l4, 0x4, %l6 ! AC_SYNC_VA in %l6
>> 917 lda [%l6] ASI_CONTROL, %l5 ! Address
>> 918 lda [%l4] ASI_CONTROL, %l6 ! Error, retained for a bit
195 #endif 919 #endif
196 .endm <<
197 920
198 .macro kernel_entry, el, regsize = 64 !! 921 andn %l5, 0xfff, %l5 ! Encode all info into l7
199 .if \el == 0 !! 922 srl %l6, 14, %l4
200 alternative_insn nop, SET_PSTATE_DIT(1 <<
201 .endif <<
202 .if \regsize == 32 <<
203 mov w0, w0 <<
204 .endif <<
205 stp x0, x1, [sp, #16 * 0] <<
206 stp x2, x3, [sp, #16 * 1] <<
207 stp x4, x5, [sp, #16 * 2] <<
208 stp x6, x7, [sp, #16 * 3] <<
209 stp x8, x9, [sp, #16 * 4] <<
210 stp x10, x11, [sp, #16 * 5] <<
211 stp x12, x13, [sp, #16 * 6] <<
212 stp x14, x15, [sp, #16 * 7] <<
213 stp x16, x17, [sp, #16 * 8] <<
214 stp x18, x19, [sp, #16 * 9] <<
215 stp x20, x21, [sp, #16 * 10] <<
216 stp x22, x23, [sp, #16 * 11] <<
217 stp x24, x25, [sp, #16 * 12] <<
218 stp x26, x27, [sp, #16 * 13] <<
219 stp x28, x29, [sp, #16 * 14] <<
220 <<
221 .if \el == 0 <<
222 clear_gp_regs <<
223 mrs x21, sp_el0 <<
224 ldr_this_cpu tsk, __entry_task, x20 <<
225 msr sp_el0, tsk <<
226 923
227 /* !! 924 and %l4, 2, %l4
228 * Ensure MDSCR_EL1.SS is clear, since !! 925 or %l5, %l4, %l4
229 * when scheduling. <<
230 */ <<
231 ldr x19, [tsk, #TSK_TI_FLAGS] <<
232 disable_step_tsk x19, x20 <<
233 926
234 /* Check for asynchronous tag check fa !! 927 or %l4, %l7, %l7 ! l7 = [addr,write,txtfault]
235 ldr x0, [tsk, THREAD_SCTLR_USER] !! 928
236 check_mte_async_tcf x22, x23, x0 !! 929 andcc %l0, PSR_PS, %g0
>> 930 be sun4c_fault_fromuser
>> 931 andcc %l7, 1, %g0 ! Text fault?
>> 932
>> 933 be 1f
>> 934 sethi %hi(KERNBASE), %l4
>> 935
>> 936 mov %l1, %l5 ! PC
237 937
238 #ifdef CONFIG_ARM64_PTR_AUTH <<
239 alternative_if ARM64_HAS_ADDRESS_AUTH <<
240 /* <<
241 * Enable IA for in-kernel PAC if the <<
242 * this could be implemented with an u <<
243 * a load, this was measured to be slo <<
244 * <<
245 * Install the kernel IA key only if I <<
246 * was disabled on kernel exit then we <<
247 * installed so there is no need to in <<
248 */ <<
249 tbz x0, SCTLR_ELx_ENIA_SHIFT, 1f <<
250 __ptrauth_keys_install_kernel_nosync t <<
251 b 2f <<
252 1: 938 1:
253 mrs x0, sctlr_el1 !! 939 cmp %l5, %l4
254 orr x0, x0, SCTLR_ELx_ENIA !! 940 blu sun4c_fault_fromuser
255 msr sctlr_el1, x0 !! 941 sethi %hi(~((1 << SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4
256 2: !! 942
257 alternative_else_nop_endif !! 943 /* If the kernel references a bum kernel pointer, or a pte which
>> 944 * points to a non existant page in ram, we will run this code
>> 945 * _forever_ and lock up the machine!!!!! So we must check for
>> 946 * this condition, the AC_SYNC_ERR bits are what we must examine.
>> 947 * Also a parity error would make this happen as well. So we just
>> 948 * check that we are in fact servicing a tlb miss and not some
>> 949 * other type of fault for the kernel.
>> 950 */
>> 951 andcc %l6, 0x80, %g0
>> 952 be sun4c_fault_fromuser
>> 953 and %l5, %l4, %l5
>> 954
>> 955 /* Test for NULL pte_t * in vmalloc area. */
>> 956 sethi %hi(VMALLOC_START), %l4
>> 957 cmp %l5, %l4
>> 958 blu,a C_LABEL(invalid_segment_patch1)
>> 959 lduXa [%l5] ASI_SEGMAP, %l4
>> 960
>> 961 sethi %hi(C_LABEL(swapper_pg_dir)), %l4
>> 962 srl %l5, SUN4C_PGDIR_SHIFT, %l6
>> 963 or %l4, %lo(C_LABEL(swapper_pg_dir)), %l4
>> 964 sll %l6, 2, %l6
>> 965 ld [%l4 + %l6], %l4
>> 966 #ifdef CONFIG_SUN4
>> 967 sethi %hi(PAGE_MASK), %l6
>> 968 andcc %l4, %l6, %g0
>> 969 #else
>> 970 andcc %l4, PAGE_MASK, %g0
258 #endif 971 #endif
>> 972 be sun4c_fault_fromuser
>> 973 lduXa [%l5] ASI_SEGMAP, %l4
259 974
260 apply_ssbd 1, x22, x23 !! 975 C_LABEL(invalid_segment_patch1):
>> 976 cmp %l4, 0x7f
>> 977 bne 1f
>> 978 sethi %hi(C_LABEL(sun4c_kfree_ring)), %l4
>> 979 or %l4, %lo(C_LABEL(sun4c_kfree_ring)), %l4
>> 980 ld [%l4 + 0x18], %l3
>> 981 deccc %l3 ! do we have a free entry?
>> 982 bcs,a 2f ! no, unmap one.
>> 983 sethi %hi(C_LABEL(sun4c_kernel_ring)), %l4
261 984
262 mte_set_kernel_gcr x22, x23 !! 985 st %l3, [%l4 + 0x18] ! sun4c_kfree_ring.num_entries--
263 986
264 /* !! 987 ld [%l4 + 0x00], %l6 ! entry = sun4c_kfree_ring.ringhd.next
265 * Any non-self-synchronizing system r !! 988 st %l5, [%l6 + 0x08] ! entry->vaddr = address
266 * kernel entry should be placed befor <<
267 */ <<
268 alternative_if ARM64_MTE <<
269 isb <<
270 b 1f <<
271 alternative_else_nop_endif <<
272 alternative_if ARM64_HAS_ADDRESS_AUTH <<
273 isb <<
274 alternative_else_nop_endif <<
275 1: <<
276 <<
277 scs_load_current <<
278 .else <<
279 add x21, sp, #PT_REGS_SIZE <<
280 get_current_task tsk <<
281 .endif /* \el == 0 */ <<
282 mrs x22, elr_el1 <<
283 mrs x23, spsr_el1 <<
284 stp lr, x21, [sp, #S_LR] <<
285 989
286 /* !! 990 ld [%l6 + 0x00], %l3 ! next = entry->next
287 * For exceptions from EL0, create a f !! 991 ld [%l6 + 0x04], %l7 ! entry->prev
288 * For exceptions from EL1, create a s <<
289 * interrupted code shows up in the ba <<
290 */ <<
291 .if \el == 0 <<
292 stp xzr, xzr, [sp, #S_STACKFRAME] <<
293 .else <<
294 stp x29, x22, [sp, #S_STACKFRAME] <<
295 .endif <<
296 add x29, sp, #S_STACKFRAME <<
297 <<
298 #ifdef CONFIG_ARM64_SW_TTBR0_PAN <<
299 alternative_if_not ARM64_HAS_PAN <<
300 bl __swpan_entry_el\el <<
301 alternative_else_nop_endif <<
302 #endif <<
303 992
304 stp x22, x23, [sp, #S_PC] !! 993 st %l7, [%l3 + 0x04] ! next->prev = entry->prev
>> 994 st %l3, [%l7 + 0x00] ! entry->prev->next = next
305 995
306 /* Not in a syscall by default (el0_sv !! 996 sethi %hi(C_LABEL(sun4c_kernel_ring)), %l4
307 .if \el == 0 !! 997 or %l4, %lo(C_LABEL(sun4c_kernel_ring)), %l4
308 mov w21, #NO_SYSCALL !! 998 ! head = &sun4c_kernel_ring.ringhd
309 str w21, [sp, #S_SYSCALLNO] <<
310 .endif <<
311 <<
312 #ifdef CONFIG_ARM64_PSEUDO_NMI <<
313 alternative_if_not ARM64_HAS_GIC_PRIO_MASKING <<
314 b .Lskip_pmr_save\@ <<
315 alternative_else_nop_endif <<
316 <<
317 mrs_s x20, SYS_ICC_PMR_EL1 <<
318 str x20, [sp, #S_PMR_SAVE] <<
319 mov x20, #GIC_PRIO_IRQON | GIC_PRI <<
320 msr_s SYS_ICC_PMR_EL1, x20 <<
321 999
322 .Lskip_pmr_save\@: !! 1000 ld [%l4 + 0x00], %l7 ! head->next
323 #endif <<
324 1001
325 /* !! 1002 st %l4, [%l6 + 0x04] ! entry->prev = head
326 * Registers that may be useful after !! 1003 st %l7, [%l6 + 0x00] ! entry->next = head->next
327 * !! 1004 st %l6, [%l7 + 0x04] ! head->next->prev = entry
328 * x20 - ICC_PMR_EL1 <<
329 * x21 - aborted SP <<
330 * x22 - aborted PC <<
331 * x23 - aborted PSTATE <<
332 */ <<
333 .endm <<
334 <<
335 .macro kernel_exit, el <<
336 .if \el != 0 <<
337 disable_daif <<
338 .endif <<
339 <<
340 #ifdef CONFIG_ARM64_PSEUDO_NMI <<
341 alternative_if_not ARM64_HAS_GIC_PRIO_MASKING <<
342 b .Lskip_pmr_restore\@ <<
343 alternative_else_nop_endif <<
344 <<
345 ldr x20, [sp, #S_PMR_SAVE] <<
346 msr_s SYS_ICC_PMR_EL1, x20 <<
347 <<
348 /* Ensure priority change is seen by r <<
349 alternative_if_not ARM64_HAS_GIC_PRIO_RELAXED_ <<
350 dsb sy <<
351 alternative_else_nop_endif <<
352 1005
353 .Lskip_pmr_restore\@: !! 1006 st %l6, [%l4 + 0x00] ! head->next = entry
354 #endif <<
355 1007
356 ldp x21, x22, [sp, #S_PC] !! 1008 ld [%l4 + 0x18], %l3
>> 1009 inc %l3 ! sun4c_kernel_ring.num_entries++
>> 1010 st %l3, [%l4 + 0x18]
>> 1011 b 4f
>> 1012 ld [%l6 + 0x08], %l5
357 1013
358 #ifdef CONFIG_ARM64_SW_TTBR0_PAN !! 1014 2:
359 alternative_if_not ARM64_HAS_PAN !! 1015 or %l4, %lo(C_LABEL(sun4c_kernel_ring)), %l4
360 bl __swpan_exit_el\el !! 1016 ! head = &sun4c_kernel_ring.ringhd
361 alternative_else_nop_endif <<
362 #endif <<
363 1017
364 .if \el == 0 !! 1018 ld [%l4 + 0x04], %l6 ! entry = head->prev
365 ldr x23, [sp, #S_SP] !! 1019
366 msr sp_el0, x23 !! 1020 ld [%l6 + 0x08], %l3 ! tmp = entry->vaddr
367 tst x22, #PSR_MODE32_BIT !! 1021
368 b.eq 3f !! 1022 ! Flush segment from the cache.
369 !! 1023 #ifdef CONFIG_SUN4
370 #ifdef CONFIG_ARM64_ERRATUM_845719 !! 1024 sethi %hi((128 * 1024)), %l7
371 alternative_if ARM64_WORKAROUND_845719 <<
372 #ifdef CONFIG_PID_IN_CONTEXTIDR <<
373 mrs x29, contextidr_el1 <<
374 msr contextidr_el1, x29 <<
375 #else 1025 #else
376 msr contextidr_el1, xzr !! 1026 sethi %hi((64 * 1024)), %l7
377 #endif <<
378 alternative_else_nop_endif <<
379 #endif 1027 #endif
380 3: !! 1028 9:
381 scs_save tsk !! 1029 C_LABEL(vac_hwflush_patch1):
>> 1030 C_LABEL(vac_linesize_patch):
>> 1031 subcc %l7, 16, %l7
>> 1032 bne 9b
>> 1033 C_LABEL(vac_hwflush_patch2):
>> 1034 sta %g0, [%l3 + %l7] ASI_FLUSHSEG
382 1035
383 /* Ignore asynchronous tag check fault !! 1036 st %l5, [%l6 + 0x08] ! entry->vaddr = address
384 ldr x0, [tsk, THREAD_SCTLR_USER] <<
385 clear_mte_async_tcf x0 <<
386 1037
387 #ifdef CONFIG_ARM64_PTR_AUTH !! 1038 ld [%l6 + 0x00], %l5 ! next = entry->next
388 alternative_if ARM64_HAS_ADDRESS_AUTH !! 1039 ld [%l6 + 0x04], %l7 ! entry->prev
389 /* <<
390 * IA was enabled for in-kernel PAC. D <<
391 * alternatively install the user's IA <<
392 * SCTLR bits were updated on task swi <<
393 * <<
394 * No kernel C function calls after th <<
395 */ <<
396 tbz x0, SCTLR_ELx_ENIA_SHIFT, 1f <<
397 __ptrauth_keys_install_user tsk, x0, x <<
398 b 2f <<
399 1: <<
400 mrs x0, sctlr_el1 <<
401 bic x0, x0, SCTLR_ELx_ENIA <<
402 msr sctlr_el1, x0 <<
403 2: <<
404 alternative_else_nop_endif <<
405 #endif <<
406 1040
407 mte_set_user_gcr tsk, x0, x1 !! 1041 st %l7, [%l5 + 0x04] ! next->prev = entry->prev
>> 1042 st %l5, [%l7 + 0x00] ! entry->prev->next = next
>> 1043 st %l4, [%l6 + 0x04] ! entry->prev = head
408 1044
409 apply_ssbd 0, x0, x1 !! 1045 ld [%l4 + 0x00], %l7 ! head->next
410 .endif <<
411 1046
412 msr elr_el1, x21 !! 1047 st %l7, [%l6 + 0x00] ! entry->next = head->next
413 msr spsr_el1, x22 !! 1048 st %l6, [%l7 + 0x04] ! head->next->prev = entry
414 ldp x0, x1, [sp, #16 * 0] !! 1049 st %l6, [%l4 + 0x00] ! head->next = entry
415 ldp x2, x3, [sp, #16 * 1] <<
416 ldp x4, x5, [sp, #16 * 2] <<
417 ldp x6, x7, [sp, #16 * 3] <<
418 ldp x8, x9, [sp, #16 * 4] <<
419 ldp x10, x11, [sp, #16 * 5] <<
420 ldp x12, x13, [sp, #16 * 6] <<
421 ldp x14, x15, [sp, #16 * 7] <<
422 ldp x16, x17, [sp, #16 * 8] <<
423 ldp x18, x19, [sp, #16 * 9] <<
424 ldp x20, x21, [sp, #16 * 10] <<
425 ldp x22, x23, [sp, #16 * 11] <<
426 ldp x24, x25, [sp, #16 * 12] <<
427 ldp x26, x27, [sp, #16 * 13] <<
428 ldp x28, x29, [sp, #16 * 14] <<
429 <<
430 .if \el == 0 <<
431 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 <<
432 alternative_insn "b .L_skip_tramp_exit <<
433 <<
434 msr far_el1, x29 <<
435 <<
436 ldr_this_cpu x30, this_cpu_vector, <<
437 tramp_alias x29, tramp_exit <<
438 msr vbar_el1, x30 <<
439 ldr lr, [sp, #S_LR] <<
440 add sp, sp, #PT_REGS_SIZE <<
441 br x29 <<
442 1050
443 .L_skip_tramp_exit_\@: !! 1051 mov %l3, %l5 ! address = tmp
444 #endif <<
445 .endif <<
446 1052
447 ldr lr, [sp, #S_LR] !! 1053 4:
448 add sp, sp, #PT_REGS_SIZE !! 1054 C_LABEL(num_context_patch1):
>> 1055 mov 0x08, %l7
449 1056
450 .if \el == 0 !! 1057 ld [%l6 + 0x08], %l4
451 /* This must be after the last explici !! 1058 ldub [%l6 + 0x0c], %l3
452 alternative_if ARM64_WORKAROUND_SPECULATIVE_UN !! 1059 or %l4, %l3, %l4 ! encode new vaddr/pseg into l4
453 tlbi vale1, xzr !! 1060
454 dsb nsh !! 1061 sethi %hi(AC_CONTEXT), %l3
455 alternative_else_nop_endif !! 1062 lduba [%l3] ASI_CONTROL, %l6
456 .else !! 1063
457 /* Ensure any device/NC reads complete !! 1064 /* Invalidate old mapping, instantiate new mapping,
458 alternative_insn nop, "dmb sy", ARM64_ !! 1065 * for each context. Registers l6/l7 are live across
459 .endif !! 1066 * this loop.
460 !! 1067 */
461 eret !! 1068 3: deccc %l7
462 sb !! 1069 sethi %hi(AC_CONTEXT), %l3
463 .endm !! 1070 stba %l7, [%l3] ASI_CONTROL
>> 1071 C_LABEL(invalid_segment_patch2):
>> 1072 mov 0x7f, %l3
>> 1073 stXa %l3, [%l5] ASI_SEGMAP
>> 1074 andn %l4, 0x1ff, %l3
>> 1075 bne 3b
>> 1076 stXa %l4, [%l3] ASI_SEGMAP
464 1077
465 #ifdef CONFIG_ARM64_SW_TTBR0_PAN !! 1078 sethi %hi(AC_CONTEXT), %l3
466 /* !! 1079 stba %l6, [%l3] ASI_CONTROL
467 * Set the TTBR0 PAN bit in SPSR. When <<
468 * EL0, there is no need to check the <<
469 * accesses are always enabled. <<
470 * Note that the meaning of this bit d <<
471 * feature as all TTBR0_EL1 accesses a <<
472 * user mappings. <<
473 */ <<
474 SYM_CODE_START_LOCAL(__swpan_entry_el1) <<
475 mrs x21, ttbr0_el1 <<
476 tst x21, #TTBR_ASID_MASK <<
477 orr x23, x23, #PSR_PAN_BIT <<
478 b.eq 1f <<
479 and x23, x23, #~PSR_PAN_BIT <<
480 SYM_INNER_LABEL(__swpan_entry_el0, SYM_L_LOCAL <<
481 __uaccess_ttbr0_disable x21 <<
482 1: ret <<
483 SYM_CODE_END(__swpan_entry_el1) <<
484 1080
485 /* !! 1081 andn %l4, 0x1ff, %l5
486 * Restore access to TTBR0_EL1. If ret <<
487 * PAN bit checking. <<
488 */ <<
489 SYM_CODE_START_LOCAL(__swpan_exit_el1) <<
490 tbnz x22, #22, 1f <<
491 __uaccess_ttbr0_enable x0, x1 <<
492 1: and x22, x22, #~PSR_PAN_BIT <<
493 ret <<
494 SYM_CODE_END(__swpan_exit_el1) <<
495 1082
496 SYM_CODE_START_LOCAL(__swpan_exit_el0) !! 1083 1:
497 __uaccess_ttbr0_enable x0, x1 !! 1084 sethi %hi(VMALLOC_START), %l4
498 /* !! 1085 cmp %l5, %l4
499 * Enable errata workarounds only if r !! 1086
500 * workaround currently required for T !! 1087 bgeu 1f
501 * Cavium erratum 27456 (broadcast TLB !! 1088 mov 1 << (SUN4C_REAL_PGDIR_SHIFT - PAGE_SHIFT), %l7
502 * corruption). !! 1089
503 */ !! 1090 sethi %hi(KERNBASE), %l6
504 b post_ttbr_update_workaround !! 1091
505 SYM_CODE_END(__swpan_exit_el0) !! 1092 sub %l5, %l6, %l4
>> 1093 srl %l4, PAGE_SHIFT, %l4
>> 1094 sethi %hi((SUN4C_PAGE_KERNEL & 0xf4000000)), %l3
>> 1095 or %l3, %l4, %l3
>> 1096
>> 1097 sethi %hi(PAGE_SIZE), %l4
>> 1098
>> 1099 2:
>> 1100 sta %l3, [%l5] ASI_PTE
>> 1101 deccc %l7
>> 1102 inc %l3
>> 1103 bne 2b
>> 1104 add %l5, %l4, %l5
>> 1105
>> 1106 b 7f
>> 1107 sethi %hi(C_LABEL(sun4c_kernel_faults)), %l4
>> 1108
>> 1109 1:
>> 1110 srl %l5, SUN4C_PGDIR_SHIFT, %l3
>> 1111 sethi %hi(C_LABEL(swapper_pg_dir)), %l4
>> 1112 or %l4, %lo(C_LABEL(swapper_pg_dir)), %l4
>> 1113 sll %l3, 2, %l3
>> 1114 ld [%l4 + %l3], %l4
>> 1115 #ifndef CONFIG_SUN4
>> 1116 and %l4, PAGE_MASK, %l4
>> 1117 #else
>> 1118 sethi %hi(PAGE_MASK), %l6
>> 1119 and %l4, %l6, %l4
506 #endif 1120 #endif
507 1121
508 /* GPRs used by entry code */ !! 1122 srl %l5, (PAGE_SHIFT - 2), %l6
509 tsk .req x28 // current thr !! 1123 and %l6, ((SUN4C_PTRS_PER_PTE - 1) << 2), %l6
>> 1124 add %l6, %l4, %l6
510 1125
511 .text !! 1126 sethi %hi(PAGE_SIZE), %l4
512 1127
513 /* !! 1128 2:
514 * Exception vectors. !! 1129 ld [%l6], %l3
515 */ !! 1130 deccc %l7
516 .pushsection ".entry.text", "ax" !! 1131 sta %l3, [%l5] ASI_PTE
>> 1132 add %l6, 0x4, %l6
>> 1133 bne 2b
>> 1134 add %l5, %l4, %l5
>> 1135
>> 1136 sethi %hi(C_LABEL(sun4c_kernel_faults)), %l4
>> 1137 7:
>> 1138 ld [%l4 + %lo(C_LABEL(sun4c_kernel_faults))], %l3
>> 1139 inc %l3
>> 1140 st %l3, [%l4 + %lo(C_LABEL(sun4c_kernel_faults))]
>> 1141
>> 1142 /* Restore condition codes */
>> 1143 wr %l0, 0x0, %psr
>> 1144 WRITE_PAUSE
>> 1145 jmp %l1
>> 1146 rett %l2
>> 1147
>> 1148 sun4c_fault_fromuser:
>> 1149 SAVE_ALL
>> 1150 nop
>> 1151
>> 1152 mov %l7, %o1 ! Decode the info from %l7
>> 1153 mov %l7, %o2
>> 1154 and %o1, 1, %o1 ! arg2 = text_faultp
>> 1155 mov %l7, %o3
>> 1156 and %o2, 2, %o2 ! arg3 = writep
>> 1157 andn %o3, 0xfff, %o3 ! arg4 = faulting address
>> 1158
>> 1159 wr %l0, PSR_ET, %psr
>> 1160 WRITE_PAUSE
>> 1161
>> 1162 call C_LABEL(do_sun4c_fault)
>> 1163 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
>> 1164
>> 1165 RESTORE_ALL
>> 1166
>> 1167 .align 4
>> 1168 .globl C_LABEL(srmmu_fault)
>> 1169 C_LABEL(srmmu_fault):
>> 1170 mov 0x400, %l5
>> 1171 mov 0x300, %l4
>> 1172
>> 1173 lda [%l5] ASI_M_MMUREGS, %l6 ! read sfar first
>> 1174 lda [%l4] ASI_M_MMUREGS, %l5 ! read sfsr last
>> 1175
>> 1176 andn %l6, 0xfff, %l6
>> 1177 srl %l5, 6, %l5 ! and encode all info into l7
>> 1178
>> 1179 and %l5, 2, %l5
>> 1180 or %l5, %l6, %l6
>> 1181
>> 1182 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
>> 1183
>> 1184 SAVE_ALL
>> 1185
>> 1186 mov %l7, %o1
>> 1187 mov %l7, %o2
>> 1188 and %o1, 1, %o1 ! arg2 = text_faultp
>> 1189 mov %l7, %o3
>> 1190 and %o2, 2, %o2 ! arg3 = writep
>> 1191 andn %o3, 0xfff, %o3 ! arg4 = faulting address
>> 1192
>> 1193 wr %l0, PSR_ET, %psr
>> 1194 WRITE_PAUSE
>> 1195
>> 1196 call C_LABEL(do_sparc_fault)
>> 1197 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
>> 1198
>> 1199 RESTORE_ALL
>> 1200
>> 1201 #ifdef CONFIG_SUNOS_EMUL
>> 1202 /* SunOS uses syscall zero as the 'indirect syscall' it looks
>> 1203 * like indir_syscall(scall_num, arg0, arg1, arg2...); etc.
>> 1204 * This is complete brain damage.
>> 1205 */
>> 1206 .globl C_LABEL(sunos_indir)
>> 1207 C_LABEL(sunos_indir):
>> 1208 mov %o7, %l4
>> 1209 cmp %o0, NR_SYSCALLS
>> 1210 blu,a 1f
>> 1211 sll %o0, 0x2, %o0
517 1212
518 .align 11 !! 1213 sethi %hi(C_LABEL(sunos_nosys)), %l6
519 SYM_CODE_START(vectors) !! 1214 b 2f
520 kernel_ventry 1, t, 64, sync !! 1215 or %l6, %lo(C_LABEL(sunos_nosys)), %l6
521 kernel_ventry 1, t, 64, irq <<
522 kernel_ventry 1, t, 64, fiq <<
523 kernel_ventry 1, t, 64, error <<
524 <<
525 kernel_ventry 1, h, 64, sync <<
526 kernel_ventry 1, h, 64, irq <<
527 kernel_ventry 1, h, 64, fiq <<
528 kernel_ventry 1, h, 64, error <<
529 <<
530 kernel_ventry 0, t, 64, sync <<
531 kernel_ventry 0, t, 64, irq <<
532 kernel_ventry 0, t, 64, fiq <<
533 kernel_ventry 0, t, 64, error <<
534 <<
535 kernel_ventry 0, t, 32, sync <<
536 kernel_ventry 0, t, 32, irq <<
537 kernel_ventry 0, t, 32, fiq <<
538 kernel_ventry 0, t, 32, error <<
539 SYM_CODE_END(vectors) <<
540 1216
541 #ifdef CONFIG_VMAP_STACK !! 1217 1:
542 SYM_CODE_START_LOCAL(__bad_stack) !! 1218 set C_LABEL(sunos_sys_table), %l7
543 /* !! 1219 ld [%l7 + %o0], %l6
544 * We detected an overflow in kernel_v <<
545 * overflow stack. Stash the exception <<
546 * handler. <<
547 */ <<
548 1220
549 /* Restore the original x0 value */ !! 1221 2:
550 mrs x0, tpidrro_el0 !! 1222 mov %o1, %o0
>> 1223 mov %o2, %o1
>> 1224 mov %o3, %o2
>> 1225 mov %o4, %o3
>> 1226 mov %o5, %o4
>> 1227 call %l6
>> 1228 mov %l4, %o7
>> 1229 #endif
>> 1230
>> 1231 .align 4
>> 1232 .globl C_LABEL(sys_nis_syscall)
>> 1233 C_LABEL(sys_nis_syscall):
>> 1234 mov %o7, %l5
>> 1235 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
>> 1236 call C_LABEL(c_sys_nis_syscall)
>> 1237 mov %l5, %o7
>> 1238
>> 1239 .align 4
>> 1240 .globl C_LABEL(sys_ptrace)
>> 1241 C_LABEL(sys_ptrace):
>> 1242 call C_LABEL(do_ptrace)
>> 1243 add %sp, STACKFRAME_SZ, %o0
>> 1244
>> 1245 ld [%curptr + AOFF_task_ptrace], %l5
>> 1246 andcc %l5, 0x02, %g0
>> 1247 be 1f
>> 1248 nop
551 1249
552 /* !! 1250 call C_LABEL(syscall_trace)
553 * Store the original GPRs to the new !! 1251 nop
554 * PT_REGS_SIZE) was stashed in tpidr_ <<
555 */ <<
556 sub sp, sp, #PT_REGS_SIZE <<
557 kernel_entry 1 <<
558 mrs x0, tpidr_el0 <<
559 add x0, x0, #PT_REGS_SIZE <<
560 str x0, [sp, #S_SP] <<
561 <<
562 /* Stash the regs for handle_bad_stack <<
563 mov x0, sp <<
564 <<
565 /* Time to die */ <<
566 bl handle_bad_stack <<
567 ASM_BUG() <<
568 SYM_CODE_END(__bad_stack) <<
569 #endif /* CONFIG_VMAP_STACK */ <<
570 <<
571 <<
572 .macro entry_handler el:req, ht:req, r <<
573 SYM_CODE_START_LOCAL(el\el\ht\()_\regsize\()_\ <<
574 kernel_entry \el, \regsize <<
575 mov x0, sp <<
576 bl el\el\ht\()_\regsize\()_\label <<
577 .if \el == 0 <<
578 b ret_to_user <<
579 .else <<
580 b ret_to_kernel <<
581 .endif <<
582 SYM_CODE_END(el\el\ht\()_\regsize\()_\label) <<
583 .endm <<
584 1252
585 /* !! 1253 1:
586 * Early exception handlers !! 1254 RESTORE_ALL
587 */ <<
588 entry_handler 1, t, 64, sync <<
589 entry_handler 1, t, 64, irq <<
590 entry_handler 1, t, 64, fiq <<
591 entry_handler 1, t, 64, error <<
592 <<
593 entry_handler 1, h, 64, sync <<
594 entry_handler 1, h, 64, irq <<
595 entry_handler 1, h, 64, fiq <<
596 entry_handler 1, h, 64, error <<
597 <<
598 entry_handler 0, t, 64, sync <<
599 entry_handler 0, t, 64, irq <<
600 entry_handler 0, t, 64, fiq <<
601 entry_handler 0, t, 64, error <<
602 <<
603 entry_handler 0, t, 32, sync <<
604 entry_handler 0, t, 32, irq <<
605 entry_handler 0, t, 32, fiq <<
606 entry_handler 0, t, 32, error <<
607 <<
608 SYM_CODE_START_LOCAL(ret_to_kernel) <<
609 kernel_exit 1 <<
610 SYM_CODE_END(ret_to_kernel) <<
611 <<
612 SYM_CODE_START_LOCAL(ret_to_user) <<
613 ldr x19, [tsk, #TSK_TI_FLAGS] <<
614 enable_step_tsk x19, x2 <<
615 #ifdef CONFIG_GCC_PLUGIN_STACKLEAK <<
616 bl stackleak_erase_on_task_stack <<
617 #endif <<
618 kernel_exit 0 <<
619 SYM_CODE_END(ret_to_user) <<
620 1255
621 .popsection !! 1256 .align 4
>> 1257 .globl C_LABEL(sys_execve)
>> 1258 C_LABEL(sys_execve):
>> 1259 mov %o7, %l5
>> 1260 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
>> 1261 call C_LABEL(sparc_execve)
>> 1262 mov %l5, %o7
>> 1263
>> 1264 .align 4
>> 1265 .globl C_LABEL(sys_pipe)
>> 1266 C_LABEL(sys_pipe):
>> 1267 mov %o7, %l5
>> 1268 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
>> 1269 call C_LABEL(sparc_pipe)
>> 1270 mov %l5, %o7
>> 1271
>> 1272 .align 4
>> 1273 .globl C_LABEL(sys_sigaltstack)
>> 1274 C_LABEL(sys_sigaltstack):
>> 1275 mov %o7, %l5
>> 1276 mov %fp, %o2
>> 1277 call C_LABEL(do_sigaltstack)
>> 1278 mov %l5, %o7
>> 1279
>> 1280 .align 4
>> 1281 .globl C_LABEL(sys_sigstack)
>> 1282 C_LABEL(sys_sigstack):
>> 1283 mov %o7, %l5
>> 1284 mov %fp, %o2
>> 1285 call C_LABEL(do_sys_sigstack)
>> 1286 mov %l5, %o7
>> 1287
>> 1288 .align 4
>> 1289 .globl C_LABEL(sys_sigpause)
>> 1290 C_LABEL(sys_sigpause):
>> 1291 /* Note: %o0 already has correct value... */
>> 1292 call C_LABEL(do_sigpause)
>> 1293 add %sp, STACKFRAME_SZ, %o1
>> 1294
>> 1295 ld [%curptr + AOFF_task_ptrace], %l5
>> 1296 andcc %l5, 0x02, %g0
>> 1297 be 1f
>> 1298 nop
622 1299
623 // Move from tramp_pg_dir to swapper_p !! 1300 call C_LABEL(syscall_trace)
624 .macro tramp_map_kernel, tmp !! 1301 nop
625 mrs \tmp, ttbr1_el1 !! 1302
626 add \tmp, \tmp, #TRAMP_SWAPPER_OFF !! 1303 1:
627 bic \tmp, \tmp, #USER_ASID_FLAG !! 1304 /* We are returning to a signal handler. */
628 msr ttbr1_el1, \tmp !! 1305 RESTORE_ALL
629 #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003 !! 1306
630 alternative_if ARM64_WORKAROUND_QCOM_FALKOR_E1 !! 1307 .align 4
631 /* ASID already in \tmp[63:48] */ !! 1308 .globl C_LABEL(sys_sigsuspend)
632 movk \tmp, #:abs_g2_nc:(TRAMP_VALIA !! 1309 C_LABEL(sys_sigsuspend):
633 movk \tmp, #:abs_g1_nc:(TRAMP_VALIA !! 1310 call C_LABEL(do_sigsuspend)
634 /* 2MB boundary containing the vectors !! 1311 add %sp, STACKFRAME_SZ, %o0
635 movk \tmp, #:abs_g0_nc:((TRAMP_VALI !! 1312
636 isb !! 1313 ld [%curptr + AOFF_task_ptrace], %l5
637 tlbi vae1, \tmp !! 1314 andcc %l5, 0x02, %g0
638 dsb nsh !! 1315 be 1f
639 alternative_else_nop_endif !! 1316 nop
640 #endif /* CONFIG_QCOM_FALKOR_ERRATUM_1003 */ <<
641 .endm <<
642 <<
643 // Move from swapper_pg_dir to tramp_p <<
644 .macro tramp_unmap_kernel, tmp <<
645 mrs \tmp, ttbr1_el1 <<
646 sub \tmp, \tmp, #TRAMP_SWAPPER_OFF <<
647 orr \tmp, \tmp, #USER_ASID_FLAG <<
648 msr ttbr1_el1, \tmp <<
649 /* <<
650 * We avoid running the post_ttbr_upda <<
651 * it's only needed by Cavium ThunderX <<
652 * disabled. <<
653 */ <<
654 .endm <<
655 <<
656 .macro tramp_data_read_var <<
657 #ifdef CONFIG_RELOCATABLE <<
658 ldr \dst, .L__tramp_data_\ <<
659 .ifndef .L__tramp_data_\var <<
660 .pushsection ".entry.tramp.rodata", <<
661 .align 3 <<
662 .L__tramp_data_\var: <<
663 .quad \var <<
664 .popsection <<
665 .endif <<
666 #else <<
667 /* <<
668 * As !RELOCATABLE implies !RANDOMIZE_ <<
669 * compile time constant (and hence no <<
670 * <<
671 * As statically allocated kernel code <<
672 * 47 bits of the address space we can <<
673 * instruction to load the upper 16 bi <<
674 */ <<
675 movz \dst, :abs_g2_s:\var <<
676 movk \dst, :abs_g1_nc:\var <<
677 movk \dst, :abs_g0_nc:\var <<
678 #endif <<
679 .endm <<
680 1317
681 #define BHB_MITIGATION_NONE 0 !! 1318 call C_LABEL(syscall_trace)
682 #define BHB_MITIGATION_LOOP 1 !! 1319 nop
683 #define BHB_MITIGATION_FW 2 <<
684 #define BHB_MITIGATION_INSN 3 <<
685 1320
686 .macro tramp_ventry, vector_start, reg <<
687 .align 7 <<
688 1: 1321 1:
689 .if \regsize == 64 !! 1322 /* We are returning to a signal handler. */
690 msr tpidrro_el0, x30 // Res !! 1323 RESTORE_ALL
691 .endif <<
692 1324
693 .if \bhb == BHB_MITIGATION_LOOP !! 1325 .align 4
694 /* !! 1326 .globl C_LABEL(sys_rt_sigsuspend)
695 * This sequence must appear before th !! 1327 C_LABEL(sys_rt_sigsuspend):
696 * ret out of tramp_ventry. It appears !! 1328 /* Note: %o0, %o1 already have correct value... */
697 */ !! 1329 call C_LABEL(do_rt_sigsuspend)
698 __mitigate_spectre_bhb_loop x30 !! 1330 add %sp, STACKFRAME_SZ, %o2
699 .endif // \bhb == BHB_MITIGATION_LOOP !! 1331
>> 1332 ld [%curptr + AOFF_task_ptrace], %l5
>> 1333 andcc %l5, 0x02, %g0
>> 1334 be 1f
>> 1335 nop
700 1336
701 .if \bhb == BHB_MITIGATION_INSN !! 1337 call C_LABEL(syscall_trace)
702 clearbhb !! 1338 nop
703 isb <<
704 .endif // \bhb == BHB_MITIGATION_INSN <<
705 1339
706 .if \kpti == 1 !! 1340 1:
707 /* !! 1341 /* We are returning to a signal handler. */
708 * Defend against branch aliasing atta !! 1342 RESTORE_ALL
709 * entry onto the return stack and usi <<
710 * enter the full-fat kernel vectors. <<
711 */ <<
712 bl 2f <<
713 b . <<
714 2: <<
715 tramp_map_kernel x30 <<
716 alternative_insn isb, nop, ARM64_WORKAROUND_QC <<
717 tramp_data_read_var x30, vectors <<
718 alternative_if_not ARM64_WORKAROUND_CAVIUM_TX2 <<
719 prfm plil1strm, [x30, #(1b - \vecto <<
720 alternative_else_nop_endif <<
721 <<
722 msr vbar_el1, x30 <<
723 isb <<
724 .else <<
725 adr_l x30, vectors <<
726 .endif // \kpti == 1 <<
727 1343
728 .if \bhb == BHB_MITIGATION_FW !! 1344 .align 4
729 /* !! 1345 .globl C_LABEL(sys_sigreturn)
730 * The firmware sequence must appear b !! 1346 C_LABEL(sys_sigreturn):
731 * i.e. the ret out of tramp_ventry. B !! 1347 call C_LABEL(do_sigreturn)
732 * mapped to save/restore the register !! 1348 add %sp, STACKFRAME_SZ, %o0
733 */ !! 1349
734 __mitigate_spectre_bhb_fw !! 1350 ld [%curptr + AOFF_task_ptrace], %l5
735 .endif // \bhb == BHB_MITIGATION_FW !! 1351 andcc %l5, 0x02, %g0
>> 1352 be 1f
>> 1353 nop
736 1354
737 add x30, x30, #(1b - \vector_start !! 1355 call C_LABEL(syscall_trace)
738 ret !! 1356 nop
739 .org 1b + 128 // Did we overflow the ventry <<
740 .endm <<
741 1357
742 .macro generate_tramp_vector, kpti, !! 1358 1:
743 .Lvector_start\@: !! 1359 /* We don't want to muck with user registers like a
744 .space 0x400 !! 1360 * normal syscall, just return.
745 !! 1361 */
746 .rept 4 !! 1362 RESTORE_ALL
747 tramp_ventry .Lvector_start\@, 64, <<
748 .endr <<
749 .rept 4 <<
750 tramp_ventry .Lvector_start\@, 32, <<
751 .endr <<
752 .endm <<
753 1363
754 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 !! 1364 .align 4
755 /* !! 1365 .globl C_LABEL(sys_rt_sigreturn)
756 * Exception vectors trampoline. !! 1366 C_LABEL(sys_rt_sigreturn):
757 * The order must match __bp_harden_el1_vector !! 1367 call C_LABEL(do_rt_sigreturn)
758 * arm64_bp_harden_el1_vectors enum. !! 1368 add %sp, STACKFRAME_SZ, %o0
759 */ !! 1369
760 .pushsection ".entry.tramp.text", "ax" !! 1370 ld [%curptr + AOFF_task_ptrace], %l5
761 .align 11 !! 1371 andcc %l5, 0x02, %g0
762 SYM_CODE_START_LOCAL_NOALIGN(tramp_vectors) !! 1372 be 1f
763 #ifdef CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY !! 1373 nop
764 generate_tramp_vector kpti=1, bhb=BH <<
765 generate_tramp_vector kpti=1, bhb=BH <<
766 generate_tramp_vector kpti=1, bhb=BH <<
767 #endif /* CONFIG_MITIGATE_SPECTRE_BRANCH_HISTO <<
768 generate_tramp_vector kpti=1, bhb=BH <<
769 SYM_CODE_END(tramp_vectors) <<
770 <<
771 SYM_CODE_START_LOCAL(tramp_exit) <<
772 tramp_unmap_kernel x29 <<
773 mrs x29, far_el1 <<
774 eret <<
775 sb <<
776 SYM_CODE_END(tramp_exit) <<
777 .popsection <<
778 #endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */ <<
779 1374
780 /* !! 1375 call C_LABEL(syscall_trace)
781 * Exception vectors for spectre mitigations o !! 1376 nop
782 * kpti is not in use. <<
783 */ <<
784 .macro generate_el1_vector, bhb <<
785 .Lvector_start\@: <<
786 kernel_ventry 1, t, 64, sync <<
787 kernel_ventry 1, t, 64, irq <<
788 kernel_ventry 1, t, 64, fiq <<
789 kernel_ventry 1, t, 64, error <<
790 <<
791 kernel_ventry 1, h, 64, sync <<
792 kernel_ventry 1, h, 64, irq <<
793 kernel_ventry 1, h, 64, fiq <<
794 kernel_ventry 1, h, 64, error <<
795 <<
796 .rept 4 <<
797 tramp_ventry .Lvector_start\@, 64, <<
798 .endr <<
799 .rept 4 <<
800 tramp_ventry .Lvector_start\@, 32, <<
801 .endr <<
802 .endm <<
803 <<
804 /* The order must match tramp_vecs and the arm <<
805 .pushsection ".entry.text", "ax" <<
806 .align 11 <<
807 SYM_CODE_START(__bp_harden_el1_vectors) <<
808 #ifdef CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY <<
809 generate_el1_vector bhb=BHB_MITIGA <<
810 generate_el1_vector bhb=BHB_MITIGA <<
811 generate_el1_vector bhb=BHB_MITIGA <<
812 #endif /* CONFIG_MITIGATE_SPECTRE_BRANCH_HISTO <<
813 SYM_CODE_END(__bp_harden_el1_vectors) <<
814 .popsection <<
815 1377
>> 1378 1:
>> 1379 /* We are returning to a signal handler. */
>> 1380 RESTORE_ALL
816 1381
817 /* !! 1382 /* Now that we have a real sys_clone, sys_fork() is
818 * Register switch for AArch64. The callee-sav !! 1383 * implemented in terms of it. Our _real_ implementation
819 * and restored. On entry: !! 1384 * of SunOS vfork() will use sys_vfork().
820 * x0 = previous task_struct (must be preser !! 1385 *
821 * x1 = next task_struct !! 1386 * XXX These three should be consolidated into mostly shared
822 * Previous and next are guaranteed not to be !! 1387 * XXX code just like on sparc64... -DaveM
823 * !! 1388 */
824 */ !! 1389 .align 4
825 SYM_FUNC_START(cpu_switch_to) !! 1390 .globl C_LABEL(sys_fork), flush_patch_two
826 mov x10, #THREAD_CPU_CONTEXT !! 1391 C_LABEL(sys_fork):
827 add x8, x0, x10 !! 1392 mov %o7, %l5
828 mov x9, sp !! 1393 flush_patch_two:
829 stp x19, x20, [x8], #16 !! 1394 FLUSH_ALL_KERNEL_WINDOWS;
830 stp x21, x22, [x8], #16 !! 1395 rd %psr, %g4
831 stp x23, x24, [x8], #16 !! 1396 WRITE_PAUSE
832 stp x25, x26, [x8], #16 !! 1397 mov SIGCHLD, %o0 ! arg0: clone flags
833 stp x27, x28, [x8], #16 !! 1398 rd %wim, %g5
834 stp x29, x9, [x8], #16 !! 1399 WRITE_PAUSE
835 str lr, [x8] !! 1400 mov %fp, %o1 ! arg1: usp
836 add x8, x1, x10 !! 1401 std %g4, [%curptr + AOFF_task_thread + AOFF_thread_fork_kpsr]
837 ldp x19, x20, [x8], #16 !! 1402 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
838 ldp x21, x22, [x8], #16 !! 1403 mov 0, %o3
839 ldp x23, x24, [x8], #16 !! 1404 call C_LABEL(do_fork)
840 ldp x25, x26, [x8], #16 !! 1405 mov %l5, %o7
841 ldp x27, x28, [x8], #16 !! 1406
842 ldp x29, x9, [x8], #16 !! 1407 /* Whee, kernel threads! */
843 ldr lr, [x8] !! 1408 .globl C_LABEL(sys_clone), flush_patch_three
844 mov sp, x9 !! 1409 C_LABEL(sys_clone):
845 msr sp_el0, x1 !! 1410 mov %o7, %l5
846 ptrauth_keys_install_kernel x1, x8, x9 !! 1411 flush_patch_three:
847 scs_save x0 !! 1412 FLUSH_ALL_KERNEL_WINDOWS;
848 scs_load_current !! 1413 rd %psr, %g4
849 ret !! 1414 WRITE_PAUSE
850 SYM_FUNC_END(cpu_switch_to) !! 1415
851 NOKPROBE(cpu_switch_to) !! 1416 /* arg0,1: flags,usp -- loaded already */
>> 1417 cmp %o1, 0x0 ! Is new_usp NULL?
>> 1418 rd %wim, %g5
>> 1419 WRITE_PAUSE
>> 1420 be,a 1f
>> 1421 mov %fp, %o1 ! yes, use callers usp
>> 1422 andn %o1, 7, %o1 ! no, align to 8 bytes
>> 1423 1:
>> 1424 std %g4, [%curptr + AOFF_task_thread + AOFF_thread_fork_kpsr]
>> 1425 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
>> 1426 mov 0, %o3
>> 1427 call C_LABEL(do_fork)
>> 1428 mov %l5, %o7
>> 1429
>> 1430 /* Whee, real vfork! */
>> 1431 .globl C_LABEL(sys_vfork), flush_patch_four
>> 1432 C_LABEL(sys_vfork):
>> 1433 flush_patch_four:
>> 1434 FLUSH_ALL_KERNEL_WINDOWS;
>> 1435 rd %psr, %g4
>> 1436 WRITE_PAUSE
>> 1437 rd %wim, %g5
>> 1438 WRITE_PAUSE
>> 1439 std %g4, [%curptr + AOFF_task_thread + AOFF_thread_fork_kpsr]
>> 1440 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
>> 1441 mov %fp, %o1
>> 1442 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
>> 1443 sethi %hi(C_LABEL(do_fork)), %l1
>> 1444 mov 0, %o3
>> 1445 jmpl %l1 + %lo(C_LABEL(do_fork)), %g0
>> 1446 add %sp, STACKFRAME_SZ, %o2
>> 1447
>> 1448 .align 4
>> 1449 linux_sparc_ni_syscall:
>> 1450 sethi %hi(C_LABEL(sys_ni_syscall)), %l7
>> 1451 b syscall_is_too_hard
>> 1452 or %l7, %lo(C_LABEL(sys_ni_syscall)), %l7
>> 1453
>> 1454 linux_fast_syscall:
>> 1455 andn %l7, 3, %l7
>> 1456 mov %i0, %o0
>> 1457 mov %i1, %o1
>> 1458 mov %i2, %o2
>> 1459 jmpl %l7 + %g0, %g0
>> 1460 mov %i3, %o3
>> 1461
>> 1462 linux_syscall_trace:
>> 1463 call C_LABEL(syscall_trace)
>> 1464 nop
>> 1465 mov %i0, %o0
>> 1466 mov %i1, %o1
>> 1467 mov %i2, %o2
>> 1468 mov %i3, %o3
>> 1469 b 2f
>> 1470 mov %i4, %o4
852 1471
853 /* !! 1472 .globl C_LABEL(ret_from_fork)
854 * This is how we return from a fork. !! 1473 C_LABEL(ret_from_fork):
855 */ !! 1474 call schedule_tail
856 SYM_CODE_START(ret_from_fork) !! 1475 mov %g3, %o0
857 bl schedule_tail !! 1476 b C_LABEL(ret_sys_call)
858 cbz x19, 1f !! 1477 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
859 mov x0, x20 !! 1478
860 blr x19 !! 1479 /* Linux native and SunOS system calls enter here... */
861 1: get_current_task tsk !! 1480 .align 4
862 mov x0, sp !! 1481 .globl linux_sparc_syscall
863 bl asm_exit_to_user_mode !! 1482 linux_sparc_syscall:
864 b ret_to_user !! 1483 /* Direct access to user regs, must faster. */
865 SYM_CODE_END(ret_from_fork) !! 1484 cmp %g1, NR_SYSCALLS
866 NOKPROBE(ret_from_fork) !! 1485 bgeu linux_sparc_ni_syscall
>> 1486 sll %g1, 2, %l4
>> 1487 ld [%l7 + %l4], %l7
>> 1488 andcc %l7, 1, %g0
>> 1489 bne linux_fast_syscall
>> 1490 /* Just do first insn from SAVE_ALL in the delay slot */
>> 1491
>> 1492 .globl syscall_is_too_hard
>> 1493 syscall_is_too_hard:
>> 1494 SAVE_ALL_HEAD
>> 1495 rd %wim, %l3
>> 1496
>> 1497 wr %l0, PSR_ET, %psr
>> 1498 mov %i0, %o0
>> 1499 mov %i1, %o1
>> 1500 mov %i2, %o2
>> 1501
>> 1502 ld [%curptr + AOFF_task_ptrace], %l5
>> 1503 mov %i3, %o3
>> 1504 andcc %l5, 0x02, %g0
>> 1505 mov %i4, %o4
>> 1506 bne linux_syscall_trace
>> 1507 mov %i0, %l5
>> 1508 2:
>> 1509 call %l7
>> 1510 mov %i5, %o5
867 1511
868 /* !! 1512 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
869 * void call_on_irq_stack(struct pt_regs *regs <<
870 * void (*func)(struct <<
871 * <<
872 * Calls func(regs) using this CPU's irq stack <<
873 */ <<
874 SYM_FUNC_START(call_on_irq_stack) <<
875 #ifdef CONFIG_SHADOW_CALL_STACK <<
876 get_current_task x16 <<
877 scs_save x16 <<
878 ldr_this_cpu scs_sp, irq_shadow_call_s <<
879 #endif <<
880 1513
881 /* Create a frame record to save our L !! 1514 .globl C_LABEL(ret_sys_call)
882 stp x29, x30, [sp, #-16]! !! 1515 C_LABEL(ret_sys_call):
883 mov x29, sp !! 1516 ld [%curptr + AOFF_task_ptrace], %l6
884 !! 1517 cmp %o0, -ENOIOCTLCMD
885 ldr_this_cpu x16, irq_stack_ptr, x17 !! 1518 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
886 !! 1519 set PSR_C, %g2
887 /* Move to the new stack and call the !! 1520 bgeu 1f
888 add sp, x16, #IRQ_STACK_SIZE !! 1521 andcc %l6, 0x02, %l6
889 blr x1 !! 1522
>> 1523 /* System call success, clear Carry condition code. */
>> 1524 andn %g3, %g2, %g3
>> 1525 clr %l6
>> 1526 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
>> 1527 bne linux_syscall_trace2
>> 1528 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
>> 1529 add %l1, 0x4, %l2 /* npc = npc+4 */
>> 1530 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
>> 1531 b ret_trap_entry
>> 1532 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
>> 1533 1:
>> 1534 /* System call failure, set Carry condition code.
>> 1535 * Also, get abs(errno) to return to the process.
>> 1536 */
>> 1537 sub %g0, %o0, %o0
>> 1538 or %g3, %g2, %g3
>> 1539 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
>> 1540 mov 1, %l6
>> 1541 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
>> 1542 bne linux_syscall_trace2
>> 1543 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
>> 1544 add %l1, 0x4, %l2 /* npc = npc+4 */
>> 1545 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
>> 1546 b ret_trap_entry
>> 1547 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
>> 1548
>> 1549 linux_syscall_trace2:
>> 1550 call C_LABEL(syscall_trace)
>> 1551 add %l1, 0x4, %l2 /* npc = npc+4 */
>> 1552 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
>> 1553 b ret_trap_entry
>> 1554 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
>> 1555
>> 1556
>> 1557 /*
>> 1558 * Solaris system calls and indirect system calls enter here.
>> 1559 *
>> 1560 * I have named the solaris indirect syscalls like that because
>> 1561 * it seems like Solaris has some fast path syscalls that can
>> 1562 * be handled as indirect system calls. - mig
>> 1563 */
>> 1564
>> 1565 linux_syscall_for_solaris:
>> 1566 sethi %hi(sys_call_table), %l7
>> 1567 b linux_sparc_syscall
>> 1568 or %l7, %lo(sys_call_table), %l7
>> 1569
>> 1570 .align 4
>> 1571 .globl solaris_syscall
>> 1572 solaris_syscall:
>> 1573 cmp %g1,59
>> 1574 be linux_syscall_for_solaris
>> 1575 cmp %g1,2
>> 1576 be linux_syscall_for_solaris
>> 1577 cmp %g1,42
>> 1578 be linux_syscall_for_solaris
>> 1579 cmp %g1,119
>> 1580 be,a linux_syscall_for_solaris
>> 1581 mov 2, %g1
>> 1582 1:
>> 1583 SAVE_ALL_HEAD
>> 1584 rd %wim, %l3
>> 1585
>> 1586 wr %l0, PSR_ET, %psr
>> 1587 nop
>> 1588 nop
>> 1589 mov %i0, %l5
>> 1590
>> 1591 call C_LABEL(do_solaris_syscall)
>> 1592 add %sp, STACKFRAME_SZ, %o0
>> 1593
>> 1594 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
>> 1595 set PSR_C, %g2
>> 1596 cmp %o0, -ENOIOCTLCMD
>> 1597 bgeu 1f
>> 1598 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
>> 1599
>> 1600 /* System call success, clear Carry condition code. */
>> 1601 andn %g3, %g2, %g3
>> 1602 clr %l6
>> 1603 b 2f
>> 1604 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
890 1605
891 /* !! 1606 1:
892 * Restore the SP from the FP, and res !! 1607 /* System call failure, set Carry condition code.
893 * record. !! 1608 * Also, get abs(errno) to return to the process.
894 */ 1609 */
895 mov sp, x29 !! 1610 sub %g0, %o0, %o0
896 ldp x29, x30, [sp], #16 !! 1611 mov 1, %l6
897 scs_load_current !! 1612 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
898 ret !! 1613 or %g3, %g2, %g3
899 SYM_FUNC_END(call_on_irq_stack) !! 1614 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
900 NOKPROBE(call_on_irq_stack) !! 1615
>> 1616 /* Advance the pc and npc over the trap instruction.
>> 1617 * If the npc is unaligned (has a 1 in the lower byte), it means
>> 1618 * the kernel does not want us to play magic (ie, skipping over
>> 1619 * traps). Mainly when the Solaris code wants to set some PC and
>> 1620 * nPC (setcontext).
>> 1621 */
>> 1622 2:
>> 1623 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
>> 1624 andcc %l1, 1, %g0
>> 1625 bne 1f
>> 1626 add %l1, 0x4, %l2 /* npc = npc+4 */
>> 1627 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
>> 1628 b ret_trap_entry
>> 1629 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
901 1630
902 #ifdef CONFIG_ARM_SDE_INTERFACE !! 1631 /* kernel knows what it is doing, fixup npc and continue */
>> 1632 1:
>> 1633 sub %l1, 1, %l1
>> 1634 b ret_trap_entry
>> 1635 st %l1, [%sp + STACKFRAME_SZ + PT_NPC]
>> 1636
>> 1637 #ifndef CONFIG_SUNOS_EMUL
>> 1638 .align 4
>> 1639 .globl sunos_syscall
>> 1640 sunos_syscall:
>> 1641 SAVE_ALL_HEAD
>> 1642 rd %wim, %l3
>> 1643 wr %l0, PSR_ET, %psr
>> 1644 nop
>> 1645 nop
>> 1646 mov %i0, %l5
>> 1647 call C_LABEL(do_sunos_syscall)
>> 1648 add %sp, STACKFRAME_SZ, %o0
>> 1649 #endif
>> 1650
>> 1651 /* {net, open}bsd system calls enter here... */
>> 1652 .align 4
>> 1653 .globl bsd_syscall
>> 1654 bsd_syscall:
>> 1655 /* Direct access to user regs, must faster. */
>> 1656 cmp %g1, NR_SYSCALLS
>> 1657 blu,a 1f
>> 1658 sll %g1, 2, %l4
>> 1659
>> 1660 set C_LABEL(sys_ni_syscall), %l7
>> 1661 b bsd_is_too_hard
>> 1662 nop
903 1663
904 #include <asm/sdei.h> !! 1664 1:
905 #include <uapi/linux/arm_sdei.h> !! 1665 ld [%l7 + %l4], %l7
906 1666
907 .macro sdei_handler_exit exit_mode !! 1667 .globl bsd_is_too_hard
908 /* On success, this call never returns !! 1668 bsd_is_too_hard:
909 cmp \exit_mode, #SDEI_EXIT_SMC !! 1669 rd %wim, %l3
910 b.ne 99f !! 1670 SAVE_ALL
911 smc #0 <<
912 b . <<
913 99: hvc #0 <<
914 b . <<
915 .endm <<
916 1671
917 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 !! 1672 wr %l0, PSR_ET, %psr
918 /* !! 1673 WRITE_PAUSE
919 * The regular SDEI entry point may have been <<
920 * the kernel. This trampoline restores the ke <<
921 * argument accessible. <<
922 * <<
923 * This clobbers x4, __sdei_handler() will res <<
924 * copy. <<
925 */ <<
926 .pushsection ".entry.tramp.text", "ax" <<
927 SYM_CODE_START(__sdei_asm_entry_trampoline) <<
928 mrs x4, ttbr1_el1 <<
929 tbz x4, #USER_ASID_BIT, 1f <<
930 <<
931 tramp_map_kernel tmp=x4 <<
932 isb <<
933 mov x4, xzr <<
934 1674
935 /* !! 1675 2:
936 * Remember whether to unmap the kerne !! 1676 mov %i0, %o0
>> 1677 mov %i1, %o1
>> 1678 mov %i2, %o2
>> 1679 mov %i0, %l5
>> 1680 mov %i3, %o3
>> 1681 mov %i4, %o4
>> 1682 call %l7
>> 1683 mov %i5, %o5
>> 1684
>> 1685 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
>> 1686 set PSR_C, %g2
>> 1687 cmp %o0, -ENOIOCTLCMD
>> 1688 bgeu 1f
>> 1689 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
>> 1690
>> 1691 /* System call success, clear Carry condition code. */
>> 1692 andn %g3, %g2, %g3
>> 1693 clr %l6
>> 1694 b 2f
>> 1695 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
>> 1696
>> 1697 1:
>> 1698 /* System call failure, set Carry condition code.
>> 1699 * Also, get abs(errno) to return to the process.
937 */ 1700 */
938 1: str x4, [x1, #(SDEI_EVENT_INTREGS !! 1701 sub %g0, %o0, %o0
939 tramp_data_read_var x4, __sdei_asm !! 1702 #if 0 /* XXX todo XXX */
940 br x4 !! 1703 sethi %hi(C_LABEL(bsd_xlatb_rorl), %o3
941 SYM_CODE_END(__sdei_asm_entry_trampoline) !! 1704 or %o3, %lo(C_LABEL(bsd_xlatb_rorl)), %o3
942 NOKPROBE(__sdei_asm_entry_trampoline) !! 1705 sll %o0, 2, %o0
>> 1706 ld [%o3 + %o0], %o0
>> 1707 #endif
>> 1708 mov 1, %l6
>> 1709 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
>> 1710 or %g3, %g2, %g3
>> 1711 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
943 1712
944 /* !! 1713 /* Advance the pc and npc over the trap instruction. */
945 * Make the exit call and restore the original !! 1714 2:
946 * !! 1715 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
947 * x0 & x1: setup for the exit API call !! 1716 add %l1, 0x4, %l2 /* npc = npc+4 */
948 * x2: exit_mode !! 1717 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
949 * x4: struct sdei_registered_event argument f !! 1718 b ret_trap_entry
950 */ !! 1719 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
951 SYM_CODE_START(__sdei_asm_exit_trampoline) <<
952 ldr x4, [x4, #(SDEI_EVENT_INTREGS <<
953 cbnz x4, 1f <<
954 <<
955 tramp_unmap_kernel tmp=x4 <<
956 <<
957 1: sdei_handler_exit exit_mode=x2 <<
958 SYM_CODE_END(__sdei_asm_exit_trampoline) <<
959 NOKPROBE(__sdei_asm_exit_trampoline) <<
960 .popsection // .entry.tramp.text <<
961 #endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */ <<
962 1720
963 /* !! 1721 /* Saving and restoring the FPU state is best done from lowlevel code.
964 * Software Delegated Exception entry point. <<
965 * 1722 *
966 * x0: Event number !! 1723 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
967 * x1: struct sdei_registered_event argument f !! 1724 * void *fpqueue, unsigned long *fpqdepth)
968 * x2: interrupted PC <<
969 * x3: interrupted PSTATE <<
970 * x4: maybe clobbered by the trampoline <<
971 * <<
972 * Firmware has preserved x0->x17 for us, we m <<
973 * follow SMC-CC. We save (or retrieve) all th <<
974 * want them. <<
975 */ 1725 */
976 SYM_CODE_START(__sdei_asm_handler) <<
977 stp x2, x3, [x1, #SDEI_EVENT_INTRE <<
978 stp x4, x5, [x1, #SDEI_EVENT_INTRE <<
979 stp x6, x7, [x1, #SDEI_EVENT_INTRE <<
980 stp x8, x9, [x1, #SDEI_EVENT_INTRE <<
981 stp x10, x11, [x1, #SDEI_EVENT_INT <<
982 stp x12, x13, [x1, #SDEI_EVENT_INT <<
983 stp x14, x15, [x1, #SDEI_EVENT_INT <<
984 stp x16, x17, [x1, #SDEI_EVENT_INT <<
985 stp x18, x19, [x1, #SDEI_EVENT_INT <<
986 stp x20, x21, [x1, #SDEI_EVENT_INT <<
987 stp x22, x23, [x1, #SDEI_EVENT_INT <<
988 stp x24, x25, [x1, #SDEI_EVENT_INT <<
989 stp x26, x27, [x1, #SDEI_EVENT_INT <<
990 stp x28, x29, [x1, #SDEI_EVENT_INT <<
991 mov x4, sp <<
992 stp lr, x4, [x1, #SDEI_EVENT_INTRE <<
993 <<
994 mov x19, x1 <<
995 <<
996 /* Store the registered-event for cras <<
997 ldrb w4, [x19, #SDEI_EVENT_PRIORITY <<
998 cbnz w4, 1f <<
999 adr_this_cpu dst=x5, sym=sdei_active_n <<
1000 b 2f <<
1001 1: adr_this_cpu dst=x5, sym=sdei_active_ <<
1002 2: str x19, [x5] <<
1003 1726
1004 #ifdef CONFIG_VMAP_STACK !! 1727 .globl C_LABEL(fpsave)
1005 /* !! 1728 C_LABEL(fpsave):
1006 * entry.S may have been using sp as !! 1729 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1007 * this is a normal or critical event !! 1730 ld [%o1], %g1
1008 * stack for this CPU. !! 1731 set 0x2000, %g4
1009 */ !! 1732 andcc %g1, %g4, %g0
1010 cbnz w4, 1f !! 1733 be 2f
1011 ldr_this_cpu dst=x5, sym=sdei_stack_n !! 1734 mov 0, %g2
1012 b 2f !! 1735
1013 1: ldr_this_cpu dst=x5, sym=sdei_stack_c !! 1736 /* We have an fpqueue to save. */
1014 2: mov x6, #SDEI_STACK_SIZE !! 1737 1:
1015 add x5, x5, x6 !! 1738 std %fq, [%o2]
1016 mov sp, x5 !! 1739 fpsave_magic:
>> 1740 st %fsr, [%o1]
>> 1741 ld [%o1], %g3
>> 1742 andcc %g3, %g4, %g0
>> 1743 add %g2, 1, %g2
>> 1744 bne 1b
>> 1745 add %o2, 8, %o2
>> 1746
>> 1747 2:
>> 1748 st %g2, [%o3]
>> 1749
>> 1750 std %f0, [%o0 + 0x00]
>> 1751 std %f2, [%o0 + 0x08]
>> 1752 std %f4, [%o0 + 0x10]
>> 1753 std %f6, [%o0 + 0x18]
>> 1754 std %f8, [%o0 + 0x20]
>> 1755 std %f10, [%o0 + 0x28]
>> 1756 std %f12, [%o0 + 0x30]
>> 1757 std %f14, [%o0 + 0x38]
>> 1758 std %f16, [%o0 + 0x40]
>> 1759 std %f18, [%o0 + 0x48]
>> 1760 std %f20, [%o0 + 0x50]
>> 1761 std %f22, [%o0 + 0x58]
>> 1762 std %f24, [%o0 + 0x60]
>> 1763 std %f26, [%o0 + 0x68]
>> 1764 std %f28, [%o0 + 0x70]
>> 1765 retl
>> 1766 std %f30, [%o0 + 0x78]
>> 1767
>> 1768 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
>> 1769 * code for pointing out this possible deadlock, while we save state
>> 1770 * above we could trap on the fsr store so our low level fpu trap
>> 1771 * code has to know how to deal with this.
>> 1772 */
>> 1773 fpsave_catch:
>> 1774 b fpsave_magic + 4
>> 1775 st %fsr, [%o1]
>> 1776
>> 1777 fpsave_catch2:
>> 1778 b C_LABEL(fpsave) + 4
>> 1779 st %fsr, [%o1]
>> 1780
>> 1781 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
>> 1782
>> 1783 .globl C_LABEL(fpload)
>> 1784 C_LABEL(fpload):
>> 1785 ldd [%o0 + 0x00], %f0
>> 1786 ldd [%o0 + 0x08], %f2
>> 1787 ldd [%o0 + 0x10], %f4
>> 1788 ldd [%o0 + 0x18], %f6
>> 1789 ldd [%o0 + 0x20], %f8
>> 1790 ldd [%o0 + 0x28], %f10
>> 1791 ldd [%o0 + 0x30], %f12
>> 1792 ldd [%o0 + 0x38], %f14
>> 1793 ldd [%o0 + 0x40], %f16
>> 1794 ldd [%o0 + 0x48], %f18
>> 1795 ldd [%o0 + 0x50], %f20
>> 1796 ldd [%o0 + 0x58], %f22
>> 1797 ldd [%o0 + 0x60], %f24
>> 1798 ldd [%o0 + 0x68], %f26
>> 1799 ldd [%o0 + 0x70], %f28
>> 1800 ldd [%o0 + 0x78], %f30
>> 1801 ld [%o1], %fsr
>> 1802 retl
>> 1803 nop
>> 1804
>> 1805 .globl C_LABEL(ndelay)
>> 1806 C_LABEL(ndelay):
>> 1807 save %sp, -STACKFRAME_SZ, %sp
>> 1808 mov %i0, %o0
>> 1809 call .umul
>> 1810 mov 5, %o1
>> 1811 ba delay_continue
>> 1812 nop
>> 1813
>> 1814 .globl C_LABEL(udelay)
>> 1815 C_LABEL(udelay):
>> 1816 save %sp, -STACKFRAME_SZ, %sp
>> 1817 mov %i0, %o0
>> 1818 sethi %hi(0x10c6), %o1
>> 1819 call .umul
>> 1820 or %o1, %lo(0x10c6), %o1
>> 1821 delay_continue:
>> 1822 #ifndef CONFIG_SMP
>> 1823 sethi %hi(C_LABEL(loops_per_jiffy)), %o3
>> 1824 call .umul
>> 1825 ld [%o3 + %lo(C_LABEL(loops_per_jiffy))], %o1
>> 1826 #else
>> 1827 GET_PROCESSOR_OFFSET(o4, o2)
>> 1828 set C_LABEL(cpu_data), %o3
>> 1829 call .umul
>> 1830 ld [%o3 + %o4], %o1
1017 #endif 1831 #endif
>> 1832 call .umul
>> 1833 mov 100, %o0
1018 1834
1019 #ifdef CONFIG_SHADOW_CALL_STACK !! 1835 cmp %o0, 0x0
1020 /* Use a separate shadow call stack f !! 1836 1:
1021 cbnz w4, 3f !! 1837 bne 1b
1022 ldr_this_cpu dst=scs_sp, sym=sdei_sha !! 1838 subcc %o0, 1, %o0
1023 b 4f !! 1839
1024 3: ldr_this_cpu dst=scs_sp, sym=sdei_sha !! 1840 ret
>> 1841 restore
>> 1842
>> 1843 /* Handle a software breakpoint */
>> 1844 /* We have to inform parent that child has stopped */
>> 1845 .align 4
>> 1846 .globl breakpoint_trap
>> 1847 breakpoint_trap:
>> 1848 rd %wim,%l3
>> 1849 SAVE_ALL
>> 1850 wr %l0, PSR_ET, %psr
>> 1851 WRITE_PAUSE
>> 1852
>> 1853 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
>> 1854 call C_LABEL(sparc_breakpoint)
>> 1855 add %sp, STACKFRAME_SZ, %o0
>> 1856
>> 1857 RESTORE_ALL
>> 1858
>> 1859 .align 4
>> 1860 .globl C_LABEL(__handle_exception), flush_patch_exception
>> 1861 C_LABEL(__handle_exception):
>> 1862 flush_patch_exception:
>> 1863 FLUSH_ALL_KERNEL_WINDOWS;
>> 1864 ldd [%o0], %o6
>> 1865 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
>> 1866 mov 1, %g1 ! signal EFAULT condition
>> 1867
>> 1868 .align 4
>> 1869 .globl C_LABEL(kill_user_windows), kuw_patch1_7win
>> 1870 .globl kuw_patch1
>> 1871 kuw_patch1_7win: sll %o3, 6, %o3
>> 1872
>> 1873 /* No matter how much overhead this routine has in the worst
>> 1874 * case scenerio, it is several times better than taking the
>> 1875 * traps with the old method of just doing flush_user_windows().
>> 1876 */
>> 1877 C_LABEL(kill_user_windows):
>> 1878 ld [%g6 + AOFF_task_thread + AOFF_thread_uwinmask], %o0 ! get current umask
>> 1879 orcc %g0, %o0, %g0 ! if no bits set, we are done
>> 1880 be 3f ! nothing to do
>> 1881 rd %psr, %o5 ! must clear interrupts
>> 1882 or %o5, PSR_PIL, %o4 ! or else that could change
>> 1883 wr %o4, 0x0, %psr ! the uwinmask state
>> 1884 WRITE_PAUSE ! burn them cycles
>> 1885 1:
>> 1886 ld [%g6 + AOFF_task_thread + AOFF_thread_uwinmask], %o0 ! get consistant state
>> 1887 orcc %g0, %o0, %g0 ! did an interrupt come in?
>> 1888 be 4f ! yep, we are done
>> 1889 rd %wim, %o3 ! get current wim
>> 1890 srl %o3, 1, %o4 ! simulate a save
>> 1891 kuw_patch1:
>> 1892 sll %o3, 7, %o3 ! compute next wim
>> 1893 or %o4, %o3, %o3 ! result
>> 1894 andncc %o0, %o3, %o0 ! clean this bit in umask
>> 1895 bne kuw_patch1 ! not done yet
>> 1896 srl %o3, 1, %o4 ! begin another save simulation
>> 1897 wr %o3, 0x0, %wim ! set the new wim
>> 1898 st %g0, [%g6 + AOFF_task_thread + AOFF_thread_uwinmask] ! clear uwinmask
1025 4: 1899 4:
1026 #endif !! 1900 wr %o5, 0x0, %psr ! re-enable interrupts
>> 1901 WRITE_PAUSE ! burn baby burn
>> 1902 3:
>> 1903 retl ! return
>> 1904 st %g0, [%g6 + AOFF_task_thread + AOFF_thread_w_saved] ! no windows saved
1027 1905
1028 /* !! 1906 .align 4
1029 * We may have interrupted userspace, !! 1907 .globl C_LABEL(restore_current)
1030 * return-to either of these. We can' !! 1908 C_LABEL(restore_current):
>> 1909 LOAD_CURRENT(g6, o0)
>> 1910 retl
>> 1911 nop
>> 1912
>> 1913 #ifdef CONFIG_PCI
>> 1914 #include <asm/pcic.h>
>> 1915
>> 1916 .align 4
>> 1917 .globl linux_trap_ipi15_pcic
>> 1918 linux_trap_ipi15_pcic:
>> 1919 rd %wim, %l3
>> 1920 SAVE_ALL
>> 1921
>> 1922 /*
>> 1923 * First deactivate NMI
>> 1924 * or we cannot drop ET, cannot get window spill traps.
>> 1925 * The busy loop is necessary because the PIO error
>> 1926 * sometimes does not go away quickly and we trap again.
1031 */ 1927 */
1032 mrs x28, sp_el0 !! 1928 sethi %hi(C_LABEL(pcic_regs)), %o1
1033 ldr_this_cpu dst=x0, sym=__entry_t !! 1929 ld [%o1 + %lo(C_LABEL(pcic_regs))], %o2
1034 msr sp_el0, x0 <<
1035 <<
1036 /* If we interrupted the kernel point <<
1037 and x0, x3, #0xc <<
1038 mrs x1, CurrentEL <<
1039 cmp x0, x1 <<
1040 csel x29, x29, xzr, eq // fp <<
1041 csel x4, x2, xzr, eq // el <<
1042 <<
1043 stp x29, x4, [sp, #-16]! <<
1044 mov x29, sp <<
1045 <<
1046 add x0, x19, #SDEI_EVENT_INTREGS <<
1047 mov x1, x19 <<
1048 bl __sdei_handler <<
1049 <<
1050 msr sp_el0, x28 <<
1051 /* restore regs >x17 that we clobbere <<
1052 mov x4, x19 // keep x4 fo <<
1053 ldp x28, x29, [x4, #SDEI_EVENT_IN <<
1054 ldp x18, x19, [x4, #SDEI_EVENT_IN <<
1055 ldp lr, x1, [x4, #SDEI_EVENT_INTR <<
1056 mov sp, x1 <<
1057 <<
1058 mov x1, x0 // ad <<
1059 /* x0 = (x0 <= SDEI_EV_FAILED) ? <<
1060 * EVENT_COMPLETE:EVENT_COMPLETE_AND_ <<
1061 */ <<
1062 cmp x0, #SDEI_EV_FAILED <<
1063 mov_q x2, SDEI_1_0_FN_SDEI_EVENT_CO <<
1064 mov_q x3, SDEI_1_0_FN_SDEI_EVENT_CO <<
1065 csel x0, x2, x3, ls <<
1066 <<
1067 ldr_l x2, sdei_exit_mode <<
1068 <<
1069 /* Clear the registered-event seen by <<
1070 ldrb w3, [x4, #SDEI_EVENT_PRIORITY <<
1071 cbnz w3, 1f <<
1072 adr_this_cpu dst=x5, sym=sdei_active_ <<
1073 b 2f <<
1074 1: adr_this_cpu dst=x5, sym=sdei_active_ <<
1075 2: str xzr, [x5] <<
1076 1930
1077 alternative_if_not ARM64_UNMAP_KERNEL_AT_EL0 !! 1931 ! Get pending status for printouts later.
1078 sdei_handler_exit exit_mode=x2 !! 1932 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1079 alternative_else_nop_endif !! 1933
1080 !! 1934 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1081 #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 !! 1935 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
1082 tramp_alias dst=x5, sym=__sdei_as !! 1936 1:
1083 br x5 !! 1937 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1084 #endif !! 1938 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1085 SYM_CODE_END(__sdei_asm_handler) !! 1939 bne 1b
1086 NOKPROBE(__sdei_asm_handler) !! 1940 nop
>> 1941
>> 1942 or %l0, PSR_PIL, %l4
>> 1943 wr %l4, 0x0, %psr
>> 1944 WRITE_PAUSE
>> 1945 wr %l4, PSR_ET, %psr
>> 1946 WRITE_PAUSE
>> 1947
>> 1948 call C_LABEL(pcic_nmi)
>> 1949 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
>> 1950 RESTORE_ALL
>> 1951
>> 1952 .globl C_LABEL(pcic_nmi_trap_patch)
>> 1953 C_LABEL(pcic_nmi_trap_patch):
>> 1954 sethi %hi(linux_trap_ipi15_pcic), %l3
>> 1955 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
>> 1956 rd %psr, %l0
>> 1957 .word 0
>> 1958
>> 1959 #endif /* CONFIG_PCI */
1087 1960
1088 SYM_CODE_START(__sdei_handler_abort) !! 1961 /* End of entry.S */
1089 mov_q x0, SDEI_1_0_FN_SDEI_EVENT_CO <<
1090 adr x1, 1f <<
1091 ldr_l x2, sdei_exit_mode <<
1092 sdei_handler_exit exit_mode=x2 <<
1093 // exit the handler and jump to the n <<
1094 // Exit will stomp x0-x17, PSTATE, EL <<
1095 1: ret <<
1096 SYM_CODE_END(__sdei_handler_abort) <<
1097 NOKPROBE(__sdei_handler_abort) <<
1098 #endif /* CONFIG_ARM_SDE_INTERFACE */ <<
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.