1 /* SPDX-License-Identifier: GPL-2.0-only */ !! 1 /* $Id: head.S,v 1.105 2001/08/12 09:08:56 davem Exp $
2 /* !! 2 * head.S: The initial boot code for the Sparc port of Linux.
3 * Low-level CPU initialisation !! 3 *
4 * Based on arch/arm/kernel/head.S !! 4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
>> 5 * Copyright (C) 1995,1999 Pete Zaitcev (zaitcev@yahoo.com)
>> 6 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
>> 7 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
>> 8 * Copyright (C) 1997 Michael A. Griffith (grif@acm.org)
5 * 9 *
6 * Copyright (C) 1994-2002 Russell King !! 10 * CompactPCI platform by Eric Brower, 1999.
7 * Copyright (C) 2003-2012 ARM Ltd. <<
8 * Authors: Catalin Marinas <catalin.marina <<
9 * Will Deacon <will.deacon@arm.co <<
10 */ 11 */
11 12
12 #include <linux/linkage.h> !! 13 #include <linux/version.h>
>> 14 #include <linux/config.h>
13 #include <linux/init.h> 15 #include <linux/init.h>
14 #include <linux/pgtable.h> <<
15 16
16 #include <asm/asm_pointer_auth.h> !! 17 #include <asm/cprefix.h>
17 #include <asm/assembler.h> !! 18 #include <asm/head.h>
18 #include <asm/boot.h> !! 19 #include <asm/asi.h>
19 #include <asm/bug.h> !! 20 #include <asm/contregs.h>
20 #include <asm/ptrace.h> 21 #include <asm/ptrace.h>
21 #include <asm/asm-offsets.h> !! 22 #include <asm/psr.h>
22 #include <asm/cache.h> <<
23 #include <asm/cputype.h> <<
24 #include <asm/el2_setup.h> <<
25 #include <asm/elf.h> <<
26 #include <asm/image.h> <<
27 #include <asm/kernel-pgtable.h> <<
28 #include <asm/kvm_arm.h> <<
29 #include <asm/memory.h> <<
30 #include <asm/pgtable-hwdef.h> <<
31 #include <asm/page.h> 23 #include <asm/page.h>
32 #include <asm/scs.h> !! 24 #include <asm/kdebug.h>
33 #include <asm/smp.h> !! 25 #include <asm/winmacro.h>
34 #include <asm/sysreg.h> !! 26 #include <asm/thread_info.h> /* TI_UWINMASK */
35 #include <asm/thread_info.h> !! 27 #include <asm/errno.h>
36 #include <asm/virt.h> !! 28 #include <asm/pgtsrmmu.h> /* SRMMU_PGDIR_SHIFT */
>> 29
>> 30 .data
>> 31 /*
>> 32 * The following are used with the prom_vector node-ops to figure out
>> 33 * the cpu-type
>> 34 */
37 35
38 #include "efi-header.S" !! 36 .align 4
>> 37 .globl C_LABEL(cputyp)
>> 38 C_LABEL(cputyp):
>> 39 .word 1
>> 40
>> 41 .align 4
>> 42 .globl C_LABEL(cputypval)
>> 43 C_LABEL(cputypval):
>> 44 .asciz "sun4c"
>> 45 .ascii " "
39 46
40 #if (PAGE_OFFSET & 0x1fffff) != 0 !! 47 C_LABEL(cputypvalend):
41 #error PAGE_OFFSET must be at least 2MB aligne !! 48 C_LABEL(cputypvallen) = C_LABEL(cputypvar) - C_LABEL(cputypval)
42 #endif <<
43 49
>> 50 .align 4
44 /* 51 /*
45 * Kernel startup entry point. !! 52 * Sun people can't spell worth damn. "compatability" indeed.
46 * --------------------------- !! 53 * At least we *know* we can't spell, and use a spell-checker.
47 * !! 54 */
48 * The requirements are: <<
49 * MMU = off, D-cache = off, I-cache = on or <<
50 * x0 = physical address to the FDT blob. <<
51 * <<
52 * Note that the callee-saved registers are us <<
53 * that are useful before the MMU is enabled. <<
54 * in the entry routines. <<
55 */ <<
56 __HEAD <<
57 /* <<
58 * DO NOT MODIFY. Image header expecte <<
59 */ <<
60 efi_signature_nop <<
61 b primary_entry <<
62 .quad 0 <<
63 le64sym _kernel_size_le <<
64 le64sym _kernel_flags_le <<
65 .quad 0 <<
66 .quad 0 <<
67 .quad 0 <<
68 .ascii ARM64_IMAGE_MAGIC <<
69 .long .Lpe_header_offset <<
70 <<
71 __EFI_PE_HEADER <<
72 <<
73 .section ".idmap.text","a" <<
74 <<
75 /* <<
76 * The following callee saved general <<
77 * primary lowlevel boot path: <<
78 * <<
79 * Register Scope <<
80 * x19 primary_entry() .. star <<
81 * x20 primary_entry() .. __pr <<
82 * x21 primary_entry() .. star <<
83 */ <<
84 SYM_CODE_START(primary_entry) <<
85 bl record_mmu_state <<
86 bl preserve_boot_args <<
87 <<
88 adrp x1, early_init_stack <<
89 mov sp, x1 <<
90 mov x29, xzr <<
91 adrp x0, init_idmap_pg_dir <<
92 mov x1, xzr <<
93 bl __pi_create_init_idmap <<
94 <<
95 /* <<
96 * If the page tables have been popula <<
97 * accesses (MMU disabled), invalidate <<
98 * remove any speculatively loaded cac <<
99 */ <<
100 cbnz x19, 0f <<
101 dmb sy <<
102 mov x1, x0 <<
103 adrp x0, init_idmap_pg_dir <<
104 adr_l x2, dcache_inval_poc <<
105 blr x2 <<
106 b 1f <<
107 <<
108 /* <<
109 * If we entered with the MMU and cach <<
110 * of the primary boot code to the PoC <<
111 * the MMU off. <<
112 */ <<
113 0: adrp x0, __idmap_text_start <<
114 adr_l x1, __idmap_text_end <<
115 adr_l x2, dcache_clean_poc <<
116 blr x2 <<
117 <<
118 1: mov x0, x19 <<
119 bl init_kernel_el <<
120 mov x20, x0 <<
121 <<
122 /* <<
123 * The following calls CPU setup code, <<
124 * details. <<
125 * On return, the CPU will be ready fo <<
126 * the TCR will have been set. <<
127 */ <<
128 bl __cpu_setup <<
129 b __primary_switch <<
130 SYM_CODE_END(primary_entry) <<
131 <<
132 __INIT <<
133 SYM_CODE_START_LOCAL(record_mmu_state) <<
134 mrs x19, CurrentEL <<
135 cmp x19, #CurrentEL_EL2 <<
136 mrs x19, sctlr_el1 <<
137 b.ne 0f <<
138 mrs x19, sctlr_el2 <<
139 0: <<
140 CPU_LE( tbnz x19, #SCTLR_ELx_EE_SHIFT, 1f <<
141 CPU_BE( tbz x19, #SCTLR_ELx_EE_SHIFT, 1f <<
142 tst x19, #SCTLR_ELx_C <<
143 and x19, x19, #SCTLR_ELx_M <<
144 csel x19, xzr, x19, eq <<
145 ret <<
146 <<
147 /* <<
148 * Set the correct endianness early so <<
149 * before init_kernel_el() occur in th <<
150 * this means the MMU must be disabled <<
151 * up getting interpreted with the wro <<
152 */ <<
153 1: eor x19, x19, #SCTLR_ELx_EE <<
154 bic x19, x19, #SCTLR_ELx_M <<
155 b.ne 2f <<
156 pre_disable_mmu_workaround <<
157 msr sctlr_el2, x19 <<
158 b 3f <<
159 2: pre_disable_mmu_workaround <<
160 msr sctlr_el1, x19 <<
161 3: isb <<
162 mov x19, xzr <<
163 ret <<
164 SYM_CODE_END(record_mmu_state) <<
165 55
166 /* !! 56 /* Uh, actually Linus it is I who cannot spell. Too much murky
167 * Preserve the arguments passed by the bootlo !! 57 * Sparc assembly will do this to ya.
168 */ 58 */
169 SYM_CODE_START_LOCAL(preserve_boot_args) !! 59 C_LABEL(cputypvar):
170 mov x21, x0 !! 60 .asciz "compatability"
171 61
172 adr_l x0, boot_args !! 62 /* Tested on SS-5, SS-10. Probably someone at Sun applied a spell-checker. */
173 stp x21, x1, [x0] !! 63 .align 4
174 stp x2, x3, [x0, #16] !! 64 C_LABEL(cputypvar_sun4m):
175 !! 65 .asciz "compatible"
176 cbnz x19, 0f !! 66
177 dmb sy !! 67 .align 4
178 !! 68
179 !! 69 #ifndef CONFIG_SUN4
180 add x1, x0, #0x20 !! 70 sun4_notsup:
181 b dcache_inval_poc !! 71 .asciz "Sparc-Linux sun4 needs a specially compiled kernel, turn CONFIG_SUN4 on.\n\n"
182 0: str_l x19, mmu_enabled_at_boot, x0 !! 72 .align 4
183 ret !! 73 #else
184 SYM_CODE_END(preserve_boot_args) !! 74 sun4cdm_notsup:
185 !! 75 .asciz "Kernel compiled with CONFIG_SUN4 cannot run on SUN4C/SUN4M/SUN4D\nTurn CONFIG_SUN4 off.\n\n"
186 /* !! 76 .align 4
187 * Initialize CPU registers with task- !! 77 #endif
188 * <<
189 * Create a final frame record at task <<
190 * that the unwinder can identify the <<
191 * its location in the task stack. We <<
192 * for consistency with user tasks and <<
193 */ <<
194 .macro init_cpu_task tsk, tmp1, tmp2 <<
195 msr sp_el0, \tsk <<
196 <<
197 ldr \tmp1, [\tsk, #TSK_STACK] <<
198 add sp, \tmp1, #THREAD_SIZE <<
199 sub sp, sp, #PT_REGS_SIZE <<
200 <<
201 stp xzr, xzr, [sp, #S_STACKFRAME] <<
202 add x29, sp, #S_STACKFRAME <<
203 <<
204 scs_load_current <<
205 <<
206 adr_l \tmp1, __per_cpu_offset <<
207 ldr w\tmp2, [\tsk, #TSK_TI_CPU] <<
208 ldr \tmp1, [\tmp1, \tmp2, lsl #3] <<
209 set_this_cpu_offset \tmp1 <<
210 .endm <<
211 78
212 /* !! 79 sun4e_notsup:
213 * The following fragment of code is executed !! 80 .asciz "Sparc-Linux sun4e support does not exist\n\n"
214 * !! 81 .align 4
215 * x0 = __pa(KERNEL_START) !! 82
216 */ !! 83 #ifndef CONFIG_SUNOS_EMUL
217 SYM_FUNC_START_LOCAL(__primary_switched) !! 84 #undef SUNOS_SYSCALL_TRAP
218 adr_l x4, init_task !! 85 #define SUNOS_SYSCALL_TRAP SUNOS_NO_SYSCALL_TRAP
219 init_cpu_task x4, x5, x6 !! 86 #endif
220 87
221 adr_l x8, vectors !! 88 /* The Sparc trap table, bootloader gives us control at _start. */
222 msr vbar_el1, x8 !! 89 .text
223 isb !! 90 .globl start, _stext, _start, __stext
>> 91 .globl C_LABEL(trapbase)
>> 92 _start: /* danger danger */
>> 93 __stext:
>> 94 _stext:
>> 95 start:
>> 96 C_LABEL(trapbase):
>> 97 #ifdef CONFIG_SMP
>> 98 C_LABEL(trapbase_cpu0):
>> 99 #endif
>> 100 /* We get control passed to us here at t_zero. */
>> 101 t_zero: b gokernel; nop; nop; nop;
>> 102 t_tflt: SPARC_TFAULT /* Inst. Access Exception */
>> 103 t_bins: TRAP_ENTRY(0x2, bad_instruction) /* Illegal Instruction */
>> 104 t_pins: TRAP_ENTRY(0x3, priv_instruction) /* Privileged Instruction */
>> 105 t_fpd: TRAP_ENTRY(0x4, fpd_trap_handler) /* Floating Point Disabled */
>> 106 t_wovf: WINDOW_SPILL /* Window Overflow */
>> 107 t_wunf: WINDOW_FILL /* Window Underflow */
>> 108 t_mna: TRAP_ENTRY(0x7, mna_handler) /* Memory Address Not Aligned */
>> 109 t_fpe: TRAP_ENTRY(0x8, fpe_trap_handler) /* Floating Point Exception */
>> 110 t_dflt: SPARC_DFAULT /* Data Miss Exception */
>> 111 t_tio: TRAP_ENTRY(0xa, do_tag_overflow) /* Tagged Instruction Ovrflw */
>> 112 t_wpt: TRAP_ENTRY(0xb, do_watchpoint) /* Watchpoint Detected */
>> 113 t_badc: BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
>> 114 t_irq1: TRAP_ENTRY_INTERRUPT(1) /* IRQ Software/SBUS Level 1 */
>> 115 t_irq2: TRAP_ENTRY_INTERRUPT(2) /* IRQ SBUS Level 2 */
>> 116 t_irq3: TRAP_ENTRY_INTERRUPT(3) /* IRQ SCSI/DMA/SBUS Level 3 */
>> 117 t_irq4: TRAP_ENTRY_INTERRUPT(4) /* IRQ Software Level 4 */
>> 118 t_irq5: TRAP_ENTRY_INTERRUPT(5) /* IRQ SBUS/Ethernet Level 5 */
>> 119 t_irq6: TRAP_ENTRY_INTERRUPT(6) /* IRQ Software Level 6 */
>> 120 t_irq7: TRAP_ENTRY_INTERRUPT(7) /* IRQ Video/SBUS Level 5 */
>> 121 t_irq8: TRAP_ENTRY_INTERRUPT(8) /* IRQ SBUS Level 6 */
>> 122 t_irq9: TRAP_ENTRY_INTERRUPT(9) /* IRQ SBUS Level 7 */
>> 123 t_irq10:TRAP_ENTRY_INTERRUPT(10) /* IRQ Timer #1 (one we use) */
>> 124 t_irq11:TRAP_ENTRY_INTERRUPT(11) /* IRQ Floppy Intr. */
>> 125 t_irq12:TRAP_ENTRY_INTERRUPT(12) /* IRQ Zilog serial chip */
>> 126 t_irq13:TRAP_ENTRY_INTERRUPT(13) /* IRQ Audio Intr. */
>> 127 t_irq14:TRAP_ENTRY_INTERRUPT(14) /* IRQ Timer #2 */
>> 128 .globl t_nmi
>> 129 #ifndef CONFIG_SMP
>> 130 t_nmi: NMI_TRAP /* Level 15 (NMI) */
>> 131 #else
>> 132 t_nmi: TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)
>> 133 #endif
>> 134 t_racc: TRAP_ENTRY(0x20, do_reg_access) /* General Register Access Error */
>> 135 t_iacce:BAD_TRAP(0x21) /* Instr Access Error */
>> 136 t_bad22:BAD_TRAP(0x22) BAD_TRAP(0x23)
>> 137 t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled) /* Co-Processor Disabled */
>> 138 t_uflsh:SKIP_TRAP(0x25, unimp_flush) /* Unimplemented FLUSH inst. */
>> 139 t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)
>> 140 t_cpexc:TRAP_ENTRY(0x28, do_cp_exception) /* Co-Processor Exception */
>> 141 t_dacce:SPARC_DFAULT /* Data Access Error */
>> 142 t_hwdz: TRAP_ENTRY(0x2a, do_hw_divzero) /* Division by zero, you lose... */
>> 143 t_dserr:BAD_TRAP(0x2b) /* Data Store Error */
>> 144 t_daccm:BAD_TRAP(0x2c) /* Data Access MMU-Miss */
>> 145 t_bad2d:BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
>> 146 t_bad32:BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
>> 147 t_bad37:BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
>> 148 t_iaccm:BAD_TRAP(0x3c) /* Instr Access MMU-Miss */
>> 149 t_bad3d:BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40) BAD_TRAP(0x41)
>> 150 t_bad42:BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45) BAD_TRAP(0x46)
>> 151 t_bad47:BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a) BAD_TRAP(0x4b)
>> 152 t_bad4c:BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f) BAD_TRAP(0x50)
>> 153 t_bad51:BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
>> 154 t_bad56:BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
>> 155 t_bad5b:BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
>> 156 t_bad60:BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
>> 157 t_bad65:BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
>> 158 t_bad6a:BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
>> 159 t_bad6f:BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
>> 160 t_bad74:BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
>> 161 t_bad79:BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
>> 162 t_bad7e:BAD_TRAP(0x7e) BAD_TRAP(0x7f)
>> 163 t_sunos:SUNOS_SYSCALL_TRAP /* SunOS System Call */
>> 164 t_sbkpt:BREAKPOINT_TRAP /* Software Breakpoint/KGDB */
>> 165 t_divz: TRAP_ENTRY(0x82, do_hw_divzero) /* Divide by zero trap */
>> 166 t_flwin:TRAP_ENTRY(0x83, do_flush_windows) /* Flush Windows Trap */
>> 167 t_clwin:BAD_TRAP(0x84) /* Clean Windows Trap */
>> 168 t_rchk: BAD_TRAP(0x85) /* Range Check */
>> 169 t_funal:BAD_TRAP(0x86) /* Fix Unaligned Access Trap */
>> 170 t_iovf: BAD_TRAP(0x87) /* Integer Overflow Trap */
>> 171 t_slowl:SOLARIS_SYSCALL_TRAP /* Slowaris System Call */
>> 172 t_netbs:NETBSD_SYSCALL_TRAP /* Net-B.S. System Call */
>> 173 t_bad8a:BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c) BAD_TRAP(0x8d) BAD_TRAP(0x8e)
>> 174 t_bad8f:BAD_TRAP(0x8f)
>> 175 t_linux:LINUX_SYSCALL_TRAP /* Linux System Call */
>> 176 t_bad91:BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94) BAD_TRAP(0x95)
>> 177 t_bad96:BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99) BAD_TRAP(0x9a)
>> 178 t_bad9b:BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e) BAD_TRAP(0x9f)
>> 179 t_getcc:GETCC_TRAP /* Get Condition Codes */
>> 180 t_setcc:SETCC_TRAP /* Set Condition Codes */
>> 181 t_getpsr:GETPSR_TRAP /* Get PSR Register */
>> 182 t_bada3:BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
>> 183 t_slowi:INDIRECT_SOLARIS_SYSCALL(156)
>> 184 t_bada8:BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
>> 185 t_badac:BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
>> 186 t_badb1:BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
>> 187 t_badb6:BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
>> 188 t_badbb:BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
>> 189 t_badc0:BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
>> 190 t_badc5:BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
>> 191 t_badca:BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
>> 192 t_badcf:BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
>> 193 t_badd4:BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
>> 194 t_badd9:BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
>> 195 t_badde:BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
>> 196 t_bade3:BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
>> 197 t_bade8:BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
>> 198 t_baded:BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
>> 199 t_badf2:BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
>> 200 t_badf7:BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
>> 201 t_badfc:BAD_TRAP(0xfc) BAD_TRAP(0xfd)
>> 202 dbtrap: BAD_TRAP(0xfe) /* Debugger/PROM breakpoint #1 */
>> 203 dbtrap2:BAD_TRAP(0xff) /* Debugger/PROM breakpoint #2 */
>> 204
>> 205 .globl C_LABEL(end_traptable)
>> 206 C_LABEL(end_traptable):
>> 207
>> 208 #ifdef CONFIG_SMP
>> 209 /* Trap tables for the other cpus. */
>> 210 .globl C_LABEL(trapbase_cpu1), C_LABEL(trapbase_cpu2), C_LABEL(trapbase_cpu3)
>> 211 C_LABEL(trapbase_cpu1):
>> 212 BAD_TRAP(0x0) SRMMU_TFAULT TRAP_ENTRY(0x2, bad_instruction)
>> 213 TRAP_ENTRY(0x3, priv_instruction) TRAP_ENTRY(0x4, fpd_trap_handler)
>> 214 WINDOW_SPILL WINDOW_FILL TRAP_ENTRY(0x7, mna_handler)
>> 215 TRAP_ENTRY(0x8, fpe_trap_handler) SRMMU_DFAULT
>> 216 TRAP_ENTRY(0xa, do_tag_overflow) TRAP_ENTRY(0xb, do_watchpoint)
>> 217 BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
>> 218 TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)
>> 219 TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)
>> 220 TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)
>> 221 TRAP_ENTRY_INTERRUPT(7) TRAP_ENTRY_INTERRUPT(8)
>> 222 TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)
>> 223 TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)
>> 224 TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)
>> 225 TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)
>> 226 TRAP_ENTRY(0x20, do_reg_access) BAD_TRAP(0x21) BAD_TRAP(0x22)
>> 227 BAD_TRAP(0x23) TRAP_ENTRY(0x24, do_cp_disabled) SKIP_TRAP(0x25, unimp_flush)
>> 228 BAD_TRAP(0x26) BAD_TRAP(0x27) TRAP_ENTRY(0x28, do_cp_exception)
>> 229 SRMMU_DFAULT TRAP_ENTRY(0x2a, do_hw_divzero) BAD_TRAP(0x2b) BAD_TRAP(0x2c)
>> 230 BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
>> 231 BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
>> 232 BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
>> 233 BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)
>> 234 BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)
>> 235 BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)
>> 236 BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)
>> 237 BAD_TRAP(0x50)
>> 238 BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
>> 239 BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
>> 240 BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
>> 241 BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
>> 242 BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
>> 243 BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
>> 244 BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
>> 245 BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
>> 246 BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
>> 247 BAD_TRAP(0x7e) BAD_TRAP(0x7f)
>> 248 SUNOS_SYSCALL_TRAP
>> 249 BREAKPOINT_TRAP
>> 250 TRAP_ENTRY(0x82, do_hw_divzero)
>> 251 TRAP_ENTRY(0x83, do_flush_windows) BAD_TRAP(0x84) BAD_TRAP(0x85)
>> 252 BAD_TRAP(0x86) BAD_TRAP(0x87) SOLARIS_SYSCALL_TRAP
>> 253 NETBSD_SYSCALL_TRAP BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)
>> 254 BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)
>> 255 LINUX_SYSCALL_TRAP BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)
>> 256 BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)
>> 257 BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)
>> 258 BAD_TRAP(0x9f) GETCC_TRAP SETCC_TRAP GETPSR_TRAP
>> 259 BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
>> 260 INDIRECT_SOLARIS_SYSCALL(156) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
>> 261 BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
>> 262 BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
>> 263 BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
>> 264 BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
>> 265 BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
>> 266 BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
>> 267 BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
>> 268 BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
>> 269 BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
>> 270 BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
>> 271 BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
>> 272 BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
>> 273 BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
>> 274 BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
>> 275 BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
>> 276 BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
>> 277 BAD_TRAP(0xfc) BAD_TRAP(0xfd) BAD_TRAP(0xfe) BAD_TRAP(0xff)
>> 278
>> 279 C_LABEL(trapbase_cpu2):
>> 280 BAD_TRAP(0x0) SRMMU_TFAULT TRAP_ENTRY(0x2, bad_instruction)
>> 281 TRAP_ENTRY(0x3, priv_instruction) TRAP_ENTRY(0x4, fpd_trap_handler)
>> 282 WINDOW_SPILL WINDOW_FILL TRAP_ENTRY(0x7, mna_handler)
>> 283 TRAP_ENTRY(0x8, fpe_trap_handler) SRMMU_DFAULT
>> 284 TRAP_ENTRY(0xa, do_tag_overflow) TRAP_ENTRY(0xb, do_watchpoint)
>> 285 BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
>> 286 TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)
>> 287 TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)
>> 288 TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)
>> 289 TRAP_ENTRY_INTERRUPT(7) TRAP_ENTRY_INTERRUPT(8)
>> 290 TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)
>> 291 TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)
>> 292 TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)
>> 293 TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)
>> 294 TRAP_ENTRY(0x20, do_reg_access) BAD_TRAP(0x21) BAD_TRAP(0x22)
>> 295 BAD_TRAP(0x23) TRAP_ENTRY(0x24, do_cp_disabled) SKIP_TRAP(0x25, unimp_flush)
>> 296 BAD_TRAP(0x26) BAD_TRAP(0x27) TRAP_ENTRY(0x28, do_cp_exception)
>> 297 SRMMU_DFAULT TRAP_ENTRY(0x2a, do_hw_divzero) BAD_TRAP(0x2b) BAD_TRAP(0x2c)
>> 298 BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
>> 299 BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
>> 300 BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
>> 301 BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)
>> 302 BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)
>> 303 BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)
>> 304 BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)
>> 305 BAD_TRAP(0x50)
>> 306 BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
>> 307 BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
>> 308 BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
>> 309 BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
>> 310 BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
>> 311 BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
>> 312 BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
>> 313 BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
>> 314 BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
>> 315 BAD_TRAP(0x7e) BAD_TRAP(0x7f)
>> 316 SUNOS_SYSCALL_TRAP
>> 317 BREAKPOINT_TRAP
>> 318 TRAP_ENTRY(0x82, do_hw_divzero)
>> 319 TRAP_ENTRY(0x83, do_flush_windows) BAD_TRAP(0x84) BAD_TRAP(0x85)
>> 320 BAD_TRAP(0x86) BAD_TRAP(0x87) SOLARIS_SYSCALL_TRAP
>> 321 NETBSD_SYSCALL_TRAP BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)
>> 322 BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)
>> 323 LINUX_SYSCALL_TRAP BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)
>> 324 BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)
>> 325 BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)
>> 326 BAD_TRAP(0x9f) GETCC_TRAP SETCC_TRAP GETPSR_TRAP
>> 327 BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
>> 328 INDIRECT_SOLARIS_SYSCALL(156) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
>> 329 BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
>> 330 BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
>> 331 BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
>> 332 BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
>> 333 BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
>> 334 BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
>> 335 BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
>> 336 BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
>> 337 BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
>> 338 BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
>> 339 BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
>> 340 BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
>> 341 BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
>> 342 BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
>> 343 BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
>> 344 BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
>> 345 BAD_TRAP(0xfc) BAD_TRAP(0xfd) BAD_TRAP(0xfe) BAD_TRAP(0xff)
>> 346
>> 347 C_LABEL(trapbase_cpu3):
>> 348 BAD_TRAP(0x0) SRMMU_TFAULT TRAP_ENTRY(0x2, bad_instruction)
>> 349 TRAP_ENTRY(0x3, priv_instruction) TRAP_ENTRY(0x4, fpd_trap_handler)
>> 350 WINDOW_SPILL WINDOW_FILL TRAP_ENTRY(0x7, mna_handler)
>> 351 TRAP_ENTRY(0x8, fpe_trap_handler) SRMMU_DFAULT
>> 352 TRAP_ENTRY(0xa, do_tag_overflow) TRAP_ENTRY(0xb, do_watchpoint)
>> 353 BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
>> 354 TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)
>> 355 TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)
>> 356 TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)
>> 357 TRAP_ENTRY_INTERRUPT(7) TRAP_ENTRY_INTERRUPT(8)
>> 358 TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)
>> 359 TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)
>> 360 TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)
>> 361 TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)
>> 362 TRAP_ENTRY(0x20, do_reg_access) BAD_TRAP(0x21) BAD_TRAP(0x22)
>> 363 BAD_TRAP(0x23) TRAP_ENTRY(0x24, do_cp_disabled) SKIP_TRAP(0x25, unimp_flush)
>> 364 BAD_TRAP(0x26) BAD_TRAP(0x27) TRAP_ENTRY(0x28, do_cp_exception)
>> 365 SRMMU_DFAULT TRAP_ENTRY(0x2a, do_hw_divzero) BAD_TRAP(0x2b) BAD_TRAP(0x2c)
>> 366 BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
>> 367 BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
>> 368 BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
>> 369 BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)
>> 370 BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)
>> 371 BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)
>> 372 BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)
>> 373 BAD_TRAP(0x50)
>> 374 BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
>> 375 BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
>> 376 BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
>> 377 BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
>> 378 BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
>> 379 BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
>> 380 BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
>> 381 BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
>> 382 BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
>> 383 BAD_TRAP(0x7e) BAD_TRAP(0x7f)
>> 384 SUNOS_SYSCALL_TRAP
>> 385 BREAKPOINT_TRAP
>> 386 TRAP_ENTRY(0x82, do_hw_divzero)
>> 387 TRAP_ENTRY(0x83, do_flush_windows) BAD_TRAP(0x84) BAD_TRAP(0x85)
>> 388 BAD_TRAP(0x86) BAD_TRAP(0x87) SOLARIS_SYSCALL_TRAP
>> 389 NETBSD_SYSCALL_TRAP BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)
>> 390 BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)
>> 391 LINUX_SYSCALL_TRAP BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)
>> 392 BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)
>> 393 BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)
>> 394 BAD_TRAP(0x9f) GETCC_TRAP SETCC_TRAP GETPSR_TRAP
>> 395 BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
>> 396 INDIRECT_SOLARIS_SYSCALL(156) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
>> 397 BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
>> 398 BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
>> 399 BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
>> 400 BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
>> 401 BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
>> 402 BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
>> 403 BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
>> 404 BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
>> 405 BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
>> 406 BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
>> 407 BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
>> 408 BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
>> 409 BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
>> 410 BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
>> 411 BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
>> 412 BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
>> 413 BAD_TRAP(0xfc) BAD_TRAP(0xfd) BAD_TRAP(0xfe) BAD_TRAP(0xff)
224 414
225 stp x29, x30, [sp, #-16]! !! 415 #endif
226 mov x29, sp !! 416 .align PAGE_SIZE
227 417
228 str_l x21, __fdt_pointer, x5 !! 418 /* This was the only reasonable way I could think of to properly align
>> 419 * these page-table data structures.
>> 420 */
>> 421 .globl C_LABEL(pg0), C_LABEL(pg1), C_LABEL(pg2), C_LABEL(pg3)
>> 422 .globl C_LABEL(empty_bad_page)
>> 423 .globl C_LABEL(empty_bad_page_table)
>> 424 .globl C_LABEL(empty_zero_page)
>> 425 .globl C_LABEL(swapper_pg_dir)
>> 426 C_LABEL(swapper_pg_dir): .skip PAGE_SIZE
>> 427 C_LABEL(pg0): .skip PAGE_SIZE
>> 428 C_LABEL(pg1): .skip PAGE_SIZE
>> 429 C_LABEL(pg2): .skip PAGE_SIZE
>> 430 C_LABEL(pg3): .skip PAGE_SIZE
>> 431 C_LABEL(empty_bad_page): .skip PAGE_SIZE
>> 432 C_LABEL(empty_bad_page_table): .skip PAGE_SIZE
>> 433 C_LABEL(empty_zero_page): .skip PAGE_SIZE
>> 434
>> 435 .global C_LABEL(root_flags)
>> 436 .global C_LABEL(ram_flags)
>> 437 .global C_LABEL(root_dev)
>> 438 .global C_LABEL(sparc_ramdisk_image)
>> 439 .global C_LABEL(sparc_ramdisk_size)
>> 440
>> 441 /* This stuff has to be in sync with SILO and other potential boot loaders
>> 442 * Fields should be kept upward compatible and whenever any change is made,
>> 443 * HdrS version should be incremented.
>> 444 */
>> 445 .ascii "HdrS"
>> 446 .word LINUX_VERSION_CODE
>> 447 .half 0x0203 /* HdrS version */
>> 448 C_LABEL(root_flags):
>> 449 .half 1
>> 450 C_LABEL(root_dev):
>> 451 .half 0
>> 452 C_LABEL(ram_flags):
>> 453 .half 0
>> 454 C_LABEL(sparc_ramdisk_image):
>> 455 .word 0
>> 456 C_LABEL(sparc_ramdisk_size):
>> 457 .word 0
>> 458 .word C_LABEL(reboot_command)
>> 459 .word 0, 0, 0
>> 460 .word _end
>> 461
>> 462 /* Cool, here we go. Pick up the romvec pointer in %o0 and stash it in
>> 463 * %g7 and at prom_vector_p. And also quickly check whether we are on
>> 464 * a v0, v2, or v3 prom.
>> 465 */
>> 466 gokernel:
>> 467 /* Ok, it's nice to know, as early as possible, if we
>> 468 * are already mapped where we expect to be in virtual
>> 469 * memory. The Solaris /boot elf format bootloader
>> 470 * will peek into our elf header and load us where
>> 471 * we want to be, otherwise we have to re-map.
>> 472 *
>> 473 * Some boot loaders don't place the jmp'rs address
>> 474 * in %o7, so we do a pc-relative call to a local
>> 475 * label, then see what %o7 has.
>> 476 */
>> 477
>> 478 mov %o7, %g4 ! Save %o7
>> 479
>> 480 /* Jump to it, and pray... */
>> 481 current_pc:
>> 482 call 1f
>> 483 nop
229 484
230 adrp x4, _text !! 485 1:
231 sub x4, x4, x0 !! 486 mov %o7, %g3
232 str_l x4, kimage_voffset, x5 <<
233 487
234 mov x0, x20 !! 488 tst %o0
235 bl set_cpu_boot_mode_flag !! 489 be no_sun4u_here
>> 490 mov %g4, %o7 /* Previous %o7. */
>> 491
>> 492 mov %o0, %l0 ! stash away romvec
>> 493 mov %o0, %g7 ! put it here too
>> 494 mov %o1, %l1 ! stash away debug_vec too
>> 495
>> 496 /* Ok, let's check out our run time program counter. */
>> 497 set current_pc, %g5
>> 498 cmp %g3, %g5
>> 499 be already_mapped
>> 500 nop
>> 501
>> 502 /* %l6 will hold the offset we have to subtract
>> 503 * from absolute symbols in order to access areas
>> 504 * in our own image. If already mapped this is
>> 505 * just plain zero, else it is KERNBASE.
>> 506 */
>> 507 set KERNBASE, %l6
>> 508 b copy_prom_lvl14
>> 509 nop
>> 510
>> 511 already_mapped:
>> 512 mov 0, %l6
>> 513
>> 514 /* Copy over the Prom's level 14 clock handler. */
>> 515 copy_prom_lvl14:
>> 516 #if 1
>> 517 /* DJHR
>> 518 * preserve our linked/calculated instructions
>> 519 */
>> 520 set C_LABEL(lvl14_save), %g1
>> 521 set t_irq14, %g3
>> 522 sub %g1, %l6, %g1 ! translate to physical
>> 523 sub %g3, %l6, %g3 ! translate to physical
>> 524 ldd [%g3], %g4
>> 525 std %g4, [%g1]
>> 526 ldd [%g3+8], %g4
>> 527 std %g4, [%g1+8]
>> 528 #endif
>> 529 rd %tbr, %g1
>> 530 andn %g1, 0xfff, %g1 ! proms trap table base
>> 531 or %g0, (0x1e<<4), %g2 ! offset to lvl14 intr
>> 532 or %g1, %g2, %g2
>> 533 set t_irq14, %g3
>> 534 sub %g3, %l6, %g3
>> 535 ldd [%g2], %g4
>> 536 std %g4, [%g3]
>> 537 ldd [%g2 + 0x8], %g4
>> 538 std %g4, [%g3 + 0x8] ! Copy proms handler
>> 539
>> 540 /* Must determine whether we are on a sun4c MMU, SRMMU, or SUN4/400 MUTANT
>> 541 * MMU so we can remap ourselves properly. DON'T TOUCH %l0 thru %l5 in these
>> 542 * remapping routines, we need their values afterwards!
>> 543 */
>> 544 /* Now check whether we are already mapped, if we
>> 545 * are we can skip all this garbage coming up.
>> 546 */
>> 547 copy_prom_done:
>> 548 cmp %l6, 0
>> 549 be go_to_highmem ! this will be a nop then
>> 550 nop
>> 551
>> 552 set LOAD_ADDR, %g6
>> 553 cmp %g7, %g6
>> 554 bne remap_not_a_sun4 ! This is not a Sun4
>> 555 nop
>> 556
>> 557 or %g0, 0x1, %g1
>> 558 lduba [%g1] ASI_CONTROL, %g1 ! Only safe to try on Sun4.
>> 559 subcc %g1, 0x24, %g0 ! Is this a mutant Sun4/400???
>> 560 be sun4_mutant_remap ! Ugh, it is...
>> 561 nop
>> 562
>> 563 b sun4_normal_remap ! regular sun4, 2 level mmu
>> 564 nop
>> 565
>> 566 remap_not_a_sun4:
>> 567 lda [%g0] ASI_M_MMUREGS, %g1 ! same as ASI_PTE on sun4c
>> 568 and %g1, 0x1, %g1 ! Test SRMMU Enable bit ;-)
>> 569 cmp %g1, 0x0
>> 570 be sun4c_remap ! A sun4c MMU or normal Sun4
>> 571 nop
>> 572 srmmu_remap:
>> 573 /* First, check for a viking (TI) module. */
>> 574 set 0x40000000, %g2
>> 575 rd %psr, %g3
>> 576 and %g2, %g3, %g3
>> 577 subcc %g3, 0x0, %g0
>> 578 bz srmmu_nviking
>> 579 nop
>> 580
>> 581 /* Figure out what kind of viking we are on.
>> 582 * We need to know if we have to play with the
>> 583 * AC bit and disable traps or not.
>> 584 */
>> 585
>> 586 /* I've only seen MicroSparc's on SparcClassics with this
>> 587 * bit set.
>> 588 */
>> 589 set 0x800, %g2
>> 590 lda [%g0] ASI_M_MMUREGS, %g3 ! peek in the control reg
>> 591 and %g2, %g3, %g3
>> 592 subcc %g3, 0x0, %g0
>> 593 bnz srmmu_nviking ! is in mbus mode
>> 594 nop
>> 595
>> 596 rd %psr, %g3 ! DO NOT TOUCH %g3
>> 597 andn %g3, PSR_ET, %g2
>> 598 wr %g2, 0x0, %psr
>> 599 WRITE_PAUSE
>> 600
>> 601 /* Get context table pointer, then convert to
>> 602 * a physical address, which is 36 bits.
>> 603 */
>> 604 set AC_M_CTPR, %g4
>> 605 lda [%g4] ASI_M_MMUREGS, %g4
>> 606 sll %g4, 0x4, %g4 ! We use this below
>> 607 ! DO NOT TOUCH %g4
>> 608
>> 609 /* Set the AC bit in the Viking's MMU control reg. */
>> 610 lda [%g0] ASI_M_MMUREGS, %g5 ! DO NOT TOUCH %g5
>> 611 set 0x8000, %g6 ! AC bit mask
>> 612 or %g5, %g6, %g6 ! Or it in...
>> 613 sta %g6, [%g0] ASI_M_MMUREGS ! Close your eyes...
>> 614
>> 615 /* Grrr, why does it seem like every other load/store
>> 616 * on the sun4m is in some ASI space...
>> 617 * Fine with me, let's get the pointer to the level 1
>> 618 * page table directory and fetch its entry.
>> 619 */
>> 620 lda [%g4] ASI_M_BYPASS, %o1 ! This is a level 1 ptr
>> 621 srl %o1, 0x4, %o1 ! Clear low 4 bits
>> 622 sll %o1, 0x8, %o1 ! Make physical
>> 623
>> 624 /* Ok, pull in the PTD. */
>> 625 lda [%o1] ASI_M_BYPASS, %o2 ! This is the 0x0 16MB pgd
>> 626
>> 627 /* Calculate to KERNBASE entry. */
>> 628 add %o1, KERNBASE >> (SRMMU_PGDIR_SHIFT - 2), %o3
>> 629
>> 630 /* Poke the entry into the calculated address. */
>> 631 sta %o2, [%o3] ASI_M_BYPASS
>> 632
>> 633 /* I don't get it Sun, if you engineered all these
>> 634 * boot loaders and the PROM (thank you for the debugging
>> 635 * features btw) why did you not have them load kernel
>> 636 * images up in high address space, since this is necessary
>> 637 * for ABI compliance anyways? Does this low-mapping provide
>> 638 * enhanced interoperability?
>> 639 *
>> 640 * "The PROM is the computer."
>> 641 */
>> 642
>> 643 /* Ok, restore the MMU control register we saved in %g5 */
>> 644 sta %g5, [%g0] ASI_M_MMUREGS ! POW... ouch
>> 645
>> 646 /* Turn traps back on. We saved it in %g3 earlier. */
>> 647 wr %g3, 0x0, %psr ! tick tock, tick tock
>> 648
>> 649 /* Now we burn precious CPU cycles due to bad engineering. */
>> 650 WRITE_PAUSE
>> 651
>> 652 /* Wow, all that just to move a 32-bit value from one
>> 653 * place to another... Jump to high memory.
>> 654 */
>> 655 b go_to_highmem
>> 656 nop
>> 657
>> 658 /* This works on viking's in Mbus mode and all
>> 659 * other MBUS modules. It is virtually the same as
>> 660 * the above madness sans turning traps off and flipping
>> 661 * the AC bit.
>> 662 */
>> 663 srmmu_nviking:
>> 664 set AC_M_CTPR, %g1
>> 665 lda [%g1] ASI_M_MMUREGS, %g1 ! get ctx table ptr
>> 666 sll %g1, 0x4, %g1 ! make physical addr
>> 667 lda [%g1] ASI_M_BYPASS, %g1 ! ptr to level 1 pg_table
>> 668 srl %g1, 0x4, %g1
>> 669 sll %g1, 0x8, %g1 ! make phys addr for l1 tbl
>> 670
>> 671 lda [%g1] ASI_M_BYPASS, %g2 ! get level1 entry for 0x0
>> 672 add %g1, KERNBASE >> (SRMMU_PGDIR_SHIFT - 2), %g3
>> 673 sta %g2, [%g3] ASI_M_BYPASS ! place at KERNBASE entry
>> 674 b go_to_highmem
>> 675 nop ! wheee....
>> 676
>> 677 /* This remaps the kernel on Sun4/4xx machines
>> 678 * that have the Sun Mutant Three Level MMU.
>> 679 * It's like a platypus, Sun didn't have the
>> 680 * SRMMU in conception so they kludged the three
>> 681 * level logic in the regular Sun4 MMU probably.
>> 682 *
>> 683 * Basically, you take each entry in the top level
>> 684 * directory that maps the low 3MB starting at
>> 685 * address zero and put the mapping in the KERNBASE
>> 686 * slots. These top level pgd's are called regmaps.
>> 687 */
>> 688 sun4_mutant_remap:
>> 689 or %g0, %g0, %g3 ! source base
>> 690 sethi %hi(KERNBASE), %g4 ! destination base
>> 691 or %g4, %lo(KERNBASE), %g4
>> 692 sethi %hi(0x300000), %g5
>> 693 or %g5, %lo(0x300000), %g5 ! upper bound 3MB
>> 694 or %g0, 0x1, %l6
>> 695 sll %l6, 24, %l6 ! Regmap mapping size
>> 696 add %g3, 0x2, %g3 ! Base magic
>> 697 add %g4, 0x2, %g4 ! Base magic
>> 698
>> 699 /* Main remapping loop on Sun4-Mutant-MMU.
>> 700 * "I am not an animal..." -Famous Mutant Person
>> 701 */
>> 702 sun4_mutant_loop:
>> 703 lduha [%g3] ASI_REGMAP, %g2 ! Get lower entry
>> 704 stha %g2, [%g4] ASI_REGMAP ! Store in high entry
>> 705 add %g4, %l6, %g4 ! Move up high memory ptr
>> 706 subcc %g3, %g5, %g0 ! Reached our limit?
>> 707 blu sun4_mutant_loop ! Nope, loop again
>> 708 add %g3, %l6, %g3 ! delay, Move up low ptr
>> 709 b go_to_highmem ! Jump to high memory.
>> 710 nop
>> 711
>> 712 /* The following is for non-4/4xx sun4 MMU's. */
>> 713 sun4_normal_remap:
>> 714 mov 0, %g3 ! source base
>> 715 set KERNBASE, %g4 ! destination base
>> 716 set 0x300000, %g5 ! upper bound 3MB
>> 717 mov 1, %l6
>> 718 sll %l6, 18, %l6 ! sun4 mmu segmap size
>> 719 sun4_normal_loop:
>> 720 lduha [%g3] ASI_SEGMAP, %g6 ! load phys_seg
>> 721 stha %g6, [%g4] ASI_SEGMAP ! stort new virt mapping
>> 722 add %g3, %l6, %g3 ! increment source pointer
>> 723 subcc %g3, %g5, %g0 ! reached limit?
>> 724 blu sun4_normal_loop ! nope, loop again
>> 725 add %g4, %l6, %g4 ! delay, increment dest ptr
>> 726 b go_to_highmem
>> 727 nop
>> 728
>> 729 /* The following works for Sun4c MMU's */
>> 730 sun4c_remap:
>> 731 mov 0, %g3 ! source base
>> 732 set KERNBASE, %g4 ! destination base
>> 733 set 0x300000, %g5 ! upper bound 3MB
>> 734 mov 1, %l6
>> 735 sll %l6, 18, %l6 ! sun4c mmu segmap size
>> 736 sun4c_remap_loop:
>> 737 lda [%g3] ASI_SEGMAP, %g6 ! load phys_seg
>> 738 sta %g6, [%g4] ASI_SEGMAP ! store new virt mapping
>> 739 add %g3, %l6, %g3 ! Increment source ptr
>> 740 subcc %g3, %g5, %g0 ! Reached limit?
>> 741 bl sun4c_remap_loop ! Nope, loop again
>> 742 add %g4, %l6, %g4 ! delay, Increment dest ptr
>> 743
>> 744 /* Now do a non-relative jump so that PC is in high-memory */
>> 745 go_to_highmem:
>> 746 set execute_in_high_mem, %g1
>> 747 jmpl %g1, %g0
>> 748 nop
>> 749
>> 750 /* This is to align init_thread_union properly, be careful. -DaveM */
>> 751 .align 8192
>> 752
>> 753 /* The code above should be at beginning and we have to take care about
>> 754 * short jumps, as branching to .text.init section from .text is usually
>> 755 * impossible */
>> 756 __INIT
>> 757 /* Acquire boot time privileged register values, this will help debugging.
>> 758 * I figure out and store nwindows and nwindowsm1 later on.
>> 759 */
>> 760 execute_in_high_mem:
>> 761 mov %l0, %o0 ! put back romvec
>> 762 mov %l1, %o1 ! and debug_vec
>> 763
>> 764 sethi %hi( C_LABEL(prom_vector_p) ), %g1
>> 765 st %o0, [%g1 + %lo( C_LABEL(prom_vector_p) )]
>> 766
>> 767 sethi %hi( C_LABEL(linux_dbvec) ), %g1
>> 768 st %o1, [%g1 + %lo( C_LABEL(linux_dbvec) )]
>> 769
>> 770 ld [%o0 + 0x4], %o3
>> 771 and %o3, 0x3, %o5 ! get the version
>> 772
>> 773 cmp %o3, 0x2 ! a v2 prom?
>> 774 be found_version
>> 775 nop
>> 776
>> 777 /* paul@sfe.com.au */
>> 778 cmp %o3, 0x3 ! a v3 prom?
>> 779 be found_version
>> 780 nop
>> 781
>> 782 /* Old sun4's pass our load address into %o0 instead of the prom
>> 783 * pointer. On sun4's you have to hard code the romvec pointer into
>> 784 * your code. Sun probably still does that because they don't even
>> 785 * trust their own "OpenBoot" specifications.
>> 786 */
>> 787 set LOAD_ADDR, %g6
>> 788 cmp %o0, %g6 ! an old sun4?
>> 789 be sun4_init
>> 790 nop
>> 791
>> 792 found_version:
>> 793 #ifdef CONFIG_SUN4
>> 794 /* For people who try sun4 kernels, even if Configure.help advises them. */
>> 795 ld [%g7 + 0x68], %o1
>> 796 set sun4cdm_notsup, %o0
>> 797 call %o1
>> 798 nop
>> 799 b halt_me
>> 800 nop
>> 801 #endif
>> 802 /* Get the machine type via the mysterious romvec node operations. */
236 803
237 #if defined(CONFIG_KASAN_GENERIC) || defined(C !! 804 add %g7, 0x1c, %l1
238 bl kasan_early_init !! 805 ld [%l1], %l0
>> 806 ld [%l0], %l0
>> 807 call %l0
>> 808 or %g0, %g0, %o0 ! next_node(0) = first_node
>> 809 or %o0, %g0, %g6
>> 810
>> 811 sethi %hi( C_LABEL(cputypvar) ), %o1 ! First node has cpu-arch
>> 812 or %o1, %lo( C_LABEL(cputypvar) ), %o1
>> 813 sethi %hi( C_LABEL(cputypval) ), %o2 ! information, the string
>> 814 or %o2, %lo( C_LABEL(cputypval) ), %o2
>> 815 ld [%l1], %l0 ! 'compatibility' tells
>> 816 ld [%l0 + 0xc], %l0 ! that we want 'sun4x' where
>> 817 call %l0 ! x is one of '', 'c', 'm',
>> 818 nop ! 'd' or 'e'. %o2 holds pointer
>> 819 ! to a buf where above string
>> 820 ! will get stored by the prom.
>> 821
>> 822 subcc %o0, %g0, %g0
>> 823 bpos got_prop ! Got the property
>> 824 nop
>> 825
>> 826 or %g6, %g0, %o0
>> 827 sethi %hi( C_LABEL(cputypvar_sun4m) ), %o1
>> 828 or %o1, %lo( C_LABEL(cputypvar_sun4m) ), %o1
>> 829 sethi %hi( C_LABEL(cputypval) ), %o2
>> 830 or %o2, %lo( C_LABEL(cputypval) ), %o2
>> 831 ld [%l1], %l0
>> 832 ld [%l0 + 0xc], %l0
>> 833 call %l0
>> 834 nop
>> 835
>> 836 got_prop:
>> 837 set C_LABEL(cputypval), %o2
>> 838 ldub [%o2 + 0x4], %l1
>> 839
>> 840 cmp %l1, ' '
>> 841 be 1f
>> 842 cmp %l1, 'c'
>> 843 be 1f
>> 844 cmp %l1, 'm'
>> 845 be 1f
>> 846 cmp %l1, 's'
>> 847 be 1f
>> 848 cmp %l1, 'd'
>> 849 be 1f
>> 850 cmp %l1, 'e'
>> 851 be no_sun4e_here ! Could be a sun4e.
>> 852 nop
>> 853 b no_sun4u_here ! AIEEE, a V9 sun4u... Get our BIG BROTHER kernel :))
>> 854 nop
>> 855
>> 856 1: set C_LABEL(cputypval), %l1
>> 857 ldub [%l1 + 0x4], %l1
>> 858 cmp %l1, 'm' ! Test for sun4d, sun4e ?
>> 859 be sun4m_init
>> 860 cmp %l1, 's' ! Treat sun4s as sun4m
>> 861 be sun4m_init
>> 862 cmp %l1, 'd' ! Let us see how the beast will die
>> 863 be sun4d_init
>> 864 nop
>> 865
>> 866 /* Jump into mmu context zero. */
>> 867 set AC_CONTEXT, %g1
>> 868 stba %g0, [%g1] ASI_CONTROL
>> 869
>> 870 b sun4c_continue_boot
>> 871 nop
>> 872
>> 873 /* CPUID in bootbus can be found at PA 0xff0140000 */
>> 874 #define SUN4D_BOOTBUS_CPUID 0xf0140000
>> 875
>> 876 sun4d_init:
>> 877 /* Need to patch call to handler_irq */
>> 878 set C_LABEL(patch_handler_irq), %g4
>> 879 set C_LABEL(sun4d_handler_irq), %g5
>> 880 sethi %hi(0x40000000), %g3 ! call
>> 881 sub %g5, %g4, %g5
>> 882 srl %g5, 2, %g5
>> 883 or %g5, %g3, %g5
>> 884 st %g5, [%g4]
>> 885
>> 886 #ifdef CONFIG_SMP
>> 887 /* Get our CPU id out of bootbus */
>> 888 set SUN4D_BOOTBUS_CPUID, %g3
>> 889 lduba [%g3] ASI_M_CTL, %g3
>> 890 and %g3, 0xf8, %g3
>> 891 srl %g3, 3, %g4
>> 892 sta %g4, [%g0] ASI_M_VIKING_TMP1
>> 893 sethi %hi(boot_cpu_id), %g5
>> 894 stb %g4, [%g5 + %lo(boot_cpu_id)]
>> 895 sll %g4, 2, %g4
>> 896 sethi %hi(boot_cpu_id4), %g5
>> 897 stb %g4, [%g5 + %lo(boot_cpu_id4)]
239 #endif 898 #endif
240 mov x0, x20 <<
241 bl finalise_el2 <<
242 ldp x29, x30, [sp], #16 <<
243 bl start_kernel <<
244 ASM_BUG() <<
245 SYM_FUNC_END(__primary_switched) <<
246 899
247 /* !! 900 /* Fall through to sun4m_init */
248 * end early head section, begin head code tha <<
249 * hotplug and needs to have the same protecti <<
250 */ <<
251 .section ".idmap.text","a" <<
252 901
253 /* !! 902 sun4m_init:
254 * Starting from EL2 or EL1, configure the CPU !! 903 /* XXX Fucking Cypress... */
255 * reachable EL supported by the kernel in a c !! 904 lda [%g0] ASI_M_MMUREGS, %g5
256 * from EL2 to EL1, configure EL2 before confi !! 905 srl %g5, 28, %g4
257 * !! 906
258 * Since we cannot always rely on ERET synchro !! 907 cmp %g4, 1
259 * SCTLR_ELx.EOS is clear), we place an ISB pr !! 908 bne 1f
260 * !! 909 srl %g5, 24, %g4
261 * Returns either BOOT_CPU_MODE_EL1 or BOOT_CP <<
262 * booted in EL1 or EL2 respectively, with the <<
263 * potential context flags. These flags are *n <<
264 * <<
265 * x0: whether we are being called from the pr <<
266 */ <<
267 SYM_FUNC_START(init_kernel_el) <<
268 mrs x1, CurrentEL <<
269 cmp x1, #CurrentEL_EL2 <<
270 b.eq init_el2 <<
271 <<
272 SYM_INNER_LABEL(init_el1, SYM_L_LOCAL) <<
273 mov_q x0, INIT_SCTLR_EL1_MMU_OFF <<
274 pre_disable_mmu_workaround <<
275 msr sctlr_el1, x0 <<
276 isb <<
277 mov_q x0, INIT_PSTATE_EL1 <<
278 msr spsr_el1, x0 <<
279 msr elr_el1, lr <<
280 mov w0, #BOOT_CPU_MODE_EL1 <<
281 eret <<
282 <<
283 SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) <<
284 msr elr_el2, lr <<
285 <<
286 // clean all HYP code to the PoC if we <<
287 cbz x0, 0f <<
288 adrp x0, __hyp_idmap_text_start <<
289 adr_l x1, __hyp_text_end <<
290 adr_l x2, dcache_clean_poc <<
291 blr x2 <<
292 <<
293 mov_q x0, INIT_SCTLR_EL2_MMU_OFF <<
294 pre_disable_mmu_workaround <<
295 msr sctlr_el2, x0 <<
296 isb <<
297 0: <<
298 mov_q x0, HCR_HOST_NVHE_FLAGS <<
299 <<
300 /* <<
301 * Compliant CPUs advertise their VHE- <<
302 * ID_AA64MMFR4_EL1.E2H0 < 0. HCR_EL2. <<
303 * RES1 in that case. Publish the E2H <<
304 * it can be picked up by the init_el2 <<
305 * <<
306 * Fruity CPUs seem to have HCR_EL2.E2 <<
307 * don't advertise it (they predate th <<
308 */ <<
309 mrs_s x1, SYS_ID_AA64MMFR4_EL1 <<
310 tbz x1, #(ID_AA64MMFR4_EL1_E2H0_SH <<
311 910
312 orr x0, x0, #HCR_E2H !! 911 and %g4, 0xf, %g4
313 1: !! 912 cmp %g4, 7 /* This would be a HyperSparc. */
314 msr hcr_el2, x0 <<
315 isb <<
316 913
317 init_el2_state !! 914 bne 2f
>> 915 nop
318 916
319 /* Hypervisor stub */ !! 917 1:
320 adr_l x0, __hyp_stub_vectors <<
321 msr vbar_el2, x0 <<
322 isb <<
323 <<
324 mov_q x1, INIT_SCTLR_EL1_MMU_OFF <<
325 <<
326 mrs x0, hcr_el2 <<
327 and x0, x0, #HCR_E2H <<
328 cbz x0, 2f <<
329 <<
330 /* Set a sane SCTLR_EL1, the VHE way * <<
331 msr_s SYS_SCTLR_EL12, x1 <<
332 mov x2, #BOOT_CPU_FLAG_E2H <<
333 b 3f <<
334 918
>> 919 #define PATCH_IT(dst, src) \
>> 920 set (dst), %g5; \
>> 921 set (src), %g4; \
>> 922 ld [%g4], %g3; \
>> 923 st %g3, [%g5]; \
>> 924 ld [%g4+0x4], %g3; \
>> 925 st %g3, [%g5+0x4];
>> 926
>> 927 /* Signed multiply. */
>> 928 PATCH_IT(.mul, .mul_patch)
>> 929 PATCH_IT(.mul+0x08, .mul_patch+0x08)
>> 930
>> 931 /* Signed remainder. */
>> 932 PATCH_IT(.rem, .rem_patch)
>> 933 PATCH_IT(.rem+0x08, .rem_patch+0x08)
>> 934 PATCH_IT(.rem+0x10, .rem_patch+0x10)
>> 935 PATCH_IT(.rem+0x18, .rem_patch+0x18)
>> 936 PATCH_IT(.rem+0x20, .rem_patch+0x20)
>> 937 PATCH_IT(.rem+0x28, .rem_patch+0x28)
>> 938
>> 939 /* Signed division. */
>> 940 PATCH_IT(.div, .div_patch)
>> 941 PATCH_IT(.div+0x08, .div_patch+0x08)
>> 942 PATCH_IT(.div+0x10, .div_patch+0x10)
>> 943 PATCH_IT(.div+0x18, .div_patch+0x18)
>> 944 PATCH_IT(.div+0x20, .div_patch+0x20)
>> 945
>> 946 /* Unsigned multiply. */
>> 947 PATCH_IT(.umul, .umul_patch)
>> 948 PATCH_IT(.umul+0x08, .umul_patch+0x08)
>> 949
>> 950 /* Unsigned remainder. */
>> 951 PATCH_IT(.urem, .urem_patch)
>> 952 PATCH_IT(.urem+0x08, .urem_patch+0x08)
>> 953 PATCH_IT(.urem+0x10, .urem_patch+0x10)
>> 954 PATCH_IT(.urem+0x18, .urem_patch+0x18)
>> 955
>> 956 /* Unsigned division. */
>> 957 PATCH_IT(.udiv, .udiv_patch)
>> 958 PATCH_IT(.udiv+0x08, .udiv_patch+0x08)
>> 959 PATCH_IT(.udiv+0x10, .udiv_patch+0x10)
>> 960
>> 961 #undef PATCH_IT
>> 962
>> 963 /* Ok, the PROM could have done funny things and apple cider could still
>> 964 * be sitting in the fault status/address registers. Read them all to
>> 965 * clear them so we don't get magic faults later on.
>> 966 */
>> 967 /* This sucks, apparently this makes Vikings call prom panic, will fix later */
335 2: 968 2:
336 msr sctlr_el1, x1 !! 969 rd %psr, %o1
337 mov x2, xzr !! 970 srl %o1, 28, %o1 ! Get a type of the CPU
338 3: <<
339 __init_el2_nvhe_prepare_eret <<
340 971
341 mov w0, #BOOT_CPU_MODE_EL2 !! 972 subcc %o1, 4, %g0 ! TI: Viking or MicroSPARC
342 orr x0, x0, x2 !! 973 be sun4c_continue_boot
343 eret !! 974 nop
344 SYM_FUNC_END(init_kernel_el) <<
345 <<
346 /* <<
347 * This provides a "holding pen" for p <<
348 * cores are held until we're ready fo <<
349 */ <<
350 SYM_FUNC_START(secondary_holding_pen) <<
351 mov x0, xzr <<
352 bl init_kernel_el <<
353 mrs x2, mpidr_el1 <<
354 mov_q x1, MPIDR_HWID_BITMASK <<
355 and x2, x2, x1 <<
356 adr_l x3, secondary_holding_pen_rele <<
357 pen: ldr x4, [x3] <<
358 cmp x4, x2 <<
359 b.eq secondary_startup <<
360 wfe <<
361 b pen <<
362 SYM_FUNC_END(secondary_holding_pen) <<
363 <<
364 /* <<
365 * Secondary entry point that jumps st <<
366 * be used where CPUs are brought onli <<
367 */ <<
368 SYM_FUNC_START(secondary_entry) <<
369 mov x0, xzr <<
370 bl init_kernel_el <<
371 b secondary_startup <<
372 SYM_FUNC_END(secondary_entry) <<
373 <<
374 SYM_FUNC_START_LOCAL(secondary_startup) <<
375 /* <<
376 * Common entry point for secondary CP <<
377 */ <<
378 mov x20, x0 <<
379 <<
380 #ifdef CONFIG_ARM64_VA_BITS_52 <<
381 alternative_if ARM64_HAS_VA52 <<
382 bl __cpu_secondary_check52bitva <<
383 alternative_else_nop_endif <<
384 #endif <<
385 975
386 bl __cpu_setup !! 976 set AC_M_SFSR, %o0
387 adrp x1, swapper_pg_dir !! 977 lda [%o0] ASI_M_MMUREGS, %g0
388 adrp x2, idmap_pg_dir !! 978 set AC_M_SFAR, %o0
389 bl __enable_mmu !! 979 lda [%o0] ASI_M_MMUREGS, %g0
390 ldr x8, =__secondary_switched <<
391 br x8 <<
392 SYM_FUNC_END(secondary_startup) <<
393 980
394 .text !! 981 /* Fujitsu MicroSPARC-II has no asynchronous flavors of FARs */
395 SYM_FUNC_START_LOCAL(__secondary_switched) !! 982 subcc %o1, 0, %g0
396 mov x0, x20 !! 983 be sun4c_continue_boot
397 bl set_cpu_boot_mode_flag !! 984 nop
398 <<
399 mov x0, x20 <<
400 bl finalise_el2 <<
401 <<
402 str_l xzr, __early_cpu_boot_status, <<
403 adr_l x5, vectors <<
404 msr vbar_el1, x5 <<
405 isb <<
406 <<
407 adr_l x0, secondary_data <<
408 ldr x2, [x0, #CPU_BOOT_TASK] <<
409 cbz x2, __secondary_too_slow <<
410 985
411 init_cpu_task x2, x1, x3 !! 986 set AC_M_AFSR, %o0
>> 987 lda [%o0] ASI_M_MMUREGS, %g0
>> 988 set AC_M_AFAR, %o0
>> 989 lda [%o0] ASI_M_MMUREGS, %g0
>> 990 nop
412 991
413 #ifdef CONFIG_ARM64_PTR_AUTH <<
414 ptrauth_keys_init_cpu x2, x3, x4, x5 <<
415 #endif <<
416 992
417 bl secondary_start_kernel !! 993 sun4c_continue_boot:
418 ASM_BUG() <<
419 SYM_FUNC_END(__secondary_switched) <<
420 <<
421 SYM_FUNC_START_LOCAL(__secondary_too_slow) <<
422 wfe <<
423 wfi <<
424 b __secondary_too_slow <<
425 SYM_FUNC_END(__secondary_too_slow) <<
426 994
427 /* <<
428 * Sets the __boot_cpu_mode flag depending on <<
429 * in w0. See arch/arm64/include/asm/virt.h fo <<
430 */ <<
431 SYM_FUNC_START_LOCAL(set_cpu_boot_mode_flag) <<
432 adr_l x1, __boot_cpu_mode <<
433 cmp w0, #BOOT_CPU_MODE_EL2 <<
434 b.ne 1f <<
435 add x1, x1, #4 <<
436 1: str w0, [x1] <<
437 ret <<
438 SYM_FUNC_END(set_cpu_boot_mode_flag) <<
439 995
440 /* !! 996 /* Aieee, now set PC and nPC, enable traps, give ourselves a stack and it's
441 * The booting CPU updates the failed status @ !! 997 * show-time!
442 * with MMU turned off. <<
443 * <<
444 * update_early_cpu_boot_status tmp, status <<
445 * - Corrupts tmp1, tmp2 <<
446 * - Writes 'status' to __early_cpu_boot_stat <<
447 * it is committed to memory. <<
448 */ 998 */
449 999
450 .macro update_early_cpu_boot_status s !! 1000 sethi %hi( C_LABEL(cputyp) ), %o0
451 mov \tmp2, #\status !! 1001 st %g4, [%o0 + %lo( C_LABEL(cputyp) )]
452 adr_l \tmp1, __early_cpu_boot_status <<
453 str \tmp2, [\tmp1] <<
454 dmb sy <<
455 dc ivac, \tmp1 <<
456 .endm <<
457 1002
458 /* !! 1003 /* Turn on Supervisor, EnableFloating, and all the PIL bits.
459 * Enable the MMU. !! 1004 * Also puts us in register window zero with traps off.
460 * !! 1005 */
461 * x0 = SCTLR_EL1 value for turning on the M !! 1006 set (PSR_PS | PSR_S | PSR_PIL | PSR_EF), %g2
462 * x1 = TTBR1_EL1 value !! 1007 wr %g2, 0x0, %psr
463 * x2 = ID map root table address !! 1008 WRITE_PAUSE
464 * !! 1009
465 * Returns to the caller via x30/lr. This requ !! 1010 /* I want a kernel stack NOW! */
466 * by the .idmap.text section. !! 1011 set C_LABEL(init_thread_union), %g1
467 * !! 1012 set (THREAD_SIZE - STACKFRAME_SZ), %g2
468 * Checks if the selected granule size is supp !! 1013 add %g1, %g2, %sp
469 * If it isn't, park the CPU !! 1014 mov 0, %fp /* And for good luck */
>> 1015
>> 1016 /* Zero out our BSS section. */
>> 1017 set C_LABEL(__bss_start) , %o0 ! First address of BSS
>> 1018 set C_LABEL(end) , %o1 ! Last address of BSS
>> 1019 add %o0, 0x1, %o0
>> 1020 1:
>> 1021 stb %g0, [%o0]
>> 1022 subcc %o0, %o1, %g0
>> 1023 bl 1b
>> 1024 add %o0, 0x1, %o0
>> 1025
>> 1026 /* Initialize the uwinmask value for init task just in case.
>> 1027 * But first make current_set[boot_cpu_id] point to something useful.
>> 1028 */
>> 1029 set C_LABEL(init_thread_union), %g6
>> 1030 set C_LABEL(current_set), %g2
>> 1031 #ifdef CONFIG_SMP
>> 1032 sethi %hi(C_LABEL(boot_cpu_id4)), %g3
>> 1033 ldub [%g3 + %lo(C_LABEL(boot_cpu_id4))], %g3
>> 1034 st %g6, [%g2]
>> 1035 add %g2, %g3, %g2
>> 1036 #endif
>> 1037 st %g6, [%g2]
>> 1038
>> 1039 st %g0, [%g6 + TI_UWINMASK]
>> 1040
>> 1041 /* Compute NWINDOWS and stash it away. Now uses %wim trick explained
>> 1042 * in the V8 manual. Ok, this method seems to work, Sparc is cool...
>> 1043 * No, it doesn't work, have to play the save/readCWP/restore trick.
470 */ 1044 */
471 .section ".idmap.text","a" !! 1045
472 SYM_FUNC_START(__enable_mmu) !! 1046 wr %g0, 0x0, %wim ! so we do not get a trap
473 mrs x3, ID_AA64MMFR0_EL1 !! 1047 WRITE_PAUSE
474 ubfx x3, x3, #ID_AA64MMFR0_EL1_TGRA !! 1048
475 cmp x3, #ID_AA64MMFR0_EL1_TGRAN_SU !! 1049 save
476 b.lt __no_granule_support !! 1050
477 cmp x3, #ID_AA64MMFR0_EL1_TGRAN_SU !! 1051 rd %psr, %g3
478 b.gt __no_granule_support !! 1052
479 phys_to_ttbr x2, x2 !! 1053 restore
480 msr ttbr0_el1, x2 !! 1054
481 load_ttbr1 x1, x1, x3 !! 1055 and %g3, 0x1f, %g3
482 !! 1056 add %g3, 0x1, %g3
483 set_sctlr_el1 x0 !! 1057
484 !! 1058 mov 2, %g1
485 ret !! 1059 wr %g1, 0x0, %wim ! make window 1 invalid
486 SYM_FUNC_END(__enable_mmu) !! 1060 WRITE_PAUSE
487 !! 1061
488 #ifdef CONFIG_ARM64_VA_BITS_52 !! 1062 cmp %g3, 0x7
489 SYM_FUNC_START(__cpu_secondary_check52bitva) !! 1063 bne 2f
490 #ifndef CONFIG_ARM64_LPA2 !! 1064 nop
491 mrs_s x0, SYS_ID_AA64MMFR2_EL1 !! 1065
492 and x0, x0, ID_AA64MMFR2_EL1_VARan !! 1066 /* Adjust our window handling routines to
493 cbnz x0, 2f !! 1067 * do things correctly on 7 window Sparcs.
>> 1068 */
>> 1069
>> 1070 #define PATCH_INSN(src, dest) \
>> 1071 set src, %g5; \
>> 1072 set dest, %g2; \
>> 1073 ld [%g5], %g4; \
>> 1074 st %g4, [%g2];
>> 1075
>> 1076 /* Patch for window spills... */
>> 1077 PATCH_INSN(spnwin_patch1_7win, spnwin_patch1)
>> 1078 PATCH_INSN(spnwin_patch2_7win, spnwin_patch2)
>> 1079 PATCH_INSN(spnwin_patch3_7win, spnwin_patch3)
>> 1080
>> 1081 /* Patch for window fills... */
>> 1082 PATCH_INSN(fnwin_patch1_7win, fnwin_patch1)
>> 1083 PATCH_INSN(fnwin_patch2_7win, fnwin_patch2)
>> 1084
>> 1085 /* Patch for trap entry setup... */
>> 1086 PATCH_INSN(tsetup_7win_patch1, tsetup_patch1)
>> 1087 PATCH_INSN(tsetup_7win_patch2, tsetup_patch2)
>> 1088 PATCH_INSN(tsetup_7win_patch3, tsetup_patch3)
>> 1089 PATCH_INSN(tsetup_7win_patch4, tsetup_patch4)
>> 1090 PATCH_INSN(tsetup_7win_patch5, tsetup_patch5)
>> 1091 PATCH_INSN(tsetup_7win_patch6, tsetup_patch6)
>> 1092
>> 1093 /* Patch for returning from traps... */
>> 1094 PATCH_INSN(rtrap_7win_patch1, rtrap_patch1)
>> 1095 PATCH_INSN(rtrap_7win_patch2, rtrap_patch2)
>> 1096 PATCH_INSN(rtrap_7win_patch3, rtrap_patch3)
>> 1097 PATCH_INSN(rtrap_7win_patch4, rtrap_patch4)
>> 1098 PATCH_INSN(rtrap_7win_patch5, rtrap_patch5)
>> 1099
>> 1100 /* Patch for killing user windows from the register file. */
>> 1101 PATCH_INSN(kuw_patch1_7win, kuw_patch1)
>> 1102
>> 1103 /* Now patch the kernel window flush sequences.
>> 1104 * This saves 2 traps on every switch and fork.
>> 1105 */
>> 1106 set 0x01000000, %g4
>> 1107 set flush_patch_one, %g5
>> 1108 st %g4, [%g5 + 0x18]
>> 1109 st %g4, [%g5 + 0x1c]
>> 1110 set flush_patch_two, %g5
>> 1111 st %g4, [%g5 + 0x18]
>> 1112 st %g4, [%g5 + 0x1c]
>> 1113 set flush_patch_three, %g5
>> 1114 st %g4, [%g5 + 0x18]
>> 1115 st %g4, [%g5 + 0x1c]
>> 1116 set flush_patch_four, %g5
>> 1117 st %g4, [%g5 + 0x18]
>> 1118 st %g4, [%g5 + 0x1c]
>> 1119 set flush_patch_exception, %g5
>> 1120 st %g4, [%g5 + 0x18]
>> 1121 st %g4, [%g5 + 0x1c]
>> 1122 set flush_patch_switch, %g5
>> 1123 st %g4, [%g5 + 0x18]
>> 1124 st %g4, [%g5 + 0x1c]
>> 1125
>> 1126 2:
>> 1127 sethi %hi( C_LABEL(nwindows) ), %g4
>> 1128 st %g3, [%g4 + %lo( C_LABEL(nwindows) )] ! store final value
>> 1129 sub %g3, 0x1, %g3
>> 1130 sethi %hi( C_LABEL(nwindowsm1) ), %g4
>> 1131 st %g3, [%g4 + %lo( C_LABEL(nwindowsm1) )]
>> 1132
>> 1133 /* Here we go, start using Linux's trap table... */
>> 1134 set C_LABEL(trapbase), %g3
>> 1135 wr %g3, 0x0, %tbr
>> 1136 WRITE_PAUSE
>> 1137
>> 1138 /* Finally, turn on traps so that we can call c-code. */
>> 1139 rd %psr, %g3
>> 1140 wr %g3, 0x0, %psr
>> 1141 WRITE_PAUSE
>> 1142
>> 1143 wr %g3, PSR_ET, %psr
>> 1144 WRITE_PAUSE
>> 1145
>> 1146 /* First we call prom_init() to set up PROMLIB, then
>> 1147 * off to start_kernel().
>> 1148 */
>> 1149
>> 1150 sethi %hi( C_LABEL(prom_vector_p) ), %g5
>> 1151 ld [%g5 + %lo( C_LABEL(prom_vector_p) )], %o0
>> 1152 call C_LABEL(prom_init)
>> 1153 nop
>> 1154
>> 1155 call C_LABEL(start_kernel)
>> 1156 nop
>> 1157
>> 1158 /* We should not get here. */
>> 1159 call halt_me
>> 1160 nop
>> 1161
>> 1162 sun4_init:
>> 1163 #ifdef CONFIG_SUN4
>> 1164 /* There, happy now Adrian? */
>> 1165 set C_LABEL(cputypval), %o2 ! Let everyone know we
>> 1166 set ' ', %o0 ! are a "sun4 " architecture
>> 1167 stb %o0, [%o2 + 0x4]
>> 1168
>> 1169 b got_prop
>> 1170 nop
494 #else 1171 #else
495 mrs x0, id_aa64mmfr0_el1 !! 1172 sethi %hi(SUN4_PROM_VECTOR+0x84), %o1
496 sbfx x0, x0, #ID_AA64MMFR0_EL1_TGRA !! 1173 ld [%o1 + %lo(SUN4_PROM_VECTOR+0x84)], %o1
497 cmp x0, #ID_AA64MMFR0_EL1_TGRAN_LP !! 1174 set sun4_notsup, %o0
498 b.ge 2f !! 1175 call %o1 /* printf */
>> 1176 nop
>> 1177 sethi %hi(SUN4_PROM_VECTOR+0xc4), %o1
>> 1178 ld [%o1 + %lo(SUN4_PROM_VECTOR+0xc4)], %o1
>> 1179 call %o1 /* exittomon */
>> 1180 nop
>> 1181 1: ba 1b ! Cannot exit into KMON
>> 1182 nop
499 #endif 1183 #endif
>> 1184 no_sun4e_here:
>> 1185 ld [%g7 + 0x68], %o1
>> 1186 set sun4e_notsup, %o0
>> 1187 call %o1
>> 1188 nop
>> 1189 b halt_me
>> 1190 nop
>> 1191
>> 1192 __INITDATA
>> 1193
>> 1194 sun4u_1:
>> 1195 .asciz "finddevice"
>> 1196 .align 4
>> 1197 sun4u_2:
>> 1198 .asciz "/chosen"
>> 1199 .align 4
>> 1200 sun4u_3:
>> 1201 .asciz "getprop"
>> 1202 .align 4
>> 1203 sun4u_4:
>> 1204 .asciz "stdout"
>> 1205 .align 4
>> 1206 sun4u_5:
>> 1207 .asciz "write"
>> 1208 .align 4
>> 1209 sun4u_6:
>> 1210 .asciz "\n\rOn sun4u you have to use UltraLinux (64bit) kernel\n\rand not a 32bit sun4[cdem] version\n\r\n\r"
>> 1211 sun4u_6e:
>> 1212 .align 4
>> 1213 sun4u_7:
>> 1214 .asciz "exit"
>> 1215 .align 8
>> 1216 sun4u_a1:
>> 1217 .word 0, sun4u_1, 0, 1, 0, 1, 0, sun4u_2, 0
>> 1218 sun4u_r1:
>> 1219 .word 0
>> 1220 sun4u_a2:
>> 1221 .word 0, sun4u_3, 0, 4, 0, 1, 0
>> 1222 sun4u_i2:
>> 1223 .word 0, 0, sun4u_4, 0, sun4u_1, 0, 8, 0
>> 1224 sun4u_r2:
>> 1225 .word 0
>> 1226 sun4u_a3:
>> 1227 .word 0, sun4u_5, 0, 3, 0, 1, 0
>> 1228 sun4u_i3:
>> 1229 .word 0, 0, sun4u_6, 0, sun4u_6e - sun4u_6 - 1, 0
>> 1230 sun4u_r3:
>> 1231 .word 0
>> 1232 sun4u_a4:
>> 1233 .word 0, sun4u_7, 0, 0, 0, 0
>> 1234 sun4u_r4:
>> 1235
>> 1236 __INIT
>> 1237 no_sun4u_here:
>> 1238 set sun4u_a1, %o0
>> 1239 set current_pc, %l2
>> 1240 cmp %l2, %g3
>> 1241 be 1f
>> 1242 mov %o4, %l0
>> 1243 sub %g3, %l2, %l6
>> 1244 add %o0, %l6, %o0
>> 1245 mov %o0, %l4
>> 1246 mov sun4u_r4 - sun4u_a1, %l3
>> 1247 ld [%l4], %l5
>> 1248 2:
>> 1249 add %l4, 4, %l4
>> 1250 cmp %l5, %l2
>> 1251 add %l5, %l6, %l5
>> 1252 bgeu,a 3f
>> 1253 st %l5, [%l4 - 4]
>> 1254 3:
>> 1255 subcc %l3, 4, %l3
>> 1256 bne 2b
>> 1257 ld [%l4], %l5
>> 1258 1:
>> 1259 call %l0
>> 1260 mov %o0, %l1
500 1261
501 update_early_cpu_boot_status \ !! 1262 ld [%l1 + (sun4u_r1 - sun4u_a1)], %o1
502 CPU_STUCK_IN_KERNEL | CPU_STUC !! 1263 add %l1, (sun4u_a2 - sun4u_a1), %o0
503 1: wfe !! 1264 call %l0
504 wfi !! 1265 st %o1, [%o0 + (sun4u_i2 - sun4u_a2)]
505 b 1b !! 1266
>> 1267 ld [%l1 + (sun4u_1 - sun4u_a1)], %o1
>> 1268 add %l1, (sun4u_a3 - sun4u_a1), %o0
>> 1269 call %l0
>> 1270 st %o1, [%o0 + (sun4u_i3 - sun4u_a3)]
>> 1271
>> 1272 call %l0
>> 1273 add %l1, (sun4u_a4 - sun4u_a1), %o0
>> 1274
>> 1275 /* Not reached */
>> 1276 halt_me:
>> 1277 ld [%g7 + 0x74], %o0
>> 1278 call %o0 ! Get us out of here...
>> 1279 nop ! Apparently Solaris is better.
506 1280
507 2: ret !! 1281 /* Ok, now we continue in the .data/.text sections */
508 SYM_FUNC_END(__cpu_secondary_check52bitva) <<
509 #endif <<
510 1282
511 SYM_FUNC_START_LOCAL(__no_granule_support) !! 1283 .data
512 /* Indicate that this CPU can't boot a !! 1284 .align 4
513 update_early_cpu_boot_status \ !! 1285
514 CPU_STUCK_IN_KERNEL | CPU_STUC !! 1286 /*
515 1: !! 1287 * Fill up the prom vector, note in particular the kind first element,
516 wfe !! 1288 * no joke. I don't need all of them in here as the entire prom vector
517 wfi !! 1289 * gets initialized in c-code so all routines can use it.
518 b 1b !! 1290 */
519 SYM_FUNC_END(__no_granule_support) !! 1291
520 !! 1292 .globl C_LABEL(prom_vector_p)
521 SYM_FUNC_START_LOCAL(__primary_switch) !! 1293 C_LABEL(prom_vector_p):
522 adrp x1, reserved_pg_dir !! 1294 .word 0
523 adrp x2, init_idmap_pg_dir !! 1295
524 bl __enable_mmu !! 1296 /* We calculate the following at boot time, window fills/spills and trap entry
525 !! 1297 * code uses these to keep track of the register windows.
526 adrp x1, early_init_stack !! 1298 */
527 mov sp, x1 !! 1299
528 mov x29, xzr !! 1300 .align 4
529 mov x0, x20 !! 1301 .globl C_LABEL(nwindows)
530 mov x1, x21 !! 1302 .globl C_LABEL(nwindowsm1)
531 bl __pi_early_map_kernel !! 1303 C_LABEL(nwindows):
532 !! 1304 .word 8
533 ldr x8, =__primary_switched !! 1305 C_LABEL(nwindowsm1):
534 adrp x0, KERNEL_START !! 1306 .word 7
535 br x8 !! 1307
536 SYM_FUNC_END(__primary_switch) !! 1308 /* Boot time debugger vector value. We need this later on. */
>> 1309
>> 1310 .align 4
>> 1311 .globl C_LABEL(linux_dbvec)
>> 1312 C_LABEL(linux_dbvec):
>> 1313 .word 0
>> 1314 .word 0
>> 1315
>> 1316 .align 8
>> 1317
>> 1318 .globl C_LABEL(lvl14_save)
>> 1319 C_LABEL(lvl14_save):
>> 1320 .word 0
>> 1321 .word 0
>> 1322 .word 0
>> 1323 .word 0
>> 1324 .word t_irq14
>> 1325
>> 1326 .section ".fixup",#alloc,#execinstr
>> 1327 .globl __ret_efault
>> 1328 __ret_efault:
>> 1329 ret
>> 1330 restore %g0, -EFAULT, %o0
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