1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0
2 config CSKY !! 2 config MIPS
3 def_bool y !! 3 bool
4 select ARCH_32BIT_OFF_T !! 4 default y
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_HAS_DMA_PREP_COHERENT !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_GCOV_PROFILE_ALL !! 7 select ARCH_HAS_FORTIFY_SOURCE
8 select ARCH_HAS_SYNC_DMA_FOR_CPU !! 8 select ARCH_HAS_KCOV
9 select ARCH_HAS_SYNC_DMA_FOR_DEVICE !! 9 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
>> 10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
>> 11 select ARCH_HAS_UBSAN_SANITIZE_ALL
>> 12 select ARCH_SUPPORTS_UPROBES
10 select ARCH_USE_BUILTIN_BSWAP 13 select ARCH_USE_BUILTIN_BSWAP
>> 14 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
11 select ARCH_USE_QUEUED_RWLOCKS 15 select ARCH_USE_QUEUED_RWLOCKS
12 select ARCH_USE_QUEUED_SPINLOCKS 16 select ARCH_USE_QUEUED_SPINLOCKS
13 select ARCH_HAS_CURRENT_STACK_POINTER !! 17 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
14 select ARCH_INLINE_READ_LOCK if !PREEM !! 18 select ARCH_WANT_IPC_PARSE_VERSION
15 select ARCH_INLINE_READ_LOCK_BH if !PR !! 19 select BUILDTIME_TABLE_SORT
16 select ARCH_INLINE_READ_LOCK_IRQ if !P !! 20 select CLONE_BACKWARDS
17 select ARCH_INLINE_READ_LOCK_IRQSAVE i !! 21 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
18 select ARCH_INLINE_READ_UNLOCK if !PRE !! 22 select CPU_PM if CPU_IDLE
19 select ARCH_INLINE_READ_UNLOCK_BH if ! !! 23 select GENERIC_ATOMIC64 if !64BIT
20 select ARCH_INLINE_READ_UNLOCK_IRQ if !! 24 select GENERIC_CLOCKEVENTS
21 select ARCH_INLINE_READ_UNLOCK_IRQREST !! 25 select GENERIC_CMOS_UPDATE
22 select ARCH_INLINE_WRITE_LOCK if !PREE !! 26 select GENERIC_CPU_AUTOPROBE
23 select ARCH_INLINE_WRITE_LOCK_BH if !P !! 27 select GENERIC_GETTIMEOFDAY
24 select ARCH_INLINE_WRITE_LOCK_IRQ if ! !! 28 select GENERIC_IOMAP
25 select ARCH_INLINE_WRITE_LOCK_IRQSAVE !! 29 select GENERIC_IRQ_PROBE
26 select ARCH_INLINE_WRITE_UNLOCK if !PR !! 30 select GENERIC_IRQ_SHOW
27 select ARCH_INLINE_WRITE_UNLOCK_BH if !! 31 select GENERIC_ISA_DMA if EISA
28 select ARCH_INLINE_WRITE_UNLOCK_IRQ if <<
29 select ARCH_INLINE_WRITE_UNLOCK_IRQRES <<
30 select ARCH_INLINE_SPIN_TRYLOCK if !PR <<
31 select ARCH_INLINE_SPIN_TRYLOCK_BH if <<
32 select ARCH_INLINE_SPIN_LOCK if !PREEM <<
33 select ARCH_INLINE_SPIN_LOCK_BH if !PR <<
34 select ARCH_INLINE_SPIN_LOCK_IRQ if !P <<
35 select ARCH_INLINE_SPIN_LOCK_IRQSAVE i <<
36 select ARCH_INLINE_SPIN_UNLOCK if !PRE <<
37 select ARCH_INLINE_SPIN_UNLOCK_BH if ! <<
38 select ARCH_INLINE_SPIN_UNLOCK_IRQ if <<
39 select ARCH_INLINE_SPIN_UNLOCK_IRQREST <<
40 select ARCH_NEED_CMPXCHG_1_EMU <<
41 select ARCH_WANT_FRAME_POINTERS if !CP <<
42 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ <<
43 select COMMON_CLK <<
44 select CLKSRC_MMIO <<
45 select CSKY_MPINTC if CPU_CK860 <<
46 select CSKY_MP_TIMER if CPU_CK860 <<
47 select CSKY_APB_INTC <<
48 select DMA_DIRECT_REMAP <<
49 select IRQ_DOMAIN <<
50 select DW_APB_TIMER_OF <<
51 select GENERIC_IOREMAP <<
52 select GENERIC_LIB_ASHLDI3 32 select GENERIC_LIB_ASHLDI3
53 select GENERIC_LIB_ASHRDI3 33 select GENERIC_LIB_ASHRDI3
54 select GENERIC_LIB_LSHRDI3 <<
55 select GENERIC_LIB_MULDI3 <<
56 select GENERIC_LIB_CMPDI2 34 select GENERIC_LIB_CMPDI2
>> 35 select GENERIC_LIB_LSHRDI3
57 select GENERIC_LIB_UCMPDI2 36 select GENERIC_LIB_UCMPDI2
58 select GENERIC_ALLOCATOR !! 37 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
59 select GENERIC_ATOMIC64 <<
60 select GENERIC_CPU_DEVICES <<
61 select GENERIC_IRQ_CHIP <<
62 select GENERIC_IRQ_PROBE <<
63 select GENERIC_IRQ_SHOW <<
64 select GENERIC_IRQ_MULTI_HANDLER <<
65 select GENERIC_SCHED_CLOCK <<
66 select GENERIC_SMP_IDLE_THREAD 38 select GENERIC_SMP_IDLE_THREAD
67 select GENERIC_TIME_VSYSCALL 39 select GENERIC_TIME_VSYSCALL
68 select GENERIC_VDSO_32 !! 40 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
69 select GENERIC_GETTIMEOFDAY !! 41 select HANDLE_DOMAIN_IRQ
70 select GX6605S_TIMER if CPU_CK610 !! 42 select HAVE_ARCH_COMPILER_H
71 select HAVE_ARCH_TRACEHOOK !! 43 select HAVE_ARCH_JUMP_LABEL
72 select HAVE_ARCH_AUDITSYSCALL !! 44 select HAVE_ARCH_KGDB
73 select HAVE_ARCH_JUMP_LABEL if !CPU_CK !! 45 select HAVE_ARCH_MMAP_RND_BITS if MMU
74 select HAVE_ARCH_JUMP_LABEL_RELATIVE !! 46 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
75 select HAVE_ARCH_MMAP_RND_BITS <<
76 select HAVE_ARCH_SECCOMP_FILTER 47 select HAVE_ARCH_SECCOMP_FILTER
77 select HAVE_CONTEXT_TRACKING_USER !! 48 select HAVE_ARCH_TRACEHOOK
78 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 49 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
79 select HAVE_DEBUG_BUGVERBOSE !! 50 select HAVE_ASM_MODVERSIONS
>> 51 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
>> 52 select HAVE_CONTEXT_TRACKING
>> 53 select HAVE_TIF_NOHZ
>> 54 select HAVE_COPY_THREAD_TLS
>> 55 select HAVE_C_RECORDMCOUNT
80 select HAVE_DEBUG_KMEMLEAK 56 select HAVE_DEBUG_KMEMLEAK
>> 57 select HAVE_DEBUG_STACKOVERFLOW
>> 58 select HAVE_DMA_CONTIGUOUS
81 select HAVE_DYNAMIC_FTRACE 59 select HAVE_DYNAMIC_FTRACE
82 select HAVE_DYNAMIC_FTRACE_WITH_REGS !! 60 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
83 select HAVE_GENERIC_VDSO !! 61 select HAVE_EXIT_THREAD
84 select HAVE_FUNCTION_TRACER !! 62 select HAVE_FAST_GUP
85 select HAVE_FUNCTION_GRAPH_TRACER <<
86 select HAVE_FUNCTION_ERROR_INJECTION <<
87 select HAVE_FTRACE_MCOUNT_RECORD 63 select HAVE_FTRACE_MCOUNT_RECORD
88 select HAVE_KERNEL_GZIP !! 64 select HAVE_FUNCTION_GRAPH_TRACER
89 select HAVE_KERNEL_LZO !! 65 select HAVE_FUNCTION_TRACER
90 select HAVE_KERNEL_LZMA !! 66 select HAVE_GCC_PLUGINS
91 select HAVE_KPROBES if !CPU_CK610 !! 67 select HAVE_GENERIC_VDSO
92 select HAVE_KPROBES_ON_FTRACE if !CPU_ !! 68 select HAVE_IDE
93 select HAVE_KRETPROBES if !CPU_CK610 !! 69 select HAVE_IOREMAP_PROT
94 select HAVE_PAGE_SIZE_4KB !! 70 select HAVE_IRQ_EXIT_ON_IRQ_STACK
>> 71 select HAVE_IRQ_TIME_ACCOUNTING
>> 72 select HAVE_KPROBES
>> 73 select HAVE_KRETPROBES
>> 74 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
>> 75 select HAVE_MOD_ARCH_SPECIFIC
>> 76 select HAVE_NMI
>> 77 select HAVE_OPROFILE
95 select HAVE_PERF_EVENTS 78 select HAVE_PERF_EVENTS
96 select HAVE_PERF_REGS <<
97 select HAVE_PERF_USER_STACK_DUMP <<
98 select HAVE_DMA_CONTIGUOUS <<
99 select HAVE_REGS_AND_STACK_ACCESS_API 79 select HAVE_REGS_AND_STACK_ACCESS_API
>> 80 select HAVE_RSEQ
>> 81 select HAVE_SPARSE_SYSCALL_NR
100 select HAVE_STACKPROTECTOR 82 select HAVE_STACKPROTECTOR
101 select HAVE_SYSCALL_TRACEPOINTS 83 select HAVE_SYSCALL_TRACEPOINTS
102 select HOTPLUG_CORE_SYNC_DEAD if HOTPL !! 84 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
103 select LOCK_MM_AND_FIND_VMA !! 85 select IRQ_FORCED_THREADING
104 select MAY_HAVE_SPARSE_IRQ !! 86 select ISA if EISA
105 select MODULES_USE_ELF_RELA if MODULES !! 87 select MODULES_USE_ELF_REL if MODULES
106 select OF !! 88 select MODULES_USE_ELF_RELA if MODULES && 64BIT
107 select OF_EARLY_FLATTREE !! 89 select PERF_USE_VMALLOC
108 select PERF_USE_VMALLOC if CPU_CK610 <<
109 select RTC_LIB 90 select RTC_LIB
110 select TIMER_OF !! 91 select SYSCTL_EXCEPTION_TRACE
111 select GENERIC_PCI_IOMAP !! 92 select VIRT_TO_BUS
>> 93
>> 94 config MIPS_FIXUP_BIGPHYS_ADDR
>> 95 bool
>> 96
>> 97 menu "Machine selection"
>> 98
>> 99 choice
>> 100 prompt "System type"
>> 101 default MIPS_GENERIC
>> 102
>> 103 config MIPS_GENERIC
>> 104 bool "Generic board-agnostic MIPS kernel"
>> 105 select BOOT_RAW
>> 106 select BUILTIN_DTB
>> 107 select CEVT_R4K
>> 108 select CLKSRC_MIPS_GIC
>> 109 select COMMON_CLK
>> 110 select CPU_MIPSR2_IRQ_EI
>> 111 select CPU_MIPSR2_IRQ_VI
>> 112 select CSRC_R4K
>> 113 select DMA_PERDEV_COHERENT
112 select HAVE_PCI 114 select HAVE_PCI
113 select PCI_DOMAINS_GENERIC if PCI !! 115 select IRQ_MIPS_CPU
114 select PCI_SYSCALL if PCI !! 116 select MIPS_AUTO_PFN_OFFSET
115 select PCI_MSI if PCI !! 117 select MIPS_CPU_SCACHE
116 select TRACE_IRQFLAGS_SUPPORT !! 118 select MIPS_GIC
>> 119 select MIPS_L1_CACHE_SHIFT_7
>> 120 select NO_EXCEPT_FILL
>> 121 select PCI_DRIVERS_GENERIC
>> 122 select SMP_UP if SMP
>> 123 select SWAP_IO_SPACE
>> 124 select SYS_HAS_CPU_MIPS32_R1
>> 125 select SYS_HAS_CPU_MIPS32_R2
>> 126 select SYS_HAS_CPU_MIPS32_R6
>> 127 select SYS_HAS_CPU_MIPS64_R1
>> 128 select SYS_HAS_CPU_MIPS64_R2
>> 129 select SYS_HAS_CPU_MIPS64_R6
>> 130 select SYS_SUPPORTS_32BIT_KERNEL
>> 131 select SYS_SUPPORTS_64BIT_KERNEL
>> 132 select SYS_SUPPORTS_BIG_ENDIAN
>> 133 select SYS_SUPPORTS_HIGHMEM
>> 134 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 135 select SYS_SUPPORTS_MICROMIPS
>> 136 select SYS_SUPPORTS_MIPS16
>> 137 select SYS_SUPPORTS_MIPS_CPS
>> 138 select SYS_SUPPORTS_MULTITHREADING
>> 139 select SYS_SUPPORTS_RELOCATABLE
>> 140 select SYS_SUPPORTS_SMARTMIPS
>> 141 select UHI_BOOT
>> 142 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 143 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 144 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 145 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 146 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 147 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 148 select USE_OF
>> 149 help
>> 150 Select this to build a kernel which aims to support multiple boards,
>> 151 generally using a flattened device tree passed from the bootloader
>> 152 using the boot protocol defined in the UHI (Unified Hosting
>> 153 Interface) specification.
>> 154
>> 155 config MIPS_ALCHEMY
>> 156 bool "Alchemy processor based machines"
>> 157 select PHYS_ADDR_T_64BIT
>> 158 select CEVT_R4K
>> 159 select CSRC_R4K
>> 160 select IRQ_MIPS_CPU
>> 161 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 162 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 163 select SYS_HAS_CPU_MIPS32_R1
>> 164 select SYS_SUPPORTS_32BIT_KERNEL
>> 165 select SYS_SUPPORTS_APM_EMULATION
>> 166 select GPIOLIB
>> 167 select SYS_SUPPORTS_ZBOOT
>> 168 select COMMON_CLK
117 169
118 config LOCKDEP_SUPPORT !! 170 config AR7
119 def_bool y !! 171 bool "Texas Instruments AR7"
>> 172 select BOOT_ELF32
>> 173 select DMA_NONCOHERENT
>> 174 select CEVT_R4K
>> 175 select CSRC_R4K
>> 176 select IRQ_MIPS_CPU
>> 177 select NO_EXCEPT_FILL
>> 178 select SWAP_IO_SPACE
>> 179 select SYS_HAS_CPU_MIPS32_R1
>> 180 select SYS_HAS_EARLY_PRINTK
>> 181 select SYS_SUPPORTS_32BIT_KERNEL
>> 182 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 183 select SYS_SUPPORTS_MIPS16
>> 184 select SYS_SUPPORTS_ZBOOT_UART16550
>> 185 select GPIOLIB
>> 186 select VLYNQ
>> 187 select HAVE_LEGACY_CLK
>> 188 help
>> 189 Support for the Texas Instruments AR7 System-on-a-Chip
>> 190 family: TNETD7100, 7200 and 7300.
>> 191
>> 192 config ATH25
>> 193 bool "Atheros AR231x/AR531x SoC support"
>> 194 select CEVT_R4K
>> 195 select CSRC_R4K
>> 196 select DMA_NONCOHERENT
>> 197 select IRQ_MIPS_CPU
>> 198 select IRQ_DOMAIN
>> 199 select SYS_HAS_CPU_MIPS32_R1
>> 200 select SYS_SUPPORTS_BIG_ENDIAN
>> 201 select SYS_SUPPORTS_32BIT_KERNEL
>> 202 select SYS_HAS_EARLY_PRINTK
>> 203 help
>> 204 Support for Atheros AR231x and Atheros AR531x based boards
>> 205
>> 206 config ATH79
>> 207 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 208 select ARCH_HAS_RESET_CONTROLLER
>> 209 select BOOT_RAW
>> 210 select CEVT_R4K
>> 211 select CSRC_R4K
>> 212 select DMA_NONCOHERENT
>> 213 select GPIOLIB
>> 214 select PINCTRL
>> 215 select COMMON_CLK
>> 216 select IRQ_MIPS_CPU
>> 217 select SYS_HAS_CPU_MIPS32_R2
>> 218 select SYS_HAS_EARLY_PRINTK
>> 219 select SYS_SUPPORTS_32BIT_KERNEL
>> 220 select SYS_SUPPORTS_BIG_ENDIAN
>> 221 select SYS_SUPPORTS_MIPS16
>> 222 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 223 select USE_OF
>> 224 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 225 help
>> 226 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 227
>> 228 config BMIPS_GENERIC
>> 229 bool "Broadcom Generic BMIPS kernel"
>> 230 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 231 select ARCH_HAS_PHYS_TO_DMA
>> 232 select BOOT_RAW
>> 233 select NO_EXCEPT_FILL
>> 234 select USE_OF
>> 235 select CEVT_R4K
>> 236 select CSRC_R4K
>> 237 select SYNC_R4K
>> 238 select COMMON_CLK
>> 239 select BCM6345_L1_IRQ
>> 240 select BCM7038_L1_IRQ
>> 241 select BCM7120_L2_IRQ
>> 242 select BRCMSTB_L2_IRQ
>> 243 select IRQ_MIPS_CPU
>> 244 select DMA_NONCOHERENT
>> 245 select SYS_SUPPORTS_32BIT_KERNEL
>> 246 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 247 select SYS_SUPPORTS_BIG_ENDIAN
>> 248 select SYS_SUPPORTS_HIGHMEM
>> 249 select SYS_HAS_CPU_BMIPS32_3300
>> 250 select SYS_HAS_CPU_BMIPS4350
>> 251 select SYS_HAS_CPU_BMIPS4380
>> 252 select SYS_HAS_CPU_BMIPS5000
>> 253 select SWAP_IO_SPACE
>> 254 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 255 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 256 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 257 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 258 select HARDIRQS_SW_RESEND
>> 259 help
>> 260 Build a generic DT-based kernel image that boots on select
>> 261 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 262 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 263 must be set appropriately for your board.
>> 264
>> 265 config BCM47XX
>> 266 bool "Broadcom BCM47XX based boards"
>> 267 select BOOT_RAW
>> 268 select CEVT_R4K
>> 269 select CSRC_R4K
>> 270 select DMA_NONCOHERENT
>> 271 select HAVE_PCI
>> 272 select IRQ_MIPS_CPU
>> 273 select SYS_HAS_CPU_MIPS32_R1
>> 274 select NO_EXCEPT_FILL
>> 275 select SYS_SUPPORTS_32BIT_KERNEL
>> 276 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 277 select SYS_SUPPORTS_MIPS16
>> 278 select SYS_SUPPORTS_ZBOOT
>> 279 select SYS_HAS_EARLY_PRINTK
>> 280 select USE_GENERIC_EARLY_PRINTK_8250
>> 281 select GPIOLIB
>> 282 select LEDS_GPIO_REGISTER
>> 283 select BCM47XX_NVRAM
>> 284 select BCM47XX_SPROM
>> 285 select BCM47XX_SSB if !BCM47XX_BCMA
>> 286 help
>> 287 Support for BCM47XX based boards
>> 288
>> 289 config BCM63XX
>> 290 bool "Broadcom BCM63XX based boards"
>> 291 select BOOT_RAW
>> 292 select CEVT_R4K
>> 293 select CSRC_R4K
>> 294 select SYNC_R4K
>> 295 select DMA_NONCOHERENT
>> 296 select IRQ_MIPS_CPU
>> 297 select SYS_SUPPORTS_32BIT_KERNEL
>> 298 select SYS_SUPPORTS_BIG_ENDIAN
>> 299 select SYS_HAS_EARLY_PRINTK
>> 300 select SWAP_IO_SPACE
>> 301 select GPIOLIB
>> 302 select MIPS_L1_CACHE_SHIFT_4
>> 303 select CLKDEV_LOOKUP
>> 304 select HAVE_LEGACY_CLK
>> 305 help
>> 306 Support for BCM63XX based boards
>> 307
>> 308 config MIPS_COBALT
>> 309 bool "Cobalt Server"
>> 310 select CEVT_R4K
>> 311 select CSRC_R4K
>> 312 select CEVT_GT641XX
>> 313 select DMA_NONCOHERENT
>> 314 select FORCE_PCI
>> 315 select I8253
>> 316 select I8259
>> 317 select IRQ_MIPS_CPU
>> 318 select IRQ_GT641XX
>> 319 select PCI_GT64XXX_PCI0
>> 320 select SYS_HAS_CPU_NEVADA
>> 321 select SYS_HAS_EARLY_PRINTK
>> 322 select SYS_SUPPORTS_32BIT_KERNEL
>> 323 select SYS_SUPPORTS_64BIT_KERNEL
>> 324 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 325 select USE_GENERIC_EARLY_PRINTK_8250
>> 326
>> 327 config MACH_DECSTATION
>> 328 bool "DECstations"
>> 329 select BOOT_ELF32
>> 330 select CEVT_DS1287
>> 331 select CEVT_R4K if CPU_R4X00
>> 332 select CSRC_IOASIC
>> 333 select CSRC_R4K if CPU_R4X00
>> 334 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 335 select CPU_R4000_WORKAROUNDS if 64BIT
>> 336 select CPU_R4400_WORKAROUNDS if 64BIT
>> 337 select DMA_NONCOHERENT
>> 338 select NO_IOPORT_MAP
>> 339 select IRQ_MIPS_CPU
>> 340 select SYS_HAS_CPU_R3000
>> 341 select SYS_HAS_CPU_R4X00
>> 342 select SYS_SUPPORTS_32BIT_KERNEL
>> 343 select SYS_SUPPORTS_64BIT_KERNEL
>> 344 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 345 select SYS_SUPPORTS_128HZ
>> 346 select SYS_SUPPORTS_256HZ
>> 347 select SYS_SUPPORTS_1024HZ
>> 348 select MIPS_L1_CACHE_SHIFT_4
>> 349 help
>> 350 This enables support for DEC's MIPS based workstations. For details
>> 351 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 352 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 353
>> 354 If you have one of the following DECstation Models you definitely
>> 355 want to choose R4xx0 for the CPU Type:
>> 356
>> 357 DECstation 5000/50
>> 358 DECstation 5000/150
>> 359 DECstation 5000/260
>> 360 DECsystem 5900/260
>> 361
>> 362 otherwise choose R3000.
>> 363
>> 364 config MACH_JAZZ
>> 365 bool "Jazz family of machines"
>> 366 select ARC_MEMORY
>> 367 select ARC_PROMLIB
>> 368 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 369 select ARCH_MIGHT_HAVE_PC_SERIO
>> 370 select FW_ARC
>> 371 select FW_ARC32
>> 372 select ARCH_MAY_HAVE_PC_FDC
>> 373 select CEVT_R4K
>> 374 select CSRC_R4K
>> 375 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 376 select GENERIC_ISA_DMA
>> 377 select HAVE_PCSPKR_PLATFORM
>> 378 select IRQ_MIPS_CPU
>> 379 select I8253
>> 380 select I8259
>> 381 select ISA
>> 382 select SYS_HAS_CPU_R4X00
>> 383 select SYS_SUPPORTS_32BIT_KERNEL
>> 384 select SYS_SUPPORTS_64BIT_KERNEL
>> 385 select SYS_SUPPORTS_100HZ
>> 386 help
>> 387 This a family of machines based on the MIPS R4030 chipset which was
>> 388 used by several vendors to build RISC/os and Windows NT workstations.
>> 389 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 390 Olivetti M700-10 workstations.
>> 391
>> 392 config MACH_INGENIC
>> 393 bool "Ingenic SoC based machines"
>> 394 select SYS_SUPPORTS_32BIT_KERNEL
>> 395 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 396 select SYS_SUPPORTS_ZBOOT_UART16550
>> 397 select CPU_SUPPORTS_HUGEPAGES
>> 398 select DMA_NONCOHERENT
>> 399 select IRQ_MIPS_CPU
>> 400 select PINCTRL
>> 401 select GPIOLIB
>> 402 select COMMON_CLK
>> 403 select GENERIC_IRQ_CHIP
>> 404 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 405 select USE_OF
>> 406
>> 407 config LANTIQ
>> 408 bool "Lantiq based platforms"
>> 409 select DMA_NONCOHERENT
>> 410 select IRQ_MIPS_CPU
>> 411 select CEVT_R4K
>> 412 select CSRC_R4K
>> 413 select SYS_HAS_CPU_MIPS32_R1
>> 414 select SYS_HAS_CPU_MIPS32_R2
>> 415 select SYS_SUPPORTS_BIG_ENDIAN
>> 416 select SYS_SUPPORTS_32BIT_KERNEL
>> 417 select SYS_SUPPORTS_MIPS16
>> 418 select SYS_SUPPORTS_MULTITHREADING
>> 419 select SYS_SUPPORTS_VPE_LOADER
>> 420 select SYS_HAS_EARLY_PRINTK
>> 421 select GPIOLIB
>> 422 select SWAP_IO_SPACE
>> 423 select BOOT_RAW
>> 424 select CLKDEV_LOOKUP
>> 425 select HAVE_LEGACY_CLK
>> 426 select USE_OF
>> 427 select PINCTRL
>> 428 select PINCTRL_LANTIQ
>> 429 select ARCH_HAS_RESET_CONTROLLER
>> 430 select RESET_CONTROLLER
>> 431
>> 432 config MACH_LOONGSON32
>> 433 bool "Loongson 32-bit family of machines"
>> 434 select SYS_SUPPORTS_ZBOOT
>> 435 help
>> 436 This enables support for the Loongson-1 family of machines.
>> 437
>> 438 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 439 the Institute of Computing Technology (ICT), Chinese Academy of
>> 440 Sciences (CAS).
>> 441
>> 442 config MACH_LOONGSON2EF
>> 443 bool "Loongson-2E/F family of machines"
>> 444 select SYS_SUPPORTS_ZBOOT
>> 445 help
>> 446 This enables the support of early Loongson-2E/F family of machines.
>> 447
>> 448 config MACH_LOONGSON64
>> 449 bool "Loongson 64-bit family of machines"
>> 450 select ARCH_SPARSEMEM_ENABLE
>> 451 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 452 select ARCH_MIGHT_HAVE_PC_SERIO
>> 453 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 454 select BOOT_ELF32
>> 455 select BOARD_SCACHE
>> 456 select CSRC_R4K
>> 457 select CEVT_R4K
>> 458 select CPU_HAS_WB
>> 459 select FORCE_PCI
>> 460 select ISA
>> 461 select I8259
>> 462 select IRQ_MIPS_CPU
>> 463 select NO_EXCEPT_FILL
>> 464 select NR_CPUS_DEFAULT_64
>> 465 select USE_GENERIC_EARLY_PRINTK_8250
>> 466 select PCI_DRIVERS_GENERIC
>> 467 select SYS_HAS_CPU_LOONGSON64
>> 468 select SYS_HAS_EARLY_PRINTK
>> 469 select SYS_SUPPORTS_SMP
>> 470 select SYS_SUPPORTS_HOTPLUG_CPU
>> 471 select SYS_SUPPORTS_NUMA
>> 472 select SYS_SUPPORTS_64BIT_KERNEL
>> 473 select SYS_SUPPORTS_HIGHMEM
>> 474 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 475 select SYS_SUPPORTS_ZBOOT
>> 476 select ZONE_DMA32
>> 477 select NUMA
>> 478 select COMMON_CLK
>> 479 select USE_OF
>> 480 select BUILTIN_DTB
>> 481 help
>> 482 This enables the support of Loongson-2/3 family of machines.
>> 483
>> 484 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 485 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 486 and Loongson-2F which will be removed), developed by the Institute
>> 487 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 488
>> 489 config MACH_PISTACHIO
>> 490 bool "IMG Pistachio SoC based boards"
>> 491 select BOOT_ELF32
>> 492 select BOOT_RAW
>> 493 select CEVT_R4K
>> 494 select CLKSRC_MIPS_GIC
>> 495 select COMMON_CLK
>> 496 select CSRC_R4K
>> 497 select DMA_NONCOHERENT
>> 498 select GPIOLIB
>> 499 select IRQ_MIPS_CPU
>> 500 select MFD_SYSCON
>> 501 select MIPS_CPU_SCACHE
>> 502 select MIPS_GIC
>> 503 select PINCTRL
>> 504 select REGULATOR
>> 505 select SYS_HAS_CPU_MIPS32_R2
>> 506 select SYS_SUPPORTS_32BIT_KERNEL
>> 507 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 508 select SYS_SUPPORTS_MIPS_CPS
>> 509 select SYS_SUPPORTS_MULTITHREADING
>> 510 select SYS_SUPPORTS_RELOCATABLE
>> 511 select SYS_SUPPORTS_ZBOOT
>> 512 select SYS_HAS_EARLY_PRINTK
>> 513 select USE_GENERIC_EARLY_PRINTK_8250
>> 514 select USE_OF
>> 515 help
>> 516 This enables support for the IMG Pistachio SoC platform.
>> 517
>> 518 config MIPS_MALTA
>> 519 bool "MIPS Malta board"
>> 520 select ARCH_MAY_HAVE_PC_FDC
>> 521 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 522 select ARCH_MIGHT_HAVE_PC_SERIO
>> 523 select BOOT_ELF32
>> 524 select BOOT_RAW
>> 525 select BUILTIN_DTB
>> 526 select CEVT_R4K
>> 527 select CLKSRC_MIPS_GIC
>> 528 select COMMON_CLK
>> 529 select CSRC_R4K
>> 530 select DMA_MAYBE_COHERENT
>> 531 select GENERIC_ISA_DMA
>> 532 select HAVE_PCSPKR_PLATFORM
>> 533 select HAVE_PCI
>> 534 select I8253
>> 535 select I8259
>> 536 select IRQ_MIPS_CPU
>> 537 select MIPS_BONITO64
>> 538 select MIPS_CPU_SCACHE
>> 539 select MIPS_GIC
>> 540 select MIPS_L1_CACHE_SHIFT_6
>> 541 select MIPS_MSC
>> 542 select PCI_GT64XXX_PCI0
>> 543 select SMP_UP if SMP
>> 544 select SWAP_IO_SPACE
>> 545 select SYS_HAS_CPU_MIPS32_R1
>> 546 select SYS_HAS_CPU_MIPS32_R2
>> 547 select SYS_HAS_CPU_MIPS32_R3_5
>> 548 select SYS_HAS_CPU_MIPS32_R5
>> 549 select SYS_HAS_CPU_MIPS32_R6
>> 550 select SYS_HAS_CPU_MIPS64_R1
>> 551 select SYS_HAS_CPU_MIPS64_R2
>> 552 select SYS_HAS_CPU_MIPS64_R6
>> 553 select SYS_HAS_CPU_NEVADA
>> 554 select SYS_HAS_CPU_RM7000
>> 555 select SYS_SUPPORTS_32BIT_KERNEL
>> 556 select SYS_SUPPORTS_64BIT_KERNEL
>> 557 select SYS_SUPPORTS_BIG_ENDIAN
>> 558 select SYS_SUPPORTS_HIGHMEM
>> 559 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 560 select SYS_SUPPORTS_MICROMIPS
>> 561 select SYS_SUPPORTS_MIPS16
>> 562 select SYS_SUPPORTS_MIPS_CMP
>> 563 select SYS_SUPPORTS_MIPS_CPS
>> 564 select SYS_SUPPORTS_MULTITHREADING
>> 565 select SYS_SUPPORTS_RELOCATABLE
>> 566 select SYS_SUPPORTS_SMARTMIPS
>> 567 select SYS_SUPPORTS_VPE_LOADER
>> 568 select SYS_SUPPORTS_ZBOOT
>> 569 select USE_OF
>> 570 select ZONE_DMA32 if 64BIT
>> 571 help
>> 572 This enables support for the MIPS Technologies Malta evaluation
>> 573 board.
>> 574
>> 575 config MACH_PIC32
>> 576 bool "Microchip PIC32 Family"
>> 577 help
>> 578 This enables support for the Microchip PIC32 family of platforms.
>> 579
>> 580 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 581 microcontrollers.
>> 582
>> 583 config MACH_VR41XX
>> 584 bool "NEC VR4100 series based machines"
>> 585 select CEVT_R4K
>> 586 select CSRC_R4K
>> 587 select SYS_HAS_CPU_VR41XX
>> 588 select SYS_SUPPORTS_MIPS16
>> 589 select GPIOLIB
>> 590
>> 591 config NXP_STB220
>> 592 bool "NXP STB220 board"
>> 593 select SOC_PNX833X
>> 594 help
>> 595 Support for NXP Semiconductors STB220 Development Board.
>> 596
>> 597 config NXP_STB225
>> 598 bool "NXP 225 board"
>> 599 select SOC_PNX833X
>> 600 select SOC_PNX8335
>> 601 help
>> 602 Support for NXP Semiconductors STB225 Development Board.
>> 603
>> 604 config RALINK
>> 605 bool "Ralink based machines"
>> 606 select CEVT_R4K
>> 607 select CSRC_R4K
>> 608 select BOOT_RAW
>> 609 select DMA_NONCOHERENT
>> 610 select IRQ_MIPS_CPU
>> 611 select USE_OF
>> 612 select SYS_HAS_CPU_MIPS32_R1
>> 613 select SYS_HAS_CPU_MIPS32_R2
>> 614 select SYS_SUPPORTS_32BIT_KERNEL
>> 615 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 616 select SYS_SUPPORTS_MIPS16
>> 617 select SYS_HAS_EARLY_PRINTK
>> 618 select CLKDEV_LOOKUP
>> 619 select ARCH_HAS_RESET_CONTROLLER
>> 620 select RESET_CONTROLLER
>> 621
>> 622 config SGI_IP22
>> 623 bool "SGI IP22 (Indy/Indigo2)"
>> 624 select ARC_MEMORY
>> 625 select ARC_PROMLIB
>> 626 select FW_ARC
>> 627 select FW_ARC32
>> 628 select ARCH_MIGHT_HAVE_PC_SERIO
>> 629 select BOOT_ELF32
>> 630 select CEVT_R4K
>> 631 select CSRC_R4K
>> 632 select DEFAULT_SGI_PARTITION
>> 633 select DMA_NONCOHERENT
>> 634 select HAVE_EISA
>> 635 select I8253
>> 636 select I8259
>> 637 select IP22_CPU_SCACHE
>> 638 select IRQ_MIPS_CPU
>> 639 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 640 select SGI_HAS_I8042
>> 641 select SGI_HAS_INDYDOG
>> 642 select SGI_HAS_HAL2
>> 643 select SGI_HAS_SEEQ
>> 644 select SGI_HAS_WD93
>> 645 select SGI_HAS_ZILOG
>> 646 select SWAP_IO_SPACE
>> 647 select SYS_HAS_CPU_R4X00
>> 648 select SYS_HAS_CPU_R5000
>> 649 select SYS_HAS_EARLY_PRINTK
>> 650 select SYS_SUPPORTS_32BIT_KERNEL
>> 651 select SYS_SUPPORTS_64BIT_KERNEL
>> 652 select SYS_SUPPORTS_BIG_ENDIAN
>> 653 select MIPS_L1_CACHE_SHIFT_7
>> 654 help
>> 655 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 656 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 657 that runs on these, say Y here.
>> 658
>> 659 config SGI_IP27
>> 660 bool "SGI IP27 (Origin200/2000)"
>> 661 select ARCH_HAS_PHYS_TO_DMA
>> 662 select ARCH_SPARSEMEM_ENABLE
>> 663 select FW_ARC
>> 664 select FW_ARC64
>> 665 select ARC_CMDLINE_ONLY
>> 666 select BOOT_ELF64
>> 667 select DEFAULT_SGI_PARTITION
>> 668 select SYS_HAS_EARLY_PRINTK
>> 669 select HAVE_PCI
>> 670 select IRQ_MIPS_CPU
>> 671 select IRQ_DOMAIN_HIERARCHY
>> 672 select NR_CPUS_DEFAULT_64
>> 673 select PCI_DRIVERS_GENERIC
>> 674 select PCI_XTALK_BRIDGE
>> 675 select SYS_HAS_CPU_R10000
>> 676 select SYS_SUPPORTS_64BIT_KERNEL
>> 677 select SYS_SUPPORTS_BIG_ENDIAN
>> 678 select SYS_SUPPORTS_NUMA
>> 679 select SYS_SUPPORTS_SMP
>> 680 select MIPS_L1_CACHE_SHIFT_7
>> 681 select NUMA
>> 682 help
>> 683 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 684 workstations. To compile a Linux kernel that runs on these, say Y
>> 685 here.
>> 686
>> 687 config SGI_IP28
>> 688 bool "SGI IP28 (Indigo2 R10k)"
>> 689 select ARC_MEMORY
>> 690 select ARC_PROMLIB
>> 691 select FW_ARC
>> 692 select FW_ARC64
>> 693 select ARCH_MIGHT_HAVE_PC_SERIO
>> 694 select BOOT_ELF64
>> 695 select CEVT_R4K
>> 696 select CSRC_R4K
>> 697 select DEFAULT_SGI_PARTITION
>> 698 select DMA_NONCOHERENT
>> 699 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 700 select IRQ_MIPS_CPU
>> 701 select HAVE_EISA
>> 702 select I8253
>> 703 select I8259
>> 704 select SGI_HAS_I8042
>> 705 select SGI_HAS_INDYDOG
>> 706 select SGI_HAS_HAL2
>> 707 select SGI_HAS_SEEQ
>> 708 select SGI_HAS_WD93
>> 709 select SGI_HAS_ZILOG
>> 710 select SWAP_IO_SPACE
>> 711 select SYS_HAS_CPU_R10000
>> 712 select SYS_HAS_EARLY_PRINTK
>> 713 select SYS_SUPPORTS_64BIT_KERNEL
>> 714 select SYS_SUPPORTS_BIG_ENDIAN
>> 715 select MIPS_L1_CACHE_SHIFT_7
>> 716 help
>> 717 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 718 kernel that runs on these, say Y here.
>> 719
>> 720 config SGI_IP30
>> 721 bool "SGI IP30 (Octane/Octane2)"
>> 722 select ARCH_HAS_PHYS_TO_DMA
>> 723 select FW_ARC
>> 724 select FW_ARC64
>> 725 select BOOT_ELF64
>> 726 select CEVT_R4K
>> 727 select CSRC_R4K
>> 728 select SYNC_R4K if SMP
>> 729 select ZONE_DMA32
>> 730 select HAVE_PCI
>> 731 select IRQ_MIPS_CPU
>> 732 select IRQ_DOMAIN_HIERARCHY
>> 733 select NR_CPUS_DEFAULT_2
>> 734 select PCI_DRIVERS_GENERIC
>> 735 select PCI_XTALK_BRIDGE
>> 736 select SYS_HAS_EARLY_PRINTK
>> 737 select SYS_HAS_CPU_R10000
>> 738 select SYS_SUPPORTS_64BIT_KERNEL
>> 739 select SYS_SUPPORTS_BIG_ENDIAN
>> 740 select SYS_SUPPORTS_SMP
>> 741 select MIPS_L1_CACHE_SHIFT_7
>> 742 select ARC_MEMORY
>> 743 help
>> 744 These are the SGI Octane and Octane2 graphics workstations. To
>> 745 compile a Linux kernel that runs on these, say Y here.
>> 746
>> 747 config SGI_IP32
>> 748 bool "SGI IP32 (O2)"
>> 749 select ARC_MEMORY
>> 750 select ARC_PROMLIB
>> 751 select ARCH_HAS_PHYS_TO_DMA
>> 752 select FW_ARC
>> 753 select FW_ARC32
>> 754 select BOOT_ELF32
>> 755 select CEVT_R4K
>> 756 select CSRC_R4K
>> 757 select DMA_NONCOHERENT
>> 758 select HAVE_PCI
>> 759 select IRQ_MIPS_CPU
>> 760 select R5000_CPU_SCACHE
>> 761 select RM7000_CPU_SCACHE
>> 762 select SYS_HAS_CPU_R5000
>> 763 select SYS_HAS_CPU_R10000 if BROKEN
>> 764 select SYS_HAS_CPU_RM7000
>> 765 select SYS_HAS_CPU_NEVADA
>> 766 select SYS_SUPPORTS_64BIT_KERNEL
>> 767 select SYS_SUPPORTS_BIG_ENDIAN
>> 768 help
>> 769 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 770
>> 771 config SIBYTE_CRHINE
>> 772 bool "Sibyte BCM91120C-CRhine"
>> 773 select BOOT_ELF32
>> 774 select SIBYTE_BCM1120
>> 775 select SWAP_IO_SPACE
>> 776 select SYS_HAS_CPU_SB1
>> 777 select SYS_SUPPORTS_BIG_ENDIAN
>> 778 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 779
>> 780 config SIBYTE_CARMEL
>> 781 bool "Sibyte BCM91120x-Carmel"
>> 782 select BOOT_ELF32
>> 783 select SIBYTE_BCM1120
>> 784 select SWAP_IO_SPACE
>> 785 select SYS_HAS_CPU_SB1
>> 786 select SYS_SUPPORTS_BIG_ENDIAN
>> 787 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 788
>> 789 config SIBYTE_CRHONE
>> 790 bool "Sibyte BCM91125C-CRhone"
>> 791 select BOOT_ELF32
>> 792 select SIBYTE_BCM1125
>> 793 select SWAP_IO_SPACE
>> 794 select SYS_HAS_CPU_SB1
>> 795 select SYS_SUPPORTS_BIG_ENDIAN
>> 796 select SYS_SUPPORTS_HIGHMEM
>> 797 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 798
>> 799 config SIBYTE_RHONE
>> 800 bool "Sibyte BCM91125E-Rhone"
>> 801 select BOOT_ELF32
>> 802 select SIBYTE_BCM1125H
>> 803 select SWAP_IO_SPACE
>> 804 select SYS_HAS_CPU_SB1
>> 805 select SYS_SUPPORTS_BIG_ENDIAN
>> 806 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 807
>> 808 config SIBYTE_SWARM
>> 809 bool "Sibyte BCM91250A-SWARM"
>> 810 select BOOT_ELF32
>> 811 select HAVE_PATA_PLATFORM
>> 812 select SIBYTE_SB1250
>> 813 select SWAP_IO_SPACE
>> 814 select SYS_HAS_CPU_SB1
>> 815 select SYS_SUPPORTS_BIG_ENDIAN
>> 816 select SYS_SUPPORTS_HIGHMEM
>> 817 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 818 select ZONE_DMA32 if 64BIT
>> 819 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 820
>> 821 config SIBYTE_LITTLESUR
>> 822 bool "Sibyte BCM91250C2-LittleSur"
>> 823 select BOOT_ELF32
>> 824 select HAVE_PATA_PLATFORM
>> 825 select SIBYTE_SB1250
>> 826 select SWAP_IO_SPACE
>> 827 select SYS_HAS_CPU_SB1
>> 828 select SYS_SUPPORTS_BIG_ENDIAN
>> 829 select SYS_SUPPORTS_HIGHMEM
>> 830 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 831 select ZONE_DMA32 if 64BIT
>> 832
>> 833 config SIBYTE_SENTOSA
>> 834 bool "Sibyte BCM91250E-Sentosa"
>> 835 select BOOT_ELF32
>> 836 select SIBYTE_SB1250
>> 837 select SWAP_IO_SPACE
>> 838 select SYS_HAS_CPU_SB1
>> 839 select SYS_SUPPORTS_BIG_ENDIAN
>> 840 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 841 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 842
>> 843 config SIBYTE_BIGSUR
>> 844 bool "Sibyte BCM91480B-BigSur"
>> 845 select BOOT_ELF32
>> 846 select NR_CPUS_DEFAULT_4
>> 847 select SIBYTE_BCM1x80
>> 848 select SWAP_IO_SPACE
>> 849 select SYS_HAS_CPU_SB1
>> 850 select SYS_SUPPORTS_BIG_ENDIAN
>> 851 select SYS_SUPPORTS_HIGHMEM
>> 852 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 853 select ZONE_DMA32 if 64BIT
>> 854 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 855
>> 856 config SNI_RM
>> 857 bool "SNI RM200/300/400"
>> 858 select ARC_MEMORY
>> 859 select ARC_PROMLIB
>> 860 select FW_ARC if CPU_LITTLE_ENDIAN
>> 861 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 862 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 863 select ARCH_MAY_HAVE_PC_FDC
>> 864 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 865 select ARCH_MIGHT_HAVE_PC_SERIO
>> 866 select BOOT_ELF32
>> 867 select CEVT_R4K
>> 868 select CSRC_R4K
>> 869 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 870 select DMA_NONCOHERENT
>> 871 select GENERIC_ISA_DMA
>> 872 select HAVE_EISA
>> 873 select HAVE_PCSPKR_PLATFORM
>> 874 select HAVE_PCI
>> 875 select IRQ_MIPS_CPU
>> 876 select I8253
>> 877 select I8259
>> 878 select ISA
>> 879 select MIPS_L1_CACHE_SHIFT_6
>> 880 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 881 select SYS_HAS_CPU_R4X00
>> 882 select SYS_HAS_CPU_R5000
>> 883 select SYS_HAS_CPU_R10000
>> 884 select R5000_CPU_SCACHE
>> 885 select SYS_HAS_EARLY_PRINTK
>> 886 select SYS_SUPPORTS_32BIT_KERNEL
>> 887 select SYS_SUPPORTS_64BIT_KERNEL
>> 888 select SYS_SUPPORTS_BIG_ENDIAN
>> 889 select SYS_SUPPORTS_HIGHMEM
>> 890 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 891 help
>> 892 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 893 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 894 Technology and now in turn merged with Fujitsu. Say Y here to
>> 895 support this machine type.
>> 896
>> 897 config MACH_TX39XX
>> 898 bool "Toshiba TX39 series based machines"
>> 899
>> 900 config MACH_TX49XX
>> 901 bool "Toshiba TX49 series based machines"
>> 902
>> 903 config MIKROTIK_RB532
>> 904 bool "Mikrotik RB532 boards"
>> 905 select CEVT_R4K
>> 906 select CSRC_R4K
>> 907 select DMA_NONCOHERENT
>> 908 select HAVE_PCI
>> 909 select IRQ_MIPS_CPU
>> 910 select SYS_HAS_CPU_MIPS32_R1
>> 911 select SYS_SUPPORTS_32BIT_KERNEL
>> 912 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 913 select SWAP_IO_SPACE
>> 914 select BOOT_RAW
>> 915 select GPIOLIB
>> 916 select MIPS_L1_CACHE_SHIFT_4
>> 917 help
>> 918 Support the Mikrotik(tm) RouterBoard 532 series,
>> 919 based on the IDT RC32434 SoC.
>> 920
>> 921 config CAVIUM_OCTEON_SOC
>> 922 bool "Cavium Networks Octeon SoC based boards"
>> 923 select CEVT_R4K
>> 924 select ARCH_HAS_PHYS_TO_DMA
>> 925 select HAVE_RAPIDIO
>> 926 select PHYS_ADDR_T_64BIT
>> 927 select SYS_SUPPORTS_64BIT_KERNEL
>> 928 select SYS_SUPPORTS_BIG_ENDIAN
>> 929 select EDAC_SUPPORT
>> 930 select EDAC_ATOMIC_SCRUB
>> 931 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 932 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 933 select SYS_HAS_EARLY_PRINTK
>> 934 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 935 select HAVE_PCI
>> 936 select HAVE_PLAT_DELAY
>> 937 select HAVE_PLAT_FW_INIT_CMDLINE
>> 938 select HAVE_PLAT_MEMCPY
>> 939 select ZONE_DMA32
>> 940 select HOLES_IN_ZONE
>> 941 select GPIOLIB
>> 942 select USE_OF
>> 943 select ARCH_SPARSEMEM_ENABLE
>> 944 select SYS_SUPPORTS_SMP
>> 945 select NR_CPUS_DEFAULT_64
>> 946 select MIPS_NR_CPU_NR_MAP_1024
>> 947 select BUILTIN_DTB
>> 948 select MTD_COMPLEX_MAPPINGS
>> 949 select SWIOTLB
>> 950 select SYS_SUPPORTS_RELOCATABLE
>> 951 help
>> 952 This option supports all of the Octeon reference boards from Cavium
>> 953 Networks. It builds a kernel that dynamically determines the Octeon
>> 954 CPU type and supports all known board reference implementations.
>> 955 Some of the supported boards are:
>> 956 EBT3000
>> 957 EBH3000
>> 958 EBH3100
>> 959 Thunder
>> 960 Kodama
>> 961 Hikari
>> 962 Say Y here for most Octeon reference boards.
>> 963
>> 964 config NLM_XLR_BOARD
>> 965 bool "Netlogic XLR/XLS based systems"
>> 966 select BOOT_ELF32
>> 967 select NLM_COMMON
>> 968 select SYS_HAS_CPU_XLR
>> 969 select SYS_SUPPORTS_SMP
>> 970 select HAVE_PCI
>> 971 select SWAP_IO_SPACE
>> 972 select SYS_SUPPORTS_32BIT_KERNEL
>> 973 select SYS_SUPPORTS_64BIT_KERNEL
>> 974 select PHYS_ADDR_T_64BIT
>> 975 select SYS_SUPPORTS_BIG_ENDIAN
>> 976 select SYS_SUPPORTS_HIGHMEM
>> 977 select NR_CPUS_DEFAULT_32
>> 978 select CEVT_R4K
>> 979 select CSRC_R4K
>> 980 select IRQ_MIPS_CPU
>> 981 select ZONE_DMA32 if 64BIT
>> 982 select SYNC_R4K
>> 983 select SYS_HAS_EARLY_PRINTK
>> 984 select SYS_SUPPORTS_ZBOOT
>> 985 select SYS_SUPPORTS_ZBOOT_UART16550
>> 986 help
>> 987 Support for systems based on Netlogic XLR and XLS processors.
>> 988 Say Y here if you have a XLR or XLS based board.
>> 989
>> 990 config NLM_XLP_BOARD
>> 991 bool "Netlogic XLP based systems"
>> 992 select BOOT_ELF32
>> 993 select NLM_COMMON
>> 994 select SYS_HAS_CPU_XLP
>> 995 select SYS_SUPPORTS_SMP
>> 996 select HAVE_PCI
>> 997 select SYS_SUPPORTS_32BIT_KERNEL
>> 998 select SYS_SUPPORTS_64BIT_KERNEL
>> 999 select PHYS_ADDR_T_64BIT
>> 1000 select GPIOLIB
>> 1001 select SYS_SUPPORTS_BIG_ENDIAN
>> 1002 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1003 select SYS_SUPPORTS_HIGHMEM
>> 1004 select NR_CPUS_DEFAULT_32
>> 1005 select CEVT_R4K
>> 1006 select CSRC_R4K
>> 1007 select IRQ_MIPS_CPU
>> 1008 select ZONE_DMA32 if 64BIT
>> 1009 select SYNC_R4K
>> 1010 select SYS_HAS_EARLY_PRINTK
>> 1011 select USE_OF
>> 1012 select SYS_SUPPORTS_ZBOOT
>> 1013 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1014 help
>> 1015 This board is based on Netlogic XLP Processor.
>> 1016 Say Y here if you have a XLP based board.
>> 1017
>> 1018 config MIPS_PARAVIRT
>> 1019 bool "Para-Virtualized guest system"
>> 1020 select CEVT_R4K
>> 1021 select CSRC_R4K
>> 1022 select SYS_SUPPORTS_64BIT_KERNEL
>> 1023 select SYS_SUPPORTS_32BIT_KERNEL
>> 1024 select SYS_SUPPORTS_BIG_ENDIAN
>> 1025 select SYS_SUPPORTS_SMP
>> 1026 select NR_CPUS_DEFAULT_4
>> 1027 select SYS_HAS_EARLY_PRINTK
>> 1028 select SYS_HAS_CPU_MIPS32_R2
>> 1029 select SYS_HAS_CPU_MIPS64_R2
>> 1030 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1031 select HAVE_PCI
>> 1032 select SWAP_IO_SPACE
>> 1033 help
>> 1034 This option supports guest running under ????
>> 1035
>> 1036 endchoice
>> 1037
>> 1038 source "arch/mips/alchemy/Kconfig"
>> 1039 source "arch/mips/ath25/Kconfig"
>> 1040 source "arch/mips/ath79/Kconfig"
>> 1041 source "arch/mips/bcm47xx/Kconfig"
>> 1042 source "arch/mips/bcm63xx/Kconfig"
>> 1043 source "arch/mips/bmips/Kconfig"
>> 1044 source "arch/mips/generic/Kconfig"
>> 1045 source "arch/mips/jazz/Kconfig"
>> 1046 source "arch/mips/jz4740/Kconfig"
>> 1047 source "arch/mips/lantiq/Kconfig"
>> 1048 source "arch/mips/pic32/Kconfig"
>> 1049 source "arch/mips/pistachio/Kconfig"
>> 1050 source "arch/mips/ralink/Kconfig"
>> 1051 source "arch/mips/sgi-ip27/Kconfig"
>> 1052 source "arch/mips/sibyte/Kconfig"
>> 1053 source "arch/mips/txx9/Kconfig"
>> 1054 source "arch/mips/vr41xx/Kconfig"
>> 1055 source "arch/mips/cavium-octeon/Kconfig"
>> 1056 source "arch/mips/loongson2ef/Kconfig"
>> 1057 source "arch/mips/loongson32/Kconfig"
>> 1058 source "arch/mips/loongson64/Kconfig"
>> 1059 source "arch/mips/netlogic/Kconfig"
>> 1060 source "arch/mips/paravirt/Kconfig"
>> 1061
>> 1062 endmenu
>> 1063
>> 1064 config GENERIC_HWEIGHT
>> 1065 bool
>> 1066 default y
>> 1067
>> 1068 config GENERIC_CALIBRATE_DELAY
>> 1069 bool
>> 1070 default y
>> 1071
>> 1072 config SCHED_OMIT_FRAME_POINTER
>> 1073 bool
>> 1074 default y
>> 1075
>> 1076 #
>> 1077 # Select some configuration options automatically based on user selections.
>> 1078 #
>> 1079 config FW_ARC
>> 1080 bool
>> 1081
>> 1082 config ARCH_MAY_HAVE_PC_FDC
>> 1083 bool
>> 1084
>> 1085 config BOOT_RAW
>> 1086 bool
>> 1087
>> 1088 config CEVT_BCM1480
>> 1089 bool
>> 1090
>> 1091 config CEVT_DS1287
>> 1092 bool
>> 1093
>> 1094 config CEVT_GT641XX
>> 1095 bool
>> 1096
>> 1097 config CEVT_R4K
>> 1098 bool
>> 1099
>> 1100 config CEVT_SB1250
>> 1101 bool
>> 1102
>> 1103 config CEVT_TXX9
>> 1104 bool
>> 1105
>> 1106 config CSRC_BCM1480
>> 1107 bool
>> 1108
>> 1109 config CSRC_IOASIC
>> 1110 bool
>> 1111
>> 1112 config CSRC_R4K
>> 1113 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
>> 1114 bool
>> 1115
>> 1116 config CSRC_SB1250
>> 1117 bool
>> 1118
>> 1119 config MIPS_CLOCK_VSYSCALL
>> 1120 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1121
>> 1122 config GPIO_TXX9
>> 1123 select GPIOLIB
>> 1124 bool
>> 1125
>> 1126 config FW_CFE
>> 1127 bool
120 1128
121 config ARCH_SUPPORTS_UPROBES 1129 config ARCH_SUPPORTS_UPROBES
122 def_bool y if !CPU_CK610 !! 1130 bool
123 1131
124 config CPU_HAS_CACHEV2 !! 1132 config DMA_MAYBE_COHERENT
>> 1133 select ARCH_HAS_DMA_COHERENCE_H
>> 1134 select DMA_NONCOHERENT
125 bool 1135 bool
126 1136
127 config CPU_HAS_FPUV2 !! 1137 config DMA_PERDEV_COHERENT
128 bool 1138 bool
>> 1139 select ARCH_HAS_SETUP_DMA_OPS
>> 1140 select DMA_NONCOHERENT
129 1141
130 config CPU_HAS_HILO !! 1142 config DMA_NONCOHERENT
131 bool 1143 bool
>> 1144 #
>> 1145 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1146 # Attribute bits. It is believed that the uncached access through
>> 1147 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1148 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1149 # significant advantages.
>> 1150 #
>> 1151 select ARCH_HAS_DMA_WRITE_COMBINE
>> 1152 select ARCH_HAS_DMA_PREP_COHERENT
>> 1153 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1154 select ARCH_HAS_DMA_SET_UNCACHED
>> 1155 select DMA_NONCOHERENT_MMAP
>> 1156 select DMA_NONCOHERENT_CACHE_SYNC
>> 1157 select NEED_DMA_MAP_STATE
132 1158
133 config CPU_HAS_TLBI !! 1159 config SYS_HAS_EARLY_PRINTK
134 bool 1160 bool
135 1161
136 config CPU_HAS_LDSTEX !! 1162 config SYS_SUPPORTS_HOTPLUG_CPU
137 bool 1163 bool
138 help <<
139 For SMP, CPU needs "ldex&stex" instr <<
140 1164
141 config CPU_NEED_TLBSYNC !! 1165 config MIPS_BONITO64
142 bool 1166 bool
143 1167
144 config CPU_NEED_SOFTALIGN !! 1168 config MIPS_MSC
145 bool 1169 bool
146 1170
147 config CPU_NO_USER_BKPT !! 1171 config SYNC_R4K
148 bool 1172 bool
149 help <<
150 For abiv2 we couldn't use "trap 1" a <<
151 abiv2 is 16/32bit instruction set an <<
152 So we need a 16bit instruction as us <<
153 instruction exception. <<
154 In kernel we parse the *regs->pc to <<
155 1173
156 config GENERIC_CALIBRATE_DELAY !! 1174 config MIPS_MACHINE
157 def_bool y !! 1175 def_bool n
>> 1176
>> 1177 config NO_IOPORT_MAP
>> 1178 def_bool n
158 1179
159 config GENERIC_CSUM 1180 config GENERIC_CSUM
160 def_bool y !! 1181 def_bool CPU_NO_LOAD_STORE_LR
161 1182
162 config GENERIC_HWEIGHT !! 1183 config GENERIC_ISA_DMA
163 def_bool y !! 1184 bool
>> 1185 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1186 select ISA_DMA_API
164 1187
165 config MMU !! 1188 config GENERIC_ISA_DMA_SUPPORT_BROKEN
166 def_bool y !! 1189 bool
>> 1190 select GENERIC_ISA_DMA
167 1191
168 config STACKTRACE_SUPPORT !! 1192 config HAVE_PLAT_DELAY
>> 1193 bool
>> 1194
>> 1195 config HAVE_PLAT_FW_INIT_CMDLINE
>> 1196 bool
>> 1197
>> 1198 config HAVE_PLAT_MEMCPY
>> 1199 bool
>> 1200
>> 1201 config ISA_DMA_API
>> 1202 bool
>> 1203
>> 1204 config HOLES_IN_ZONE
>> 1205 bool
>> 1206
>> 1207 config SYS_SUPPORTS_RELOCATABLE
>> 1208 bool
>> 1209 help
>> 1210 Selected if the platform supports relocating the kernel.
>> 1211 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1212 to allow access to command line and entropy sources.
>> 1213
>> 1214 config MIPS_CBPF_JIT
169 def_bool y 1215 def_bool y
>> 1216 depends on BPF_JIT && HAVE_CBPF_JIT
170 1217
171 config TIME_LOW_RES !! 1218 config MIPS_EBPF_JIT
172 def_bool y 1219 def_bool y
>> 1220 depends on BPF_JIT && HAVE_EBPF_JIT
173 1221
174 config CPU_ASID_BITS <<
175 int <<
176 default "8" if (CPU_CK610 || CPU_C <<
177 default "12" if (CPU_CK860) <<
178 1222
179 config L1_CACHE_SHIFT !! 1223 #
>> 1224 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1225 # answer,so we try hard to limit the available choices. Also the use of a
>> 1226 # choice statement should be more obvious to the user.
>> 1227 #
>> 1228 choice
>> 1229 prompt "Endianness selection"
>> 1230 help
>> 1231 Some MIPS machines can be configured for either little or big endian
>> 1232 byte order. These modes require different kernels and a different
>> 1233 Linux distribution. In general there is one preferred byteorder for a
>> 1234 particular system but some systems are just as commonly used in the
>> 1235 one or the other endianness.
>> 1236
>> 1237 config CPU_BIG_ENDIAN
>> 1238 bool "Big endian"
>> 1239 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1240
>> 1241 config CPU_LITTLE_ENDIAN
>> 1242 bool "Little endian"
>> 1243 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1244
>> 1245 endchoice
>> 1246
>> 1247 config EXPORT_UASM
>> 1248 bool
>> 1249
>> 1250 config SYS_SUPPORTS_APM_EMULATION
>> 1251 bool
>> 1252
>> 1253 config SYS_SUPPORTS_BIG_ENDIAN
>> 1254 bool
>> 1255
>> 1256 config SYS_SUPPORTS_LITTLE_ENDIAN
>> 1257 bool
>> 1258
>> 1259 config SYS_SUPPORTS_HUGETLBFS
>> 1260 bool
>> 1261 depends on CPU_SUPPORTS_HUGEPAGES
>> 1262 default y
>> 1263
>> 1264 config MIPS_HUGE_TLB_SUPPORT
>> 1265 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1266
>> 1267 config IRQ_CPU_RM7K
>> 1268 bool
>> 1269
>> 1270 config IRQ_MSP_SLP
>> 1271 bool
>> 1272
>> 1273 config IRQ_MSP_CIC
>> 1274 bool
>> 1275
>> 1276 config IRQ_TXX9
>> 1277 bool
>> 1278
>> 1279 config IRQ_GT641XX
>> 1280 bool
>> 1281
>> 1282 config PCI_GT64XXX_PCI0
>> 1283 bool
>> 1284
>> 1285 config PCI_XTALK_BRIDGE
>> 1286 bool
>> 1287
>> 1288 config NO_EXCEPT_FILL
>> 1289 bool
>> 1290
>> 1291 config SOC_PNX833X
>> 1292 bool
>> 1293 select CEVT_R4K
>> 1294 select CSRC_R4K
>> 1295 select IRQ_MIPS_CPU
>> 1296 select DMA_NONCOHERENT
>> 1297 select SYS_HAS_CPU_MIPS32_R2
>> 1298 select SYS_SUPPORTS_32BIT_KERNEL
>> 1299 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1300 select SYS_SUPPORTS_BIG_ENDIAN
>> 1301 select SYS_SUPPORTS_MIPS16
>> 1302 select CPU_MIPSR2_IRQ_VI
>> 1303
>> 1304 config SOC_PNX8335
>> 1305 bool
>> 1306 select SOC_PNX833X
>> 1307
>> 1308 config MIPS_SPRAM
>> 1309 bool
>> 1310
>> 1311 config SWAP_IO_SPACE
>> 1312 bool
>> 1313
>> 1314 config SGI_HAS_INDYDOG
>> 1315 bool
>> 1316
>> 1317 config SGI_HAS_HAL2
>> 1318 bool
>> 1319
>> 1320 config SGI_HAS_SEEQ
>> 1321 bool
>> 1322
>> 1323 config SGI_HAS_WD93
>> 1324 bool
>> 1325
>> 1326 config SGI_HAS_ZILOG
>> 1327 bool
>> 1328
>> 1329 config SGI_HAS_I8042
>> 1330 bool
>> 1331
>> 1332 config DEFAULT_SGI_PARTITION
>> 1333 bool
>> 1334
>> 1335 config FW_ARC32
>> 1336 bool
>> 1337
>> 1338 config FW_SNIPROM
>> 1339 bool
>> 1340
>> 1341 config BOOT_ELF32
>> 1342 bool
>> 1343
>> 1344 config MIPS_L1_CACHE_SHIFT_4
>> 1345 bool
>> 1346
>> 1347 config MIPS_L1_CACHE_SHIFT_5
>> 1348 bool
>> 1349
>> 1350 config MIPS_L1_CACHE_SHIFT_6
>> 1351 bool
>> 1352
>> 1353 config MIPS_L1_CACHE_SHIFT_7
>> 1354 bool
>> 1355
>> 1356 config MIPS_L1_CACHE_SHIFT
180 int 1357 int
181 default "4" if (CPU_CK610) !! 1358 default "7" if MIPS_L1_CACHE_SHIFT_7
182 default "5" if (CPU_CK807 || CPU_C !! 1359 default "6" if MIPS_L1_CACHE_SHIFT_6
183 default "6" if (CPU_CK860) !! 1360 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1361 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1362 default "5"
184 1363
185 config ARCH_MMAP_RND_BITS_MIN !! 1364 config ARC_CMDLINE_ONLY
186 default 8 !! 1365 bool
187 1366
188 # max bits determined by the following formula !! 1367 config ARC_CONSOLE
189 # VA_BITS - PAGE_SHIFT - 3 !! 1368 bool "ARC console support"
190 config ARCH_MMAP_RND_BITS_MAX !! 1369 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
191 default 17 <<
192 1370
193 menu "Processor type and features" !! 1371 config ARC_MEMORY
>> 1372 bool
>> 1373
>> 1374 config ARC_PROMLIB
>> 1375 bool
>> 1376
>> 1377 config FW_ARC64
>> 1378 bool
>> 1379
>> 1380 config BOOT_ELF64
>> 1381 bool
>> 1382
>> 1383 menu "CPU selection"
194 1384
195 choice 1385 choice
196 prompt "CPU MODEL" !! 1386 prompt "CPU type"
197 default CPU_CK807 !! 1387 default CPU_R4X00
>> 1388
>> 1389 config CPU_LOONGSON64
>> 1390 bool "Loongson 64-bit CPU"
>> 1391 depends on SYS_HAS_CPU_LOONGSON64
>> 1392 select ARCH_HAS_PHYS_TO_DMA
>> 1393 select CPU_MIPSR2
>> 1394 select CPU_HAS_PREFETCH
>> 1395 select CPU_SUPPORTS_64BIT_KERNEL
>> 1396 select CPU_SUPPORTS_HIGHMEM
>> 1397 select CPU_SUPPORTS_HUGEPAGES
>> 1398 select CPU_SUPPORTS_MSA
>> 1399 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1400 select CPU_MIPSR2_IRQ_VI
>> 1401 select WEAK_ORDERING
>> 1402 select WEAK_REORDERING_BEYOND_LLSC
>> 1403 select MIPS_ASID_BITS_VARIABLE
>> 1404 select MIPS_PGD_C0_CONTEXT
>> 1405 select MIPS_L1_CACHE_SHIFT_6
>> 1406 select GPIOLIB
>> 1407 select SWIOTLB
>> 1408 select HAVE_KVM
>> 1409 help
>> 1410 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1411 cores implements the MIPS64R2 instruction set with many extensions,
>> 1412 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1413 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1414 Loongson-2E/2F is not covered here and will be removed in future.
>> 1415
>> 1416 config LOONGSON3_ENHANCEMENT
>> 1417 bool "New Loongson-3 CPU Enhancements"
>> 1418 default n
>> 1419 depends on CPU_LOONGSON64
>> 1420 help
>> 1421 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1422 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1423 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1424 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1425 Fast TLB refill support, etc.
>> 1426
>> 1427 This option enable those enhancements which are not probed at run
>> 1428 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1429 please say 'N' here. If you want a high-performance kernel to run on
>> 1430 new Loongson-3 machines only, please say 'Y' here.
>> 1431
>> 1432 config CPU_LOONGSON3_WORKAROUNDS
>> 1433 bool "Old Loongson-3 LLSC Workarounds"
>> 1434 default y if SMP
>> 1435 depends on CPU_LOONGSON64
>> 1436 help
>> 1437 Loongson-3 processors have the llsc issues which require workarounds.
>> 1438 Without workarounds the system may hang unexpectedly.
198 1439
199 config CPU_CK610 !! 1440 Newer Loongson-3 will fix these issues and no workarounds are needed.
200 bool "CSKY CPU ck610" !! 1441 The workarounds have no significant side effect on them but may
201 select CPU_NEED_TLBSYNC !! 1442 decrease the performance of the system so this option should be
202 select CPU_NEED_SOFTALIGN !! 1443 disabled unless the kernel is intended to be run on old systems.
203 select CPU_NO_USER_BKPT !! 1444
204 !! 1445 If unsure, please say Y.
205 config CPU_CK810 !! 1446
206 bool "CSKY CPU ck810" !! 1447 config CPU_LOONGSON3_CPUCFG_EMULATION
207 select CPU_HAS_HILO !! 1448 bool "Emulate the CPUCFG instruction on older Loongson cores"
208 select CPU_NEED_TLBSYNC !! 1449 default y
209 !! 1450 depends on CPU_LOONGSON64
210 config CPU_CK807 !! 1451 help
211 bool "CSKY CPU ck807" !! 1452 Loongson-3A R4 and newer have the CPUCFG instruction available for
212 select CPU_HAS_HILO !! 1453 userland to query CPU capabilities, much like CPUID on x86. This
213 !! 1454 option provides emulation of the instruction on older Loongson
214 config CPU_CK860 !! 1455 cores, back to Loongson-3A1000.
215 bool "CSKY CPU ck860" !! 1456
216 select CPU_HAS_TLBI !! 1457 If unsure, please say Y.
217 select CPU_HAS_CACHEV2 !! 1458
218 select CPU_HAS_LDSTEX !! 1459 config CPU_LOONGSON2E
219 select CPU_HAS_FPUV2 !! 1460 bool "Loongson 2E"
>> 1461 depends on SYS_HAS_CPU_LOONGSON2E
>> 1462 select CPU_LOONGSON2EF
>> 1463 help
>> 1464 The Loongson 2E processor implements the MIPS III instruction set
>> 1465 with many extensions.
>> 1466
>> 1467 It has an internal FPGA northbridge, which is compatible to
>> 1468 bonito64.
>> 1469
>> 1470 config CPU_LOONGSON2F
>> 1471 bool "Loongson 2F"
>> 1472 depends on SYS_HAS_CPU_LOONGSON2F
>> 1473 select CPU_LOONGSON2EF
>> 1474 select GPIOLIB
>> 1475 help
>> 1476 The Loongson 2F processor implements the MIPS III instruction set
>> 1477 with many extensions.
>> 1478
>> 1479 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1480 have a similar programming interface with FPGA northbridge used in
>> 1481 Loongson2E.
>> 1482
>> 1483 config CPU_LOONGSON1B
>> 1484 bool "Loongson 1B"
>> 1485 depends on SYS_HAS_CPU_LOONGSON1B
>> 1486 select CPU_LOONGSON32
>> 1487 select LEDS_GPIO_REGISTER
>> 1488 help
>> 1489 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1490 Release 1 instruction set and part of the MIPS32 Release 2
>> 1491 instruction set.
>> 1492
>> 1493 config CPU_LOONGSON1C
>> 1494 bool "Loongson 1C"
>> 1495 depends on SYS_HAS_CPU_LOONGSON1C
>> 1496 select CPU_LOONGSON32
>> 1497 select LEDS_GPIO_REGISTER
>> 1498 help
>> 1499 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1500 Release 1 instruction set and part of the MIPS32 Release 2
>> 1501 instruction set.
>> 1502
>> 1503 config CPU_MIPS32_R1
>> 1504 bool "MIPS32 Release 1"
>> 1505 depends on SYS_HAS_CPU_MIPS32_R1
>> 1506 select CPU_HAS_PREFETCH
>> 1507 select CPU_SUPPORTS_32BIT_KERNEL
>> 1508 select CPU_SUPPORTS_HIGHMEM
>> 1509 help
>> 1510 Choose this option to build a kernel for release 1 or later of the
>> 1511 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1512 MIPS processor are based on a MIPS32 processor. If you know the
>> 1513 specific type of processor in your system, choose those that one
>> 1514 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1515 Release 2 of the MIPS32 architecture is available since several
>> 1516 years so chances are you even have a MIPS32 Release 2 processor
>> 1517 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1518 performance.
>> 1519
>> 1520 config CPU_MIPS32_R2
>> 1521 bool "MIPS32 Release 2"
>> 1522 depends on SYS_HAS_CPU_MIPS32_R2
>> 1523 select CPU_HAS_PREFETCH
>> 1524 select CPU_SUPPORTS_32BIT_KERNEL
>> 1525 select CPU_SUPPORTS_HIGHMEM
>> 1526 select CPU_SUPPORTS_MSA
>> 1527 select HAVE_KVM
>> 1528 help
>> 1529 Choose this option to build a kernel for release 2 or later of the
>> 1530 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1531 MIPS processor are based on a MIPS32 processor. If you know the
>> 1532 specific type of processor in your system, choose those that one
>> 1533 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1534
>> 1535 config CPU_MIPS32_R5
>> 1536 bool "MIPS32 Release 5"
>> 1537 depends on SYS_HAS_CPU_MIPS32_R5
>> 1538 select CPU_HAS_PREFETCH
>> 1539 select CPU_SUPPORTS_32BIT_KERNEL
>> 1540 select CPU_SUPPORTS_HIGHMEM
>> 1541 select CPU_SUPPORTS_MSA
>> 1542 select HAVE_KVM
>> 1543 select MIPS_O32_FP64_SUPPORT
>> 1544 help
>> 1545 Choose this option to build a kernel for release 5 or later of the
>> 1546 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1547 family, are based on a MIPS32r5 processor. If you own an older
>> 1548 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1549
>> 1550 config CPU_MIPS32_R6
>> 1551 bool "MIPS32 Release 6"
>> 1552 depends on SYS_HAS_CPU_MIPS32_R6
>> 1553 select CPU_HAS_PREFETCH
>> 1554 select CPU_NO_LOAD_STORE_LR
>> 1555 select CPU_SUPPORTS_32BIT_KERNEL
>> 1556 select CPU_SUPPORTS_HIGHMEM
>> 1557 select CPU_SUPPORTS_MSA
>> 1558 select HAVE_KVM
>> 1559 select MIPS_O32_FP64_SUPPORT
>> 1560 help
>> 1561 Choose this option to build a kernel for release 6 or later of the
>> 1562 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1563 family, are based on a MIPS32r6 processor. If you own an older
>> 1564 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1565
>> 1566 config CPU_MIPS64_R1
>> 1567 bool "MIPS64 Release 1"
>> 1568 depends on SYS_HAS_CPU_MIPS64_R1
>> 1569 select CPU_HAS_PREFETCH
>> 1570 select CPU_SUPPORTS_32BIT_KERNEL
>> 1571 select CPU_SUPPORTS_64BIT_KERNEL
>> 1572 select CPU_SUPPORTS_HIGHMEM
>> 1573 select CPU_SUPPORTS_HUGEPAGES
>> 1574 help
>> 1575 Choose this option to build a kernel for release 1 or later of the
>> 1576 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1577 MIPS processor are based on a MIPS64 processor. If you know the
>> 1578 specific type of processor in your system, choose those that one
>> 1579 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1580 Release 2 of the MIPS64 architecture is available since several
>> 1581 years so chances are you even have a MIPS64 Release 2 processor
>> 1582 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1583 performance.
>> 1584
>> 1585 config CPU_MIPS64_R2
>> 1586 bool "MIPS64 Release 2"
>> 1587 depends on SYS_HAS_CPU_MIPS64_R2
>> 1588 select CPU_HAS_PREFETCH
>> 1589 select CPU_SUPPORTS_32BIT_KERNEL
>> 1590 select CPU_SUPPORTS_64BIT_KERNEL
>> 1591 select CPU_SUPPORTS_HIGHMEM
>> 1592 select CPU_SUPPORTS_HUGEPAGES
>> 1593 select CPU_SUPPORTS_MSA
>> 1594 select HAVE_KVM
>> 1595 help
>> 1596 Choose this option to build a kernel for release 2 or later of the
>> 1597 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1598 MIPS processor are based on a MIPS64 processor. If you know the
>> 1599 specific type of processor in your system, choose those that one
>> 1600 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1601
>> 1602 config CPU_MIPS64_R5
>> 1603 bool "MIPS64 Release 5"
>> 1604 depends on SYS_HAS_CPU_MIPS64_R5
>> 1605 select CPU_HAS_PREFETCH
>> 1606 select CPU_SUPPORTS_32BIT_KERNEL
>> 1607 select CPU_SUPPORTS_64BIT_KERNEL
>> 1608 select CPU_SUPPORTS_HIGHMEM
>> 1609 select CPU_SUPPORTS_HUGEPAGES
>> 1610 select CPU_SUPPORTS_MSA
>> 1611 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1612 select HAVE_KVM
>> 1613 help
>> 1614 Choose this option to build a kernel for release 5 or later of the
>> 1615 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1616 release partly implementing release 6 features. Though there is no
>> 1617 any hardware known to be based on this release.
>> 1618
>> 1619 config CPU_MIPS64_R6
>> 1620 bool "MIPS64 Release 6"
>> 1621 depends on SYS_HAS_CPU_MIPS64_R6
>> 1622 select CPU_HAS_PREFETCH
>> 1623 select CPU_NO_LOAD_STORE_LR
>> 1624 select CPU_SUPPORTS_32BIT_KERNEL
>> 1625 select CPU_SUPPORTS_64BIT_KERNEL
>> 1626 select CPU_SUPPORTS_HIGHMEM
>> 1627 select CPU_SUPPORTS_HUGEPAGES
>> 1628 select CPU_SUPPORTS_MSA
>> 1629 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1630 select HAVE_KVM
>> 1631 help
>> 1632 Choose this option to build a kernel for release 6 or later of the
>> 1633 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1634 family, are based on a MIPS64r6 processor. If you own an older
>> 1635 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1636
>> 1637 config CPU_P5600
>> 1638 bool "MIPS Warrior P5600"
>> 1639 depends on SYS_HAS_CPU_P5600
>> 1640 select CPU_HAS_PREFETCH
>> 1641 select CPU_SUPPORTS_32BIT_KERNEL
>> 1642 select CPU_SUPPORTS_HIGHMEM
>> 1643 select CPU_SUPPORTS_MSA
>> 1644 select CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 1645 select CPU_SUPPORTS_CPUFREQ
>> 1646 select CPU_MIPSR2_IRQ_VI
>> 1647 select CPU_MIPSR2_IRQ_EI
>> 1648 select HAVE_KVM
>> 1649 select MIPS_O32_FP64_SUPPORT
>> 1650 help
>> 1651 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1652 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1653 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1654 level features like up to six P5600 calculation cores, CM2 with L2
>> 1655 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1656 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1657 eJTAG and PDtrace.
>> 1658
>> 1659 config CPU_R3000
>> 1660 bool "R3000"
>> 1661 depends on SYS_HAS_CPU_R3000
>> 1662 select CPU_HAS_WB
>> 1663 select CPU_R3K_TLB
>> 1664 select CPU_SUPPORTS_32BIT_KERNEL
>> 1665 select CPU_SUPPORTS_HIGHMEM
>> 1666 help
>> 1667 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1668 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1669 *not* work on R4000 machines and vice versa. However, since most
>> 1670 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1671 might be a safe bet. If the resulting kernel does not work,
>> 1672 try to recompile with R3000.
>> 1673
>> 1674 config CPU_TX39XX
>> 1675 bool "R39XX"
>> 1676 depends on SYS_HAS_CPU_TX39XX
>> 1677 select CPU_SUPPORTS_32BIT_KERNEL
>> 1678 select CPU_R3K_TLB
>> 1679
>> 1680 config CPU_VR41XX
>> 1681 bool "R41xx"
>> 1682 depends on SYS_HAS_CPU_VR41XX
>> 1683 select CPU_SUPPORTS_32BIT_KERNEL
>> 1684 select CPU_SUPPORTS_64BIT_KERNEL
>> 1685 help
>> 1686 The options selects support for the NEC VR4100 series of processors.
>> 1687 Only choose this option if you have one of these processors as a
>> 1688 kernel built with this option will not run on any other type of
>> 1689 processor or vice versa.
>> 1690
>> 1691 config CPU_R4X00
>> 1692 bool "R4x00"
>> 1693 depends on SYS_HAS_CPU_R4X00
>> 1694 select CPU_SUPPORTS_32BIT_KERNEL
>> 1695 select CPU_SUPPORTS_64BIT_KERNEL
>> 1696 select CPU_SUPPORTS_HUGEPAGES
>> 1697 help
>> 1698 MIPS Technologies R4000-series processors other than 4300, including
>> 1699 the R4000, R4400, R4600, and 4700.
>> 1700
>> 1701 config CPU_TX49XX
>> 1702 bool "R49XX"
>> 1703 depends on SYS_HAS_CPU_TX49XX
>> 1704 select CPU_HAS_PREFETCH
>> 1705 select CPU_SUPPORTS_32BIT_KERNEL
>> 1706 select CPU_SUPPORTS_64BIT_KERNEL
>> 1707 select CPU_SUPPORTS_HUGEPAGES
>> 1708
>> 1709 config CPU_R5000
>> 1710 bool "R5000"
>> 1711 depends on SYS_HAS_CPU_R5000
>> 1712 select CPU_SUPPORTS_32BIT_KERNEL
>> 1713 select CPU_SUPPORTS_64BIT_KERNEL
>> 1714 select CPU_SUPPORTS_HUGEPAGES
>> 1715 help
>> 1716 MIPS Technologies R5000-series processors other than the Nevada.
>> 1717
>> 1718 config CPU_R5500
>> 1719 bool "R5500"
>> 1720 depends on SYS_HAS_CPU_R5500
>> 1721 select CPU_SUPPORTS_32BIT_KERNEL
>> 1722 select CPU_SUPPORTS_64BIT_KERNEL
>> 1723 select CPU_SUPPORTS_HUGEPAGES
>> 1724 help
>> 1725 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1726 instruction set.
>> 1727
>> 1728 config CPU_NEVADA
>> 1729 bool "RM52xx"
>> 1730 depends on SYS_HAS_CPU_NEVADA
>> 1731 select CPU_SUPPORTS_32BIT_KERNEL
>> 1732 select CPU_SUPPORTS_64BIT_KERNEL
>> 1733 select CPU_SUPPORTS_HUGEPAGES
>> 1734 help
>> 1735 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1736
>> 1737 config CPU_R10000
>> 1738 bool "R10000"
>> 1739 depends on SYS_HAS_CPU_R10000
>> 1740 select CPU_HAS_PREFETCH
>> 1741 select CPU_SUPPORTS_32BIT_KERNEL
>> 1742 select CPU_SUPPORTS_64BIT_KERNEL
>> 1743 select CPU_SUPPORTS_HIGHMEM
>> 1744 select CPU_SUPPORTS_HUGEPAGES
>> 1745 help
>> 1746 MIPS Technologies R10000-series processors.
>> 1747
>> 1748 config CPU_RM7000
>> 1749 bool "RM7000"
>> 1750 depends on SYS_HAS_CPU_RM7000
>> 1751 select CPU_HAS_PREFETCH
>> 1752 select CPU_SUPPORTS_32BIT_KERNEL
>> 1753 select CPU_SUPPORTS_64BIT_KERNEL
>> 1754 select CPU_SUPPORTS_HIGHMEM
>> 1755 select CPU_SUPPORTS_HUGEPAGES
>> 1756
>> 1757 config CPU_SB1
>> 1758 bool "SB1"
>> 1759 depends on SYS_HAS_CPU_SB1
>> 1760 select CPU_SUPPORTS_32BIT_KERNEL
>> 1761 select CPU_SUPPORTS_64BIT_KERNEL
>> 1762 select CPU_SUPPORTS_HIGHMEM
>> 1763 select CPU_SUPPORTS_HUGEPAGES
>> 1764 select WEAK_ORDERING
>> 1765
>> 1766 config CPU_CAVIUM_OCTEON
>> 1767 bool "Cavium Octeon processor"
>> 1768 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1769 select CPU_HAS_PREFETCH
>> 1770 select CPU_SUPPORTS_64BIT_KERNEL
>> 1771 select WEAK_ORDERING
>> 1772 select CPU_SUPPORTS_HIGHMEM
>> 1773 select CPU_SUPPORTS_HUGEPAGES
>> 1774 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1775 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1776 select MIPS_L1_CACHE_SHIFT_7
>> 1777 select HAVE_KVM
>> 1778 help
>> 1779 The Cavium Octeon processor is a highly integrated chip containing
>> 1780 many ethernet hardware widgets for networking tasks. The processor
>> 1781 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1782 Full details can be found at http://www.caviumnetworks.com.
>> 1783
>> 1784 config CPU_BMIPS
>> 1785 bool "Broadcom BMIPS"
>> 1786 depends on SYS_HAS_CPU_BMIPS
>> 1787 select CPU_MIPS32
>> 1788 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1789 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1790 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1791 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1792 select CPU_SUPPORTS_32BIT_KERNEL
>> 1793 select DMA_NONCOHERENT
>> 1794 select IRQ_MIPS_CPU
>> 1795 select SWAP_IO_SPACE
>> 1796 select WEAK_ORDERING
>> 1797 select CPU_SUPPORTS_HIGHMEM
>> 1798 select CPU_HAS_PREFETCH
>> 1799 select CPU_SUPPORTS_CPUFREQ
>> 1800 select MIPS_EXTERNAL_TIMER
>> 1801 help
>> 1802 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1803
>> 1804 config CPU_XLR
>> 1805 bool "Netlogic XLR SoC"
>> 1806 depends on SYS_HAS_CPU_XLR
>> 1807 select CPU_SUPPORTS_32BIT_KERNEL
>> 1808 select CPU_SUPPORTS_64BIT_KERNEL
>> 1809 select CPU_SUPPORTS_HIGHMEM
>> 1810 select CPU_SUPPORTS_HUGEPAGES
>> 1811 select WEAK_ORDERING
>> 1812 select WEAK_REORDERING_BEYOND_LLSC
>> 1813 help
>> 1814 Netlogic Microsystems XLR/XLS processors.
>> 1815
>> 1816 config CPU_XLP
>> 1817 bool "Netlogic XLP SoC"
>> 1818 depends on SYS_HAS_CPU_XLP
>> 1819 select CPU_SUPPORTS_32BIT_KERNEL
>> 1820 select CPU_SUPPORTS_64BIT_KERNEL
>> 1821 select CPU_SUPPORTS_HIGHMEM
>> 1822 select WEAK_ORDERING
>> 1823 select WEAK_REORDERING_BEYOND_LLSC
>> 1824 select CPU_HAS_PREFETCH
>> 1825 select CPU_MIPSR2
>> 1826 select CPU_SUPPORTS_HUGEPAGES
>> 1827 select MIPS_ASID_BITS_VARIABLE
>> 1828 help
>> 1829 Netlogic Microsystems XLP processors.
220 endchoice 1830 endchoice
221 1831
>> 1832 config CPU_MIPS32_3_5_FEATURES
>> 1833 bool "MIPS32 Release 3.5 Features"
>> 1834 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1835 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
>> 1836 CPU_P5600
>> 1837 help
>> 1838 Choose this option to build a kernel for release 2 or later of the
>> 1839 MIPS32 architecture including features from the 3.5 release such as
>> 1840 support for Enhanced Virtual Addressing (EVA).
>> 1841
>> 1842 config CPU_MIPS32_3_5_EVA
>> 1843 bool "Enhanced Virtual Addressing (EVA)"
>> 1844 depends on CPU_MIPS32_3_5_FEATURES
>> 1845 select EVA
>> 1846 default y
>> 1847 help
>> 1848 Choose this option if you want to enable the Enhanced Virtual
>> 1849 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1850 One of its primary benefits is an increase in the maximum size
>> 1851 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1852
>> 1853 config CPU_MIPS32_R5_FEATURES
>> 1854 bool "MIPS32 Release 5 Features"
>> 1855 depends on SYS_HAS_CPU_MIPS32_R5
>> 1856 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1857 help
>> 1858 Choose this option to build a kernel for release 2 or later of the
>> 1859 MIPS32 architecture including features from release 5 such as
>> 1860 support for Extended Physical Addressing (XPA).
>> 1861
>> 1862 config CPU_MIPS32_R5_XPA
>> 1863 bool "Extended Physical Addressing (XPA)"
>> 1864 depends on CPU_MIPS32_R5_FEATURES
>> 1865 depends on !EVA
>> 1866 depends on !PAGE_SIZE_4KB
>> 1867 depends on SYS_SUPPORTS_HIGHMEM
>> 1868 select XPA
>> 1869 select HIGHMEM
>> 1870 select PHYS_ADDR_T_64BIT
>> 1871 default n
>> 1872 help
>> 1873 Choose this option if you want to enable the Extended Physical
>> 1874 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1875 benefit is to increase physical addressing equal to or greater
>> 1876 than 40 bits. Note that this has the side effect of turning on
>> 1877 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1878 If unsure, say 'N' here.
>> 1879
>> 1880 if CPU_LOONGSON2F
>> 1881 config CPU_NOP_WORKAROUNDS
>> 1882 bool
>> 1883
>> 1884 config CPU_JUMP_WORKAROUNDS
>> 1885 bool
>> 1886
>> 1887 config CPU_LOONGSON2F_WORKAROUNDS
>> 1888 bool "Loongson 2F Workarounds"
>> 1889 default y
>> 1890 select CPU_NOP_WORKAROUNDS
>> 1891 select CPU_JUMP_WORKAROUNDS
>> 1892 help
>> 1893 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
>> 1894 require workarounds. Without workarounds the system may hang
>> 1895 unexpectedly. For more information please refer to the gas
>> 1896 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1897
>> 1898 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1899 are needed. The workarounds have no significant side effect on them
>> 1900 but may decrease the performance of the system so this option should
>> 1901 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1902 systems.
>> 1903
>> 1904 If unsure, please say Y.
>> 1905 endif # CPU_LOONGSON2F
>> 1906
>> 1907 config SYS_SUPPORTS_ZBOOT
>> 1908 bool
>> 1909 select HAVE_KERNEL_GZIP
>> 1910 select HAVE_KERNEL_BZIP2
>> 1911 select HAVE_KERNEL_LZ4
>> 1912 select HAVE_KERNEL_LZMA
>> 1913 select HAVE_KERNEL_LZO
>> 1914 select HAVE_KERNEL_XZ
>> 1915
>> 1916 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1917 bool
>> 1918 select SYS_SUPPORTS_ZBOOT
>> 1919
>> 1920 config SYS_SUPPORTS_ZBOOT_UART_PROM
>> 1921 bool
>> 1922 select SYS_SUPPORTS_ZBOOT
>> 1923
>> 1924 config CPU_LOONGSON2EF
>> 1925 bool
>> 1926 select CPU_SUPPORTS_32BIT_KERNEL
>> 1927 select CPU_SUPPORTS_64BIT_KERNEL
>> 1928 select CPU_SUPPORTS_HIGHMEM
>> 1929 select CPU_SUPPORTS_HUGEPAGES
>> 1930 select ARCH_HAS_PHYS_TO_DMA
>> 1931
>> 1932 config CPU_LOONGSON32
>> 1933 bool
>> 1934 select CPU_MIPS32
>> 1935 select CPU_MIPSR2
>> 1936 select CPU_HAS_PREFETCH
>> 1937 select CPU_SUPPORTS_32BIT_KERNEL
>> 1938 select CPU_SUPPORTS_HIGHMEM
>> 1939 select CPU_SUPPORTS_CPUFREQ
>> 1940
>> 1941 config CPU_BMIPS32_3300
>> 1942 select SMP_UP if SMP
>> 1943 bool
>> 1944
>> 1945 config CPU_BMIPS4350
>> 1946 bool
>> 1947 select SYS_SUPPORTS_SMP
>> 1948 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1949
>> 1950 config CPU_BMIPS4380
>> 1951 bool
>> 1952 select MIPS_L1_CACHE_SHIFT_6
>> 1953 select SYS_SUPPORTS_SMP
>> 1954 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1955 select CPU_HAS_RIXI
>> 1956
>> 1957 config CPU_BMIPS5000
>> 1958 bool
>> 1959 select MIPS_CPU_SCACHE
>> 1960 select MIPS_L1_CACHE_SHIFT_7
>> 1961 select SYS_SUPPORTS_SMP
>> 1962 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1963 select CPU_HAS_RIXI
>> 1964
>> 1965 config SYS_HAS_CPU_LOONGSON64
>> 1966 bool
>> 1967 select CPU_SUPPORTS_CPUFREQ
>> 1968 select CPU_HAS_RIXI
>> 1969
>> 1970 config SYS_HAS_CPU_LOONGSON2E
>> 1971 bool
>> 1972
>> 1973 config SYS_HAS_CPU_LOONGSON2F
>> 1974 bool
>> 1975 select CPU_SUPPORTS_CPUFREQ
>> 1976 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1977
>> 1978 config SYS_HAS_CPU_LOONGSON1B
>> 1979 bool
>> 1980
>> 1981 config SYS_HAS_CPU_LOONGSON1C
>> 1982 bool
>> 1983
>> 1984 config SYS_HAS_CPU_MIPS32_R1
>> 1985 bool
>> 1986
>> 1987 config SYS_HAS_CPU_MIPS32_R2
>> 1988 bool
>> 1989
>> 1990 config SYS_HAS_CPU_MIPS32_R3_5
>> 1991 bool
>> 1992
>> 1993 config SYS_HAS_CPU_MIPS32_R5
>> 1994 bool
>> 1995 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1996
>> 1997 config SYS_HAS_CPU_MIPS32_R6
>> 1998 bool
>> 1999 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2000
>> 2001 config SYS_HAS_CPU_MIPS64_R1
>> 2002 bool
>> 2003
>> 2004 config SYS_HAS_CPU_MIPS64_R2
>> 2005 bool
>> 2006
>> 2007 config SYS_HAS_CPU_MIPS64_R6
>> 2008 bool
>> 2009 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2010
>> 2011 config SYS_HAS_CPU_P5600
>> 2012 bool
>> 2013 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2014
>> 2015 config SYS_HAS_CPU_R3000
>> 2016 bool
>> 2017
>> 2018 config SYS_HAS_CPU_TX39XX
>> 2019 bool
>> 2020
>> 2021 config SYS_HAS_CPU_VR41XX
>> 2022 bool
>> 2023
>> 2024 config SYS_HAS_CPU_R4X00
>> 2025 bool
>> 2026
>> 2027 config SYS_HAS_CPU_TX49XX
>> 2028 bool
>> 2029
>> 2030 config SYS_HAS_CPU_R5000
>> 2031 bool
>> 2032
>> 2033 config SYS_HAS_CPU_R5500
>> 2034 bool
>> 2035
>> 2036 config SYS_HAS_CPU_NEVADA
>> 2037 bool
>> 2038
>> 2039 config SYS_HAS_CPU_R10000
>> 2040 bool
>> 2041 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2042
>> 2043 config SYS_HAS_CPU_RM7000
>> 2044 bool
>> 2045
>> 2046 config SYS_HAS_CPU_SB1
>> 2047 bool
>> 2048
>> 2049 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 2050 bool
>> 2051
>> 2052 config SYS_HAS_CPU_BMIPS
>> 2053 bool
>> 2054
>> 2055 config SYS_HAS_CPU_BMIPS32_3300
>> 2056 bool
>> 2057 select SYS_HAS_CPU_BMIPS
>> 2058
>> 2059 config SYS_HAS_CPU_BMIPS4350
>> 2060 bool
>> 2061 select SYS_HAS_CPU_BMIPS
>> 2062
>> 2063 config SYS_HAS_CPU_BMIPS4380
>> 2064 bool
>> 2065 select SYS_HAS_CPU_BMIPS
>> 2066
>> 2067 config SYS_HAS_CPU_BMIPS5000
>> 2068 bool
>> 2069 select SYS_HAS_CPU_BMIPS
>> 2070 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 2071
>> 2072 config SYS_HAS_CPU_XLR
>> 2073 bool
>> 2074
>> 2075 config SYS_HAS_CPU_XLP
>> 2076 bool
>> 2077
>> 2078 #
>> 2079 # CPU may reorder R->R, R->W, W->R, W->W
>> 2080 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2081 #
>> 2082 config WEAK_ORDERING
>> 2083 bool
>> 2084
>> 2085 #
>> 2086 # CPU may reorder reads and writes beyond LL/SC
>> 2087 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2088 #
>> 2089 config WEAK_REORDERING_BEYOND_LLSC
>> 2090 bool
>> 2091 endmenu
>> 2092
>> 2093 #
>> 2094 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2095 #
>> 2096 config CPU_MIPS32
>> 2097 bool
>> 2098 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
>> 2099 CPU_MIPS32_R6 || CPU_P5600
>> 2100
>> 2101 config CPU_MIPS64
>> 2102 bool
>> 2103 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
>> 2104 CPU_MIPS64_R6
>> 2105
>> 2106 #
>> 2107 # These indicate the revision of the architecture
>> 2108 #
>> 2109 config CPU_MIPSR1
>> 2110 bool
>> 2111 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2112
>> 2113 config CPU_MIPSR2
>> 2114 bool
>> 2115 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2116 select CPU_HAS_RIXI
>> 2117 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2118 select MIPS_SPRAM
>> 2119
>> 2120 config CPU_MIPSR5
>> 2121 bool
>> 2122 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 2123 select CPU_HAS_RIXI
>> 2124 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2125 select MIPS_SPRAM
>> 2126
>> 2127 config CPU_MIPSR6
>> 2128 bool
>> 2129 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2130 select CPU_HAS_RIXI
>> 2131 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2132 select HAVE_ARCH_BITREVERSE
>> 2133 select MIPS_ASID_BITS_VARIABLE
>> 2134 select MIPS_CRC_SUPPORT
>> 2135 select MIPS_SPRAM
>> 2136
>> 2137 config TARGET_ISA_REV
>> 2138 int
>> 2139 default 1 if CPU_MIPSR1
>> 2140 default 2 if CPU_MIPSR2
>> 2141 default 5 if CPU_MIPSR5
>> 2142 default 6 if CPU_MIPSR6
>> 2143 default 0
>> 2144 help
>> 2145 Reflects the ISA revision being targeted by the kernel build. This
>> 2146 is effectively the Kconfig equivalent of MIPS_ISA_REV.
>> 2147
>> 2148 config EVA
>> 2149 bool
>> 2150
>> 2151 config XPA
>> 2152 bool
>> 2153
>> 2154 config SYS_SUPPORTS_32BIT_KERNEL
>> 2155 bool
>> 2156 config SYS_SUPPORTS_64BIT_KERNEL
>> 2157 bool
>> 2158 config CPU_SUPPORTS_32BIT_KERNEL
>> 2159 bool
>> 2160 config CPU_SUPPORTS_64BIT_KERNEL
>> 2161 bool
>> 2162 config CPU_SUPPORTS_CPUFREQ
>> 2163 bool
>> 2164 config CPU_SUPPORTS_ADDRWINCFG
>> 2165 bool
>> 2166 config CPU_SUPPORTS_HUGEPAGES
>> 2167 bool
>> 2168 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
>> 2169 config MIPS_PGD_C0_CONTEXT
>> 2170 bool
>> 2171 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2172
>> 2173 #
>> 2174 # Set to y for ptrace access to watch registers.
>> 2175 #
>> 2176 config HARDWARE_WATCHPOINTS
>> 2177 bool
>> 2178 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2179
>> 2180 menu "Kernel type"
>> 2181
222 choice 2182 choice
223 prompt "PAGE OFFSET" !! 2183 prompt "Kernel code model"
224 default PAGE_OFFSET_80000000 !! 2184 help
>> 2185 You should only select this option if you have a workload that
>> 2186 actually benefits from 64-bit processing or if your machine has
>> 2187 large memory. You will only be presented a single option in this
>> 2188 menu if your system does not support both 32-bit and 64-bit kernels.
>> 2189
>> 2190 config 32BIT
>> 2191 bool "32-bit kernel"
>> 2192 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2193 select TRAD_SIGNALS
>> 2194 help
>> 2195 Select this option if you want to build a 32-bit kernel.
225 2196
226 config PAGE_OFFSET_80000000 !! 2197 config 64BIT
227 bool "PAGE OFFSET 2G (user:kernel = 2: !! 2198 bool "64-bit kernel"
>> 2199 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2200 help
>> 2201 Select this option if you want to build a 64-bit kernel.
228 2202
229 config PAGE_OFFSET_A0000000 <<
230 bool "PAGE OFFSET 2.5G (user:kernel = <<
231 endchoice 2203 endchoice
232 2204
233 config PAGE_OFFSET !! 2205 config KVM_GUEST
234 hex !! 2206 bool "KVM Guest Kernel"
235 default 0x80000000 if PAGE_OFFSET_8000 !! 2207 depends on CPU_MIPS32_R2
236 default 0xa0000000 if PAGE_OFFSET_A000 !! 2208 depends on BROKEN_ON_SMP
237 choice !! 2209 help
>> 2210 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2211 mode.
238 2212
239 prompt "C-SKY PMU type" !! 2213 config KVM_GUEST_TIMER_FREQ
240 depends on PERF_EVENTS !! 2214 int "Count/Compare Timer Frequency (MHz)"
241 depends on CPU_CK807 || CPU_CK810 || C !! 2215 depends on KVM_GUEST
>> 2216 default 100
>> 2217 help
>> 2218 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2219 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2220 timer frequency is specified directly.
>> 2221
>> 2222 config MIPS_VA_BITS_48
>> 2223 bool "48 bits virtual memory"
>> 2224 depends on 64BIT
>> 2225 help
>> 2226 Support a maximum at least 48 bits of application virtual
>> 2227 memory. Default is 40 bits or less, depending on the CPU.
>> 2228 For page sizes 16k and above, this option results in a small
>> 2229 memory overhead for page tables. For 4k page size, a fourth
>> 2230 level of page tables is added which imposes both a memory
>> 2231 overhead as well as slower TLB fault handling.
242 2232
243 config CPU_PMU_NONE !! 2233 If unsure, say N.
244 bool "None" <<
245 2234
246 config CSKY_PMU_V1 !! 2235 choice
247 bool "Performance Monitoring Unit Ver. !! 2236 prompt "Kernel page size"
>> 2237 default PAGE_SIZE_4KB
>> 2238
>> 2239 config PAGE_SIZE_4KB
>> 2240 bool "4kB"
>> 2241 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
>> 2242 help
>> 2243 This option select the standard 4kB Linux page size. On some
>> 2244 R3000-family processors this is the only available page size. Using
>> 2245 4kB page size will minimize memory consumption and is therefore
>> 2246 recommended for low memory systems.
>> 2247
>> 2248 config PAGE_SIZE_8KB
>> 2249 bool "8kB"
>> 2250 depends on CPU_CAVIUM_OCTEON
>> 2251 depends on !MIPS_VA_BITS_48
>> 2252 help
>> 2253 Using 8kB page size will result in higher performance kernel at
>> 2254 the price of higher memory consumption. This option is available
>> 2255 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2256 distribution to support this.
>> 2257
>> 2258 config PAGE_SIZE_16KB
>> 2259 bool "16kB"
>> 2260 depends on !CPU_R3000 && !CPU_TX39XX
>> 2261 help
>> 2262 Using 16kB page size will result in higher performance kernel at
>> 2263 the price of higher memory consumption. This option is available on
>> 2264 all non-R3000 family processors. Note that you will need a suitable
>> 2265 Linux distribution to support this.
>> 2266
>> 2267 config PAGE_SIZE_32KB
>> 2268 bool "32kB"
>> 2269 depends on CPU_CAVIUM_OCTEON
>> 2270 depends on !MIPS_VA_BITS_48
>> 2271 help
>> 2272 Using 32kB page size will result in higher performance kernel at
>> 2273 the price of higher memory consumption. This option is available
>> 2274 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2275 distribution to support this.
>> 2276
>> 2277 config PAGE_SIZE_64KB
>> 2278 bool "64kB"
>> 2279 depends on !CPU_R3000 && !CPU_TX39XX
>> 2280 help
>> 2281 Using 64kB page size will result in higher performance kernel at
>> 2282 the price of higher memory consumption. This option is available on
>> 2283 all non-R3000 family processor. Not that at the time of this
>> 2284 writing this option is still high experimental.
248 2285
249 endchoice 2286 endchoice
250 2287
>> 2288 config FORCE_MAX_ZONEORDER
>> 2289 int "Maximum zone order"
>> 2290 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2291 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2292 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2293 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2294 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2295 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2296 range 11 64
>> 2297 default "11"
>> 2298 help
>> 2299 The kernel memory allocator divides physically contiguous memory
>> 2300 blocks into "zones", where each zone is a power of two number of
>> 2301 pages. This option selects the largest power of two that the kernel
>> 2302 keeps in the memory allocator. If you need to allocate very large
>> 2303 blocks of physically contiguous memory, then you may need to
>> 2304 increase this value.
>> 2305
>> 2306 This config option is actually maximum order plus one. For example,
>> 2307 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2308
>> 2309 The page size is not necessarily 4KB. Keep this in mind
>> 2310 when choosing a value for this option.
>> 2311
>> 2312 config BOARD_SCACHE
>> 2313 bool
>> 2314
>> 2315 config IP22_CPU_SCACHE
>> 2316 bool
>> 2317 select BOARD_SCACHE
>> 2318
>> 2319 #
>> 2320 # Support for a MIPS32 / MIPS64 style S-caches
>> 2321 #
>> 2322 config MIPS_CPU_SCACHE
>> 2323 bool
>> 2324 select BOARD_SCACHE
>> 2325
>> 2326 config R5000_CPU_SCACHE
>> 2327 bool
>> 2328 select BOARD_SCACHE
>> 2329
>> 2330 config RM7000_CPU_SCACHE
>> 2331 bool
>> 2332 select BOARD_SCACHE
>> 2333
>> 2334 config SIBYTE_DMA_PAGEOPS
>> 2335 bool "Use DMA to clear/copy pages"
>> 2336 depends on CPU_SB1
>> 2337 help
>> 2338 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2339 channel. These DMA channels are otherwise unused by the standard
>> 2340 SiByte Linux port. Seems to give a small performance benefit.
>> 2341
>> 2342 config CPU_HAS_PREFETCH
>> 2343 bool
>> 2344
>> 2345 config CPU_GENERIC_DUMP_TLB
>> 2346 bool
>> 2347 default y if !(CPU_R3000 || CPU_TX39XX)
>> 2348
>> 2349 config MIPS_FP_SUPPORT
>> 2350 bool "Floating Point support" if EXPERT
>> 2351 default y
>> 2352 help
>> 2353 Select y to include support for floating point in the kernel
>> 2354 including initialization of FPU hardware, FP context save & restore
>> 2355 and emulation of an FPU where necessary. Without this support any
>> 2356 userland program attempting to use floating point instructions will
>> 2357 receive a SIGILL.
>> 2358
>> 2359 If you know that your userland will not attempt to use floating point
>> 2360 instructions then you can say n here to shrink the kernel a little.
>> 2361
>> 2362 If unsure, say y.
>> 2363
>> 2364 config CPU_R2300_FPU
>> 2365 bool
>> 2366 depends on MIPS_FP_SUPPORT
>> 2367 default y if CPU_R3000 || CPU_TX39XX
>> 2368
>> 2369 config CPU_R3K_TLB
>> 2370 bool
>> 2371
>> 2372 config CPU_R4K_FPU
>> 2373 bool
>> 2374 depends on MIPS_FP_SUPPORT
>> 2375 default y if !CPU_R2300_FPU
>> 2376
>> 2377 config CPU_R4K_CACHE_TLB
>> 2378 bool
>> 2379 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
>> 2380
>> 2381 config MIPS_MT_SMP
>> 2382 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2383 default y
>> 2384 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2385 select CPU_MIPSR2_IRQ_VI
>> 2386 select CPU_MIPSR2_IRQ_EI
>> 2387 select SYNC_R4K
>> 2388 select MIPS_MT
>> 2389 select SMP
>> 2390 select SMP_UP
>> 2391 select SYS_SUPPORTS_SMP
>> 2392 select SYS_SUPPORTS_SCHED_SMT
>> 2393 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2394 help
>> 2395 This is a kernel model which is known as SMVP. This is supported
>> 2396 on cores with the MT ASE and uses the available VPEs to implement
>> 2397 virtual processors which supports SMP. This is equivalent to the
>> 2398 Intel Hyperthreading feature. For further information go to
>> 2399 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2400
>> 2401 config MIPS_MT
>> 2402 bool
>> 2403
>> 2404 config SCHED_SMT
>> 2405 bool "SMT (multithreading) scheduler support"
>> 2406 depends on SYS_SUPPORTS_SCHED_SMT
>> 2407 default n
>> 2408 help
>> 2409 SMT scheduler support improves the CPU scheduler's decision making
>> 2410 when dealing with MIPS MT enabled cores at a cost of slightly
>> 2411 increased overhead in some places. If unsure say N here.
>> 2412
>> 2413 config SYS_SUPPORTS_SCHED_SMT
>> 2414 bool
>> 2415
>> 2416 config SYS_SUPPORTS_MULTITHREADING
>> 2417 bool
>> 2418
>> 2419 config MIPS_MT_FPAFF
>> 2420 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2421 default y
>> 2422 depends on MIPS_MT_SMP
>> 2423
>> 2424 config MIPSR2_TO_R6_EMULATOR
>> 2425 bool "MIPS R2-to-R6 emulator"
>> 2426 depends on CPU_MIPSR6
>> 2427 depends on MIPS_FP_SUPPORT
>> 2428 default y
>> 2429 help
>> 2430 Choose this option if you want to run non-R6 MIPS userland code.
>> 2431 Even if you say 'Y' here, the emulator will still be disabled by
>> 2432 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2433 The only reason this is a build-time option is to save ~14K from the
>> 2434 final kernel image.
>> 2435
>> 2436 config SYS_SUPPORTS_VPE_LOADER
>> 2437 bool
>> 2438 depends on SYS_SUPPORTS_MULTITHREADING
>> 2439 help
>> 2440 Indicates that the platform supports the VPE loader, and provides
>> 2441 physical_memsize.
>> 2442
>> 2443 config MIPS_VPE_LOADER
>> 2444 bool "VPE loader support."
>> 2445 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2446 select CPU_MIPSR2_IRQ_VI
>> 2447 select CPU_MIPSR2_IRQ_EI
>> 2448 select MIPS_MT
>> 2449 help
>> 2450 Includes a loader for loading an elf relocatable object
>> 2451 onto another VPE and running it.
>> 2452
>> 2453 config MIPS_VPE_LOADER_CMP
>> 2454 bool
>> 2455 default "y"
>> 2456 depends on MIPS_VPE_LOADER && MIPS_CMP
>> 2457
>> 2458 config MIPS_VPE_LOADER_MT
>> 2459 bool
>> 2460 default "y"
>> 2461 depends on MIPS_VPE_LOADER && !MIPS_CMP
>> 2462
>> 2463 config MIPS_VPE_LOADER_TOM
>> 2464 bool "Load VPE program into memory hidden from linux"
>> 2465 depends on MIPS_VPE_LOADER
>> 2466 default y
>> 2467 help
>> 2468 The loader can use memory that is present but has been hidden from
>> 2469 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2470 you to ensure the amount you put in the option and the space your
>> 2471 program requires is less or equal to the amount physically present.
>> 2472
>> 2473 config MIPS_VPE_APSP_API
>> 2474 bool "Enable support for AP/SP API (RTLX)"
>> 2475 depends on MIPS_VPE_LOADER
>> 2476
>> 2477 config MIPS_VPE_APSP_API_CMP
>> 2478 bool
>> 2479 default "y"
>> 2480 depends on MIPS_VPE_APSP_API && MIPS_CMP
>> 2481
>> 2482 config MIPS_VPE_APSP_API_MT
>> 2483 bool
>> 2484 default "y"
>> 2485 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2486
>> 2487 config MIPS_CMP
>> 2488 bool "MIPS CMP framework support (DEPRECATED)"
>> 2489 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2490 select SMP
>> 2491 select SYNC_R4K
>> 2492 select SYS_SUPPORTS_SMP
>> 2493 select WEAK_ORDERING
>> 2494 default n
>> 2495 help
>> 2496 Select this if you are using a bootloader which implements the "CMP
>> 2497 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2498 its ability to start secondary CPUs.
>> 2499
>> 2500 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2501 instead of this.
>> 2502
>> 2503 config MIPS_CPS
>> 2504 bool "MIPS Coherent Processing System support"
>> 2505 depends on SYS_SUPPORTS_MIPS_CPS
>> 2506 select MIPS_CM
>> 2507 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2508 select SMP
>> 2509 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2510 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2511 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2512 select SYS_SUPPORTS_SMP
>> 2513 select WEAK_ORDERING
>> 2514 help
>> 2515 Select this if you wish to run an SMP kernel across multiple cores
>> 2516 within a MIPS Coherent Processing System. When this option is
>> 2517 enabled the kernel will probe for other cores and boot them with
>> 2518 no external assistance. It is safe to enable this when hardware
>> 2519 support is unavailable.
>> 2520
>> 2521 config MIPS_CPS_PM
>> 2522 depends on MIPS_CPS
>> 2523 bool
>> 2524
>> 2525 config MIPS_CM
>> 2526 bool
>> 2527 select MIPS_CPC
>> 2528
>> 2529 config MIPS_CPC
>> 2530 bool
>> 2531
>> 2532 config SB1_PASS_2_WORKAROUNDS
>> 2533 bool
>> 2534 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2535 default y
>> 2536
>> 2537 config SB1_PASS_2_1_WORKAROUNDS
>> 2538 bool
>> 2539 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2540 default y
>> 2541
251 choice 2542 choice
252 prompt "Power Manager Instruction (wai !! 2543 prompt "SmartMIPS or microMIPS ASE support"
253 default CPU_PM_NONE <<
254 2544
255 config CPU_PM_NONE !! 2545 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
256 bool "None" 2546 bool "None"
>> 2547 help
>> 2548 Select this if you want neither microMIPS nor SmartMIPS support
257 2549
258 config CPU_PM_WAIT !! 2550 config CPU_HAS_SMARTMIPS
259 bool "wait" !! 2551 depends on SYS_SUPPORTS_SMARTMIPS
260 !! 2552 bool "SmartMIPS"
261 config CPU_PM_DOZE !! 2553 help
262 bool "doze" !! 2554 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2555 increased security at both hardware and software level for
>> 2556 smartcards. Enabling this option will allow proper use of the
>> 2557 SmartMIPS instructions by Linux applications. However a kernel with
>> 2558 this option will not work on a MIPS core without SmartMIPS core. If
>> 2559 you don't know you probably don't have SmartMIPS and should say N
>> 2560 here.
>> 2561
>> 2562 config CPU_MICROMIPS
>> 2563 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2564 bool "microMIPS"
>> 2565 help
>> 2566 When this option is enabled the kernel will be built using the
>> 2567 microMIPS ISA
263 2568
264 config CPU_PM_STOP <<
265 bool "stop" <<
266 endchoice 2569 endchoice
267 2570
268 menuconfig HAVE_TCM !! 2571 config CPU_HAS_MSA
269 bool "Tightly-Coupled/Sram Memory" !! 2572 bool "Support for the MIPS SIMD Architecture"
270 depends on !COMPILE_TEST !! 2573 depends on CPU_SUPPORTS_MSA
271 help !! 2574 depends on MIPS_FP_SUPPORT
272 The implementation are not only used !! 2575 depends on 64BIT || MIPS_O32_FP64_SUPPORT
273 but also used by sram on SOC bus. It !! 2576 help
274 software interface, so that old tcm !! 2577 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
275 re-used directly. !! 2578 and a set of SIMD instructions to operate on them. When this option
276 !! 2579 is enabled the kernel will support allocating & switching MSA
277 if HAVE_TCM !! 2580 vector register contexts. If you know that your kernel will only be
278 config ITCM_RAM_BASE !! 2581 running on CPUs which do not support MSA or that your userland will
279 hex "ITCM ram base" !! 2582 not be making use of it then you may wish to say N here to reduce
280 default 0xffffffff !! 2583 the size & complexity of your kernel.
281 <<
282 config ITCM_NR_PAGES <<
283 int "Page count of ITCM size: NR*4KB" <<
284 range 1 256 <<
285 default 32 <<
286 <<
287 config HAVE_DTCM <<
288 bool "DTCM Support" <<
289 <<
290 config DTCM_RAM_BASE <<
291 hex "DTCM ram base" <<
292 depends on HAVE_DTCM <<
293 default 0xffffffff <<
294 <<
295 config DTCM_NR_PAGES <<
296 int "Page count of DTCM size: NR*4KB" <<
297 depends on HAVE_DTCM <<
298 range 1 256 <<
299 default 32 <<
300 endif <<
301 2584
302 config CPU_HAS_VDSP !! 2585 If unsure, say Y.
303 bool "CPU has VDSP coprocessor" <<
304 depends on CPU_HAS_FPU && CPU_HAS_FPUV <<
305 <<
306 config CPU_HAS_FPU <<
307 bool "CPU has FPU coprocessor" <<
308 depends on CPU_CK807 || CPU_CK810 || C <<
309 <<
310 config CPU_HAS_ICACHE_INS <<
311 bool "CPU has Icache invalidate instru <<
312 depends on CPU_HAS_CACHEV2 <<
313 <<
314 config CPU_HAS_TEE <<
315 bool "CPU has Trusted Execution Enviro <<
316 depends on CPU_CK810 <<
317 2586
318 config SMP !! 2587 config CPU_HAS_WB
319 bool "Symmetric Multi-Processing (SMP) !! 2588 bool
320 depends on CPU_CK860 <<
321 default n <<
322 2589
323 config NR_CPUS !! 2590 config XKS01
324 int "Maximum number of CPUs (2-32)" !! 2591 bool
325 range 2 32 !! 2592
326 depends on SMP !! 2593 config CPU_HAS_DIEI
327 default "4" !! 2594 depends on !CPU_DIEI_BROKEN
>> 2595 bool
>> 2596
>> 2597 config CPU_DIEI_BROKEN
>> 2598 bool
>> 2599
>> 2600 config CPU_HAS_RIXI
>> 2601 bool
>> 2602
>> 2603 config CPU_NO_LOAD_STORE_LR
>> 2604 bool
>> 2605 help
>> 2606 CPU lacks support for unaligned load and store instructions:
>> 2607 LWL, LWR, SWL, SWR (Load/store word left/right).
>> 2608 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2609 systems).
>> 2610
>> 2611 #
>> 2612 # Vectored interrupt mode is an R2 feature
>> 2613 #
>> 2614 config CPU_MIPSR2_IRQ_VI
>> 2615 bool
>> 2616
>> 2617 #
>> 2618 # Extended interrupt mode is an R2 feature
>> 2619 #
>> 2620 config CPU_MIPSR2_IRQ_EI
>> 2621 bool
>> 2622
>> 2623 config CPU_HAS_SYNC
>> 2624 bool
>> 2625 depends on !CPU_R3000
>> 2626 default y
>> 2627
>> 2628 #
>> 2629 # CPU non-features
>> 2630 #
>> 2631 config CPU_DADDI_WORKAROUNDS
>> 2632 bool
328 2633
>> 2634 config CPU_R4000_WORKAROUNDS
>> 2635 bool
>> 2636 select CPU_R4400_WORKAROUNDS
>> 2637
>> 2638 config CPU_R4400_WORKAROUNDS
>> 2639 bool
>> 2640
>> 2641 config CPU_R4X00_BUGS64
>> 2642 bool
>> 2643 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
>> 2644
>> 2645 config MIPS_ASID_SHIFT
>> 2646 int
>> 2647 default 6 if CPU_R3000 || CPU_TX39XX
>> 2648 default 0
>> 2649
>> 2650 config MIPS_ASID_BITS
>> 2651 int
>> 2652 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2653 default 6 if CPU_R3000 || CPU_TX39XX
>> 2654 default 8
>> 2655
>> 2656 config MIPS_ASID_BITS_VARIABLE
>> 2657 bool
>> 2658
>> 2659 config MIPS_CRC_SUPPORT
>> 2660 bool
>> 2661
>> 2662 #
>> 2663 # - Highmem only makes sense for the 32-bit kernel.
>> 2664 # - The current highmem code will only work properly on physically indexed
>> 2665 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2666 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2667 # moment we protect the user and offer the highmem option only on machines
>> 2668 # where it's known to be safe. This will not offer highmem on a few systems
>> 2669 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2670 # indexed CPUs but we're playing safe.
>> 2671 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2672 # know they might have memory configurations that could make use of highmem
>> 2673 # support.
>> 2674 #
329 config HIGHMEM 2675 config HIGHMEM
330 bool "High Memory Support" 2676 bool "High Memory Support"
331 depends on !CPU_CK610 !! 2677 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
332 select KMAP_LOCAL !! 2678
>> 2679 config CPU_SUPPORTS_HIGHMEM
>> 2680 bool
>> 2681
>> 2682 config SYS_SUPPORTS_HIGHMEM
>> 2683 bool
>> 2684
>> 2685 config SYS_SUPPORTS_SMARTMIPS
>> 2686 bool
>> 2687
>> 2688 config SYS_SUPPORTS_MICROMIPS
>> 2689 bool
>> 2690
>> 2691 config SYS_SUPPORTS_MIPS16
>> 2692 bool
>> 2693 help
>> 2694 This option must be set if a kernel might be executed on a MIPS16-
>> 2695 enabled CPU even if MIPS16 is not actually being used. In other
>> 2696 words, it makes the kernel MIPS16-tolerant.
>> 2697
>> 2698 config CPU_SUPPORTS_MSA
>> 2699 bool
>> 2700
>> 2701 config ARCH_FLATMEM_ENABLE
>> 2702 def_bool y
>> 2703 depends on !NUMA && !CPU_LOONGSON2EF
>> 2704
>> 2705 config ARCH_SPARSEMEM_ENABLE
>> 2706 bool
>> 2707 select SPARSEMEM_STATIC if !SGI_IP27
>> 2708
>> 2709 config NUMA
>> 2710 bool "NUMA Support"
>> 2711 depends on SYS_SUPPORTS_NUMA
>> 2712 help
>> 2713 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2714 Access). This option improves performance on systems with more
>> 2715 than two nodes; on two node systems it is generally better to
>> 2716 leave it disabled; on single node systems leave this option
>> 2717 disabled.
>> 2718
>> 2719 config SYS_SUPPORTS_NUMA
>> 2720 bool
>> 2721
>> 2722 config HAVE_SETUP_PER_CPU_AREA
>> 2723 def_bool y
>> 2724 depends on NUMA
>> 2725
>> 2726 config NEED_PER_CPU_EMBED_FIRST_CHUNK
>> 2727 def_bool y
>> 2728 depends on NUMA
>> 2729
>> 2730 config RELOCATABLE
>> 2731 bool "Relocatable kernel"
>> 2732 depends on SYS_SUPPORTS_RELOCATABLE
>> 2733 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2734 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2735 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2736 CPU_P5600 || CAVIUM_OCTEON_SOC
>> 2737 help
>> 2738 This builds a kernel image that retains relocation information
>> 2739 so it can be loaded someplace besides the default 1MB.
>> 2740 The relocations make the kernel binary about 15% larger,
>> 2741 but are discarded at runtime
>> 2742
>> 2743 config RELOCATION_TABLE_SIZE
>> 2744 hex "Relocation table size"
>> 2745 depends on RELOCATABLE
>> 2746 range 0x0 0x01000000
>> 2747 default "0x00100000"
>> 2748 help
>> 2749 A table of relocation data will be appended to the kernel binary
>> 2750 and parsed at boot to fix up the relocated kernel.
>> 2751
>> 2752 This option allows the amount of space reserved for the table to be
>> 2753 adjusted, although the default of 1Mb should be ok in most cases.
>> 2754
>> 2755 The build will fail and a valid size suggested if this is too small.
>> 2756
>> 2757 If unsure, leave at the default value.
>> 2758
>> 2759 config RANDOMIZE_BASE
>> 2760 bool "Randomize the address of the kernel image"
>> 2761 depends on RELOCATABLE
>> 2762 help
>> 2763 Randomizes the physical and virtual address at which the
>> 2764 kernel image is loaded, as a security feature that
>> 2765 deters exploit attempts relying on knowledge of the location
>> 2766 of kernel internals.
>> 2767
>> 2768 Entropy is generated using any coprocessor 0 registers available.
>> 2769
>> 2770 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2771
>> 2772 If unsure, say N.
>> 2773
>> 2774 config RANDOMIZE_BASE_MAX_OFFSET
>> 2775 hex "Maximum kASLR offset" if EXPERT
>> 2776 depends on RANDOMIZE_BASE
>> 2777 range 0x0 0x40000000 if EVA || 64BIT
>> 2778 range 0x0 0x08000000
>> 2779 default "0x01000000"
>> 2780 help
>> 2781 When kASLR is active, this provides the maximum offset that will
>> 2782 be applied to the kernel image. It should be set according to the
>> 2783 amount of physical RAM available in the target system minus
>> 2784 PHYSICAL_START and must be a power of 2.
>> 2785
>> 2786 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2787 EVA or 64-bit. The default is 16Mb.
>> 2788
>> 2789 config NODES_SHIFT
>> 2790 int
>> 2791 default "6"
>> 2792 depends on NEED_MULTIPLE_NODES
>> 2793
>> 2794 config HW_PERF_EVENTS
>> 2795 bool "Enable hardware performance counter support for perf events"
>> 2796 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
333 default y 2797 default y
>> 2798 help
>> 2799 Enable hardware performance counter support for perf events. If
>> 2800 disabled, perf events will use software events only.
>> 2801
>> 2802 config DMI
>> 2803 bool "Enable DMI scanning"
>> 2804 depends on MACH_LOONGSON64
>> 2805 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
>> 2806 default y
>> 2807 help
>> 2808 Enabled scanning of DMI to identify machine quirks. Say Y
>> 2809 here unless you have verified that your setup is not
>> 2810 affected by entries in the DMI blacklist. Required by PNP
>> 2811 BIOS code.
334 2812
335 config DRAM_BASE !! 2813 config SMP
336 hex "DRAM start addr (the same with me !! 2814 bool "Multi-Processing support"
337 default 0x0 !! 2815 depends on SYS_SUPPORTS_SMP
>> 2816 help
>> 2817 This enables support for systems with more than one CPU. If you have
>> 2818 a system with only one CPU, say N. If you have a system with more
>> 2819 than one CPU, say Y.
>> 2820
>> 2821 If you say N here, the kernel will run on uni- and multiprocessor
>> 2822 machines, but will use only one CPU of a multiprocessor machine. If
>> 2823 you say Y here, the kernel will run on many, but not all,
>> 2824 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2825 will run faster if you say N here.
>> 2826
>> 2827 People using multiprocessor machines who say Y here should also say
>> 2828 Y to "Enhanced Real Time Clock Support", below.
>> 2829
>> 2830 See also the SMP-HOWTO available at
>> 2831 <http://www.tldp.org/docs.html#howto>.
>> 2832
>> 2833 If you don't know what to do here, say N.
338 2834
339 config HOTPLUG_CPU 2835 config HOTPLUG_CPU
340 bool "Support for hot-pluggable CPUs" 2836 bool "Support for hot-pluggable CPUs"
341 select GENERIC_IRQ_MIGRATION !! 2837 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
342 depends on SMP <<
343 help 2838 help
344 Say Y here to allow turning CPUs off 2839 Say Y here to allow turning CPUs off and on. CPUs can be
345 controlled through /sys/devices/syst !! 2840 controlled through /sys/devices/system/cpu.
346 !! 2841 (Note: power management support will enable this option
>> 2842 automatically on SMP systems. )
347 Say N if you want to disable CPU hot 2843 Say N if you want to disable CPU hotplug.
348 2844
349 config HAVE_EFFICIENT_UNALIGNED_STRING_OPS !! 2845 config SMP_UP
350 bool "Enable EFFICIENT_UNALIGNED_STRIN !! 2846 bool
351 depends on CPU_CK807 || CPU_CK810 || C !! 2847
>> 2848 config SYS_SUPPORTS_MIPS_CMP
>> 2849 bool
>> 2850
>> 2851 config SYS_SUPPORTS_MIPS_CPS
>> 2852 bool
>> 2853
>> 2854 config SYS_SUPPORTS_SMP
>> 2855 bool
>> 2856
>> 2857 config NR_CPUS_DEFAULT_4
>> 2858 bool
>> 2859
>> 2860 config NR_CPUS_DEFAULT_8
>> 2861 bool
>> 2862
>> 2863 config NR_CPUS_DEFAULT_16
>> 2864 bool
>> 2865
>> 2866 config NR_CPUS_DEFAULT_32
>> 2867 bool
>> 2868
>> 2869 config NR_CPUS_DEFAULT_64
>> 2870 bool
>> 2871
>> 2872 config NR_CPUS
>> 2873 int "Maximum number of CPUs (2-256)"
>> 2874 range 2 256
>> 2875 depends on SMP
>> 2876 default "4" if NR_CPUS_DEFAULT_4
>> 2877 default "8" if NR_CPUS_DEFAULT_8
>> 2878 default "16" if NR_CPUS_DEFAULT_16
>> 2879 default "32" if NR_CPUS_DEFAULT_32
>> 2880 default "64" if NR_CPUS_DEFAULT_64
352 help 2881 help
353 Say Y here to enable EFFICIENT_UNALI !! 2882 This allows you to specify the maximum number of CPUs which this
354 deal with unaligned access by hardwa !! 2883 kernel will support. The maximum supported value is 32 for 32-bit
>> 2884 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2885 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2886 and 2 for all others.
>> 2887
>> 2888 This is purely to save memory - each supported CPU adds
>> 2889 approximately eight kilobytes to the kernel image. For best
>> 2890 performance should round up your number of processors to the next
>> 2891 power of two.
>> 2892
>> 2893 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2894 bool
>> 2895
>> 2896 config MIPS_NR_CPU_NR_MAP_1024
>> 2897 bool
>> 2898
>> 2899 config MIPS_NR_CPU_NR_MAP
>> 2900 int
>> 2901 depends on SMP
>> 2902 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2903 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2904
>> 2905 #
>> 2906 # Timer Interrupt Frequency Configuration
>> 2907 #
>> 2908
>> 2909 choice
>> 2910 prompt "Timer frequency"
>> 2911 default HZ_250
>> 2912 help
>> 2913 Allows the configuration of the timer frequency.
>> 2914
>> 2915 config HZ_24
>> 2916 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2917
>> 2918 config HZ_48
>> 2919 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2920
>> 2921 config HZ_100
>> 2922 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2923
>> 2924 config HZ_128
>> 2925 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2926
>> 2927 config HZ_250
>> 2928 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2929
>> 2930 config HZ_256
>> 2931 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2932
>> 2933 config HZ_1000
>> 2934 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2935
>> 2936 config HZ_1024
>> 2937 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2938
>> 2939 endchoice
>> 2940
>> 2941 config SYS_SUPPORTS_24HZ
>> 2942 bool
>> 2943
>> 2944 config SYS_SUPPORTS_48HZ
>> 2945 bool
>> 2946
>> 2947 config SYS_SUPPORTS_100HZ
>> 2948 bool
>> 2949
>> 2950 config SYS_SUPPORTS_128HZ
>> 2951 bool
>> 2952
>> 2953 config SYS_SUPPORTS_250HZ
>> 2954 bool
>> 2955
>> 2956 config SYS_SUPPORTS_256HZ
>> 2957 bool
>> 2958
>> 2959 config SYS_SUPPORTS_1000HZ
>> 2960 bool
>> 2961
>> 2962 config SYS_SUPPORTS_1024HZ
>> 2963 bool
>> 2964
>> 2965 config SYS_SUPPORTS_ARBIT_HZ
>> 2966 bool
>> 2967 default y if !SYS_SUPPORTS_24HZ && \
>> 2968 !SYS_SUPPORTS_48HZ && \
>> 2969 !SYS_SUPPORTS_100HZ && \
>> 2970 !SYS_SUPPORTS_128HZ && \
>> 2971 !SYS_SUPPORTS_250HZ && \
>> 2972 !SYS_SUPPORTS_256HZ && \
>> 2973 !SYS_SUPPORTS_1000HZ && \
>> 2974 !SYS_SUPPORTS_1024HZ
>> 2975
>> 2976 config HZ
>> 2977 int
>> 2978 default 24 if HZ_24
>> 2979 default 48 if HZ_48
>> 2980 default 100 if HZ_100
>> 2981 default 128 if HZ_128
>> 2982 default 250 if HZ_250
>> 2983 default 256 if HZ_256
>> 2984 default 1000 if HZ_1000
>> 2985 default 1024 if HZ_1024
>> 2986
>> 2987 config SCHED_HRTICK
>> 2988 def_bool HIGH_RES_TIMERS
>> 2989
>> 2990 config KEXEC
>> 2991 bool "Kexec system call"
>> 2992 select KEXEC_CORE
>> 2993 help
>> 2994 kexec is a system call that implements the ability to shutdown your
>> 2995 current kernel, and to start another kernel. It is like a reboot
>> 2996 but it is independent of the system firmware. And like a reboot
>> 2997 you can start any kernel with it, not just Linux.
>> 2998
>> 2999 The name comes from the similarity to the exec system call.
>> 3000
>> 3001 It is an ongoing process to be certain the hardware in a machine
>> 3002 is properly shutdown, so do not be surprised if this code does not
>> 3003 initially work for you. As of this writing the exact hardware
>> 3004 interface is strongly in flux, so no good recommendation can be
>> 3005 made.
>> 3006
>> 3007 config CRASH_DUMP
>> 3008 bool "Kernel crash dumps"
>> 3009 help
>> 3010 Generate crash dump after being started by kexec.
>> 3011 This should be normally only set in special crash dump kernels
>> 3012 which are loaded in the main kernel with kexec-tools into
>> 3013 a specially reserved region and then later executed after
>> 3014 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 3015 to a memory address not used by the main kernel or firmware using
>> 3016 PHYSICAL_START.
>> 3017
>> 3018 config PHYSICAL_START
>> 3019 hex "Physical address where the kernel is loaded"
>> 3020 default "0xffffffff84000000"
>> 3021 depends on CRASH_DUMP
>> 3022 help
>> 3023 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 3024 If you plan to use kernel for capturing the crash dump change
>> 3025 this value to start of the reserved region (the "X" value as
>> 3026 specified in the "crashkernel=YM@XM" command line boot parameter
>> 3027 passed to the panic-ed kernel).
>> 3028
>> 3029 config SECCOMP
>> 3030 bool "Enable seccomp to safely compute untrusted bytecode"
>> 3031 depends on PROC_FS
>> 3032 default y
>> 3033 help
>> 3034 This kernel feature is useful for number crunching applications
>> 3035 that may need to compute untrusted bytecode during their
>> 3036 execution. By using pipes or other transports made available to
>> 3037 the process as file descriptors supporting the read/write
>> 3038 syscalls, it's possible to isolate those applications in
>> 3039 their own address space using seccomp. Once seccomp is
>> 3040 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 3041 and the task is only allowed to execute a few safe syscalls
>> 3042 defined by each seccomp mode.
>> 3043
>> 3044 If unsure, say Y. Only embedded should say N here.
>> 3045
>> 3046 config MIPS_O32_FP64_SUPPORT
>> 3047 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 3048 depends on 32BIT || MIPS32_O32
>> 3049 help
>> 3050 When this is enabled, the kernel will support use of 64-bit floating
>> 3051 point registers with binaries using the O32 ABI along with the
>> 3052 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 3053 32-bit MIPS systems this support is at the cost of increasing the
>> 3054 size and complexity of the compiled FPU emulator. Thus if you are
>> 3055 running a MIPS32 system and know that none of your userland binaries
>> 3056 will require 64-bit floating point, you may wish to reduce the size
>> 3057 of your kernel & potentially improve FP emulation performance by
>> 3058 saying N here.
>> 3059
>> 3060 Although binutils currently supports use of this flag the details
>> 3061 concerning its effect upon the O32 ABI in userland are still being
>> 3062 worked on. In order to avoid userland becoming dependant upon current
>> 3063 behaviour before the details have been finalised, this option should
>> 3064 be considered experimental and only enabled by those working upon
>> 3065 said details.
>> 3066
>> 3067 If unsure, say N.
>> 3068
>> 3069 config USE_OF
>> 3070 bool
>> 3071 select OF
>> 3072 select OF_EARLY_FLATTREE
>> 3073 select IRQ_DOMAIN
>> 3074
>> 3075 config UHI_BOOT
>> 3076 bool
>> 3077
>> 3078 config BUILTIN_DTB
>> 3079 bool
>> 3080
>> 3081 choice
>> 3082 prompt "Kernel appended dtb support" if USE_OF
>> 3083 default MIPS_NO_APPENDED_DTB
>> 3084
>> 3085 config MIPS_NO_APPENDED_DTB
>> 3086 bool "None"
>> 3087 help
>> 3088 Do not enable appended dtb support.
>> 3089
>> 3090 config MIPS_ELF_APPENDED_DTB
>> 3091 bool "vmlinux"
>> 3092 help
>> 3093 With this option, the boot code will look for a device tree binary
>> 3094 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3095 it is empty and the DTB can be appended using binutils command
>> 3096 objcopy:
>> 3097
>> 3098 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3099
>> 3100 This is meant as a backward compatiblity convenience for those
>> 3101 systems with a bootloader that can't be upgraded to accommodate
>> 3102 the documented boot protocol using a device tree.
>> 3103
>> 3104 config MIPS_RAW_APPENDED_DTB
>> 3105 bool "vmlinux.bin or vmlinuz.bin"
>> 3106 help
>> 3107 With this option, the boot code will look for a device tree binary
>> 3108 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3109 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3110
>> 3111 This is meant as a backward compatibility convenience for those
>> 3112 systems with a bootloader that can't be upgraded to accommodate
>> 3113 the documented boot protocol using a device tree.
>> 3114
>> 3115 Beware that there is very little in terms of protection against
>> 3116 this option being confused by leftover garbage in memory that might
>> 3117 look like a DTB header after a reboot if no actual DTB is appended
>> 3118 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3119 if you don't intend to always append a DTB.
>> 3120 endchoice
>> 3121
>> 3122 choice
>> 3123 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 3124 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3125 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 3126 !CAVIUM_OCTEON_SOC
>> 3127 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3128
>> 3129 config MIPS_CMDLINE_FROM_DTB
>> 3130 depends on USE_OF
>> 3131 bool "Dtb kernel arguments if available"
>> 3132
>> 3133 config MIPS_CMDLINE_DTB_EXTEND
>> 3134 depends on USE_OF
>> 3135 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3136
>> 3137 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3138 bool "Bootloader kernel arguments if available"
>> 3139
>> 3140 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3141 depends on CMDLINE_BOOL
>> 3142 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3143 endchoice
355 3144
356 endmenu 3145 endmenu
357 3146
358 source "arch/csky/Kconfig.platforms" !! 3147 config LOCKDEP_SUPPORT
>> 3148 bool
>> 3149 default y
>> 3150
>> 3151 config STACKTRACE_SUPPORT
>> 3152 bool
>> 3153 default y
>> 3154
>> 3155 config PGTABLE_LEVELS
>> 3156 int
>> 3157 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3158 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 3159 default 2
>> 3160
>> 3161 config MIPS_AUTO_PFN_OFFSET
>> 3162 bool
>> 3163
>> 3164 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3165
>> 3166 config PCI_DRIVERS_GENERIC
>> 3167 select PCI_DOMAINS_GENERIC if PCI
>> 3168 bool
>> 3169
>> 3170 config PCI_DRIVERS_LEGACY
>> 3171 def_bool !PCI_DRIVERS_GENERIC
>> 3172 select NO_GENERIC_PCI_IOPORT_MAP
>> 3173 select PCI_DOMAINS if PCI
>> 3174
>> 3175 #
>> 3176 # ISA support is now enabled via select. Too many systems still have the one
>> 3177 # or other ISA chip on the board that users don't know about so don't expect
>> 3178 # users to choose the right thing ...
>> 3179 #
>> 3180 config ISA
>> 3181 bool
>> 3182
>> 3183 config TC
>> 3184 bool "TURBOchannel support"
>> 3185 depends on MACH_DECSTATION
>> 3186 help
>> 3187 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3188 processors. TURBOchannel programming specifications are available
>> 3189 at:
>> 3190 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3191 and:
>> 3192 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3193 Linux driver support status is documented at:
>> 3194 <http://www.linux-mips.org/wiki/DECstation>
>> 3195
>> 3196 config MMU
>> 3197 bool
>> 3198 default y
>> 3199
>> 3200 config ARCH_MMAP_RND_BITS_MIN
>> 3201 default 12 if 64BIT
>> 3202 default 8
>> 3203
>> 3204 config ARCH_MMAP_RND_BITS_MAX
>> 3205 default 18 if 64BIT
>> 3206 default 15
>> 3207
>> 3208 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3209 default 8
>> 3210
>> 3211 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3212 default 15
>> 3213
>> 3214 config I8253
>> 3215 bool
>> 3216 select CLKSRC_I8253
>> 3217 select CLKEVT_I8253
>> 3218 select MIPS_EXTERNAL_TIMER
>> 3219
>> 3220 config ZONE_DMA
>> 3221 bool
>> 3222
>> 3223 config ZONE_DMA32
>> 3224 bool
>> 3225
>> 3226 endmenu
>> 3227
>> 3228 config TRAD_SIGNALS
>> 3229 bool
>> 3230
>> 3231 config MIPS32_COMPAT
>> 3232 bool
>> 3233
>> 3234 config COMPAT
>> 3235 bool
>> 3236
>> 3237 config SYSVIPC_COMPAT
>> 3238 bool
>> 3239
>> 3240 config MIPS32_O32
>> 3241 bool "Kernel support for o32 binaries"
>> 3242 depends on 64BIT
>> 3243 select ARCH_WANT_OLD_COMPAT_IPC
>> 3244 select COMPAT
>> 3245 select MIPS32_COMPAT
>> 3246 select SYSVIPC_COMPAT if SYSVIPC
>> 3247 help
>> 3248 Select this option if you want to run o32 binaries. These are pure
>> 3249 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3250 existing binaries are in this format.
>> 3251
>> 3252 If unsure, say Y.
>> 3253
>> 3254 config MIPS32_N32
>> 3255 bool "Kernel support for n32 binaries"
>> 3256 depends on 64BIT
>> 3257 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3258 select COMPAT
>> 3259 select MIPS32_COMPAT
>> 3260 select SYSVIPC_COMPAT if SYSVIPC
>> 3261 help
>> 3262 Select this option if you want to run n32 binaries. These are
>> 3263 64-bit binaries using 32-bit quantities for addressing and certain
>> 3264 data that would normally be 64-bit. They are used in special
>> 3265 cases.
>> 3266
>> 3267 If unsure, say N.
>> 3268
>> 3269 config BINFMT_ELF32
>> 3270 bool
>> 3271 default y if MIPS32_O32 || MIPS32_N32
>> 3272 select ELFCORE
>> 3273
>> 3274 menu "Power management options"
>> 3275
>> 3276 config ARCH_HIBERNATION_POSSIBLE
>> 3277 def_bool y
>> 3278 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3279
>> 3280 config ARCH_SUSPEND_POSSIBLE
>> 3281 def_bool y
>> 3282 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3283
>> 3284 source "kernel/power/Kconfig"
>> 3285
>> 3286 endmenu
>> 3287
>> 3288 config MIPS_EXTERNAL_TIMER
>> 3289 bool
>> 3290
>> 3291 menu "CPU Power Management"
>> 3292
>> 3293 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3294 source "drivers/cpufreq/Kconfig"
>> 3295 endif
>> 3296
>> 3297 source "drivers/cpuidle/Kconfig"
>> 3298
>> 3299 endmenu
>> 3300
>> 3301 source "drivers/firmware/Kconfig"
>> 3302
>> 3303 source "arch/mips/kvm/Kconfig"
359 3304
360 source "kernel/Kconfig.hz" !! 3305 source "arch/mips/vdso/Kconfig"
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.