1 # SPDX-License-Identifier: GPL-2.0-only
2 config CSKY
3 def_bool y
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_CPU_CACHE_ALIASING
6 select ARCH_HAS_DMA_PREP_COHERENT
7 select ARCH_HAS_GCOV_PROFILE_ALL
8 select ARCH_HAS_SYNC_DMA_FOR_CPU
9 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
10 select ARCH_USE_BUILTIN_BSWAP
11 select ARCH_USE_QUEUED_RWLOCKS
12 select ARCH_USE_QUEUED_SPINLOCKS
13 select ARCH_HAS_CURRENT_STACK_POINTER
14 select ARCH_INLINE_READ_LOCK if !PREEM
15 select ARCH_INLINE_READ_LOCK_BH if !PR
16 select ARCH_INLINE_READ_LOCK_IRQ if !P
17 select ARCH_INLINE_READ_LOCK_IRQSAVE i
18 select ARCH_INLINE_READ_UNLOCK if !PRE
19 select ARCH_INLINE_READ_UNLOCK_BH if !
20 select ARCH_INLINE_READ_UNLOCK_IRQ if
21 select ARCH_INLINE_READ_UNLOCK_IRQREST
22 select ARCH_INLINE_WRITE_LOCK if !PREE
23 select ARCH_INLINE_WRITE_LOCK_BH if !P
24 select ARCH_INLINE_WRITE_LOCK_IRQ if !
25 select ARCH_INLINE_WRITE_LOCK_IRQSAVE
26 select ARCH_INLINE_WRITE_UNLOCK if !PR
27 select ARCH_INLINE_WRITE_UNLOCK_BH if
28 select ARCH_INLINE_WRITE_UNLOCK_IRQ if
29 select ARCH_INLINE_WRITE_UNLOCK_IRQRES
30 select ARCH_INLINE_SPIN_TRYLOCK if !PR
31 select ARCH_INLINE_SPIN_TRYLOCK_BH if
32 select ARCH_INLINE_SPIN_LOCK if !PREEM
33 select ARCH_INLINE_SPIN_LOCK_BH if !PR
34 select ARCH_INLINE_SPIN_LOCK_IRQ if !P
35 select ARCH_INLINE_SPIN_LOCK_IRQSAVE i
36 select ARCH_INLINE_SPIN_UNLOCK if !PRE
37 select ARCH_INLINE_SPIN_UNLOCK_BH if !
38 select ARCH_INLINE_SPIN_UNLOCK_IRQ if
39 select ARCH_INLINE_SPIN_UNLOCK_IRQREST
40 select ARCH_NEED_CMPXCHG_1_EMU
41 select ARCH_WANT_FRAME_POINTERS if !CP
42 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_
43 select COMMON_CLK
44 select CLKSRC_MMIO
45 select CSKY_MPINTC if CPU_CK860
46 select CSKY_MP_TIMER if CPU_CK860
47 select CSKY_APB_INTC
48 select DMA_DIRECT_REMAP
49 select IRQ_DOMAIN
50 select DW_APB_TIMER_OF
51 select GENERIC_IOREMAP
52 select GENERIC_LIB_ASHLDI3
53 select GENERIC_LIB_ASHRDI3
54 select GENERIC_LIB_LSHRDI3
55 select GENERIC_LIB_MULDI3
56 select GENERIC_LIB_CMPDI2
57 select GENERIC_LIB_UCMPDI2
58 select GENERIC_ALLOCATOR
59 select GENERIC_ATOMIC64
60 select GENERIC_CPU_DEVICES
61 select GENERIC_IRQ_CHIP
62 select GENERIC_IRQ_PROBE
63 select GENERIC_IRQ_SHOW
64 select GENERIC_IRQ_MULTI_HANDLER
65 select GENERIC_SCHED_CLOCK
66 select GENERIC_SMP_IDLE_THREAD
67 select GENERIC_TIME_VSYSCALL
68 select GENERIC_VDSO_32
69 select GENERIC_GETTIMEOFDAY
70 select GX6605S_TIMER if CPU_CK610
71 select HAVE_ARCH_TRACEHOOK
72 select HAVE_ARCH_AUDITSYSCALL
73 select HAVE_ARCH_JUMP_LABEL if !CPU_CK
74 select HAVE_ARCH_JUMP_LABEL_RELATIVE
75 select HAVE_ARCH_MMAP_RND_BITS
76 select HAVE_ARCH_SECCOMP_FILTER
77 select HAVE_CONTEXT_TRACKING_USER
78 select HAVE_VIRT_CPU_ACCOUNTING_GEN
79 select HAVE_DEBUG_BUGVERBOSE
80 select HAVE_DEBUG_KMEMLEAK
81 select HAVE_DYNAMIC_FTRACE
82 select HAVE_DYNAMIC_FTRACE_WITH_REGS
83 select HAVE_GENERIC_VDSO
84 select HAVE_FUNCTION_TRACER
85 select HAVE_FUNCTION_GRAPH_TRACER
86 select HAVE_FUNCTION_ERROR_INJECTION
87 select HAVE_FTRACE_MCOUNT_RECORD
88 select HAVE_KERNEL_GZIP
89 select HAVE_KERNEL_LZO
90 select HAVE_KERNEL_LZMA
91 select HAVE_KPROBES if !CPU_CK610
92 select HAVE_KPROBES_ON_FTRACE if !CPU_
93 select HAVE_KRETPROBES if !CPU_CK610
94 select HAVE_PAGE_SIZE_4KB
95 select HAVE_PERF_EVENTS
96 select HAVE_PERF_REGS
97 select HAVE_PERF_USER_STACK_DUMP
98 select HAVE_DMA_CONTIGUOUS
99 select HAVE_REGS_AND_STACK_ACCESS_API
100 select HAVE_STACKPROTECTOR
101 select HAVE_SYSCALL_TRACEPOINTS
102 select HOTPLUG_CORE_SYNC_DEAD if HOTPL
103 select LOCK_MM_AND_FIND_VMA
104 select MAY_HAVE_SPARSE_IRQ
105 select MODULES_USE_ELF_RELA if MODULES
106 select OF
107 select OF_EARLY_FLATTREE
108 select PERF_USE_VMALLOC if CPU_CK610
109 select RTC_LIB
110 select TIMER_OF
111 select GENERIC_PCI_IOMAP
112 select HAVE_PCI
113 select PCI_DOMAINS_GENERIC if PCI
114 select PCI_SYSCALL if PCI
115 select PCI_MSI if PCI
116 select TRACE_IRQFLAGS_SUPPORT
117
118 config LOCKDEP_SUPPORT
119 def_bool y
120
121 config ARCH_SUPPORTS_UPROBES
122 def_bool y if !CPU_CK610
123
124 config CPU_HAS_CACHEV2
125 bool
126
127 config CPU_HAS_FPUV2
128 bool
129
130 config CPU_HAS_HILO
131 bool
132
133 config CPU_HAS_TLBI
134 bool
135
136 config CPU_HAS_LDSTEX
137 bool
138 help
139 For SMP, CPU needs "ldex&stex" instr
140
141 config CPU_NEED_TLBSYNC
142 bool
143
144 config CPU_NEED_SOFTALIGN
145 bool
146
147 config CPU_NO_USER_BKPT
148 bool
149 help
150 For abiv2 we couldn't use "trap 1" a
151 abiv2 is 16/32bit instruction set an
152 So we need a 16bit instruction as us
153 instruction exception.
154 In kernel we parse the *regs->pc to
155
156 config GENERIC_CALIBRATE_DELAY
157 def_bool y
158
159 config GENERIC_CSUM
160 def_bool y
161
162 config GENERIC_HWEIGHT
163 def_bool y
164
165 config MMU
166 def_bool y
167
168 config STACKTRACE_SUPPORT
169 def_bool y
170
171 config TIME_LOW_RES
172 def_bool y
173
174 config CPU_ASID_BITS
175 int
176 default "8" if (CPU_CK610 || CPU_C
177 default "12" if (CPU_CK860)
178
179 config L1_CACHE_SHIFT
180 int
181 default "4" if (CPU_CK610)
182 default "5" if (CPU_CK807 || CPU_C
183 default "6" if (CPU_CK860)
184
185 config ARCH_MMAP_RND_BITS_MIN
186 default 8
187
188 # max bits determined by the following formula
189 # VA_BITS - PAGE_SHIFT - 3
190 config ARCH_MMAP_RND_BITS_MAX
191 default 17
192
193 menu "Processor type and features"
194
195 choice
196 prompt "CPU MODEL"
197 default CPU_CK807
198
199 config CPU_CK610
200 bool "CSKY CPU ck610"
201 select CPU_NEED_TLBSYNC
202 select CPU_NEED_SOFTALIGN
203 select CPU_NO_USER_BKPT
204
205 config CPU_CK810
206 bool "CSKY CPU ck810"
207 select CPU_HAS_HILO
208 select CPU_NEED_TLBSYNC
209
210 config CPU_CK807
211 bool "CSKY CPU ck807"
212 select CPU_HAS_HILO
213
214 config CPU_CK860
215 bool "CSKY CPU ck860"
216 select CPU_HAS_TLBI
217 select CPU_HAS_CACHEV2
218 select CPU_HAS_LDSTEX
219 select CPU_HAS_FPUV2
220 endchoice
221
222 choice
223 prompt "PAGE OFFSET"
224 default PAGE_OFFSET_80000000
225
226 config PAGE_OFFSET_80000000
227 bool "PAGE OFFSET 2G (user:kernel = 2:
228
229 config PAGE_OFFSET_A0000000
230 bool "PAGE OFFSET 2.5G (user:kernel =
231 endchoice
232
233 config PAGE_OFFSET
234 hex
235 default 0x80000000 if PAGE_OFFSET_8000
236 default 0xa0000000 if PAGE_OFFSET_A000
237 choice
238
239 prompt "C-SKY PMU type"
240 depends on PERF_EVENTS
241 depends on CPU_CK807 || CPU_CK810 || C
242
243 config CPU_PMU_NONE
244 bool "None"
245
246 config CSKY_PMU_V1
247 bool "Performance Monitoring Unit Ver.
248
249 endchoice
250
251 choice
252 prompt "Power Manager Instruction (wai
253 default CPU_PM_NONE
254
255 config CPU_PM_NONE
256 bool "None"
257
258 config CPU_PM_WAIT
259 bool "wait"
260
261 config CPU_PM_DOZE
262 bool "doze"
263
264 config CPU_PM_STOP
265 bool "stop"
266 endchoice
267
268 menuconfig HAVE_TCM
269 bool "Tightly-Coupled/Sram Memory"
270 depends on !COMPILE_TEST
271 help
272 The implementation are not only used
273 but also used by sram on SOC bus. It
274 software interface, so that old tcm
275 re-used directly.
276
277 if HAVE_TCM
278 config ITCM_RAM_BASE
279 hex "ITCM ram base"
280 default 0xffffffff
281
282 config ITCM_NR_PAGES
283 int "Page count of ITCM size: NR*4KB"
284 range 1 256
285 default 32
286
287 config HAVE_DTCM
288 bool "DTCM Support"
289
290 config DTCM_RAM_BASE
291 hex "DTCM ram base"
292 depends on HAVE_DTCM
293 default 0xffffffff
294
295 config DTCM_NR_PAGES
296 int "Page count of DTCM size: NR*4KB"
297 depends on HAVE_DTCM
298 range 1 256
299 default 32
300 endif
301
302 config CPU_HAS_VDSP
303 bool "CPU has VDSP coprocessor"
304 depends on CPU_HAS_FPU && CPU_HAS_FPUV
305
306 config CPU_HAS_FPU
307 bool "CPU has FPU coprocessor"
308 depends on CPU_CK807 || CPU_CK810 || C
309
310 config CPU_HAS_ICACHE_INS
311 bool "CPU has Icache invalidate instru
312 depends on CPU_HAS_CACHEV2
313
314 config CPU_HAS_TEE
315 bool "CPU has Trusted Execution Enviro
316 depends on CPU_CK810
317
318 config SMP
319 bool "Symmetric Multi-Processing (SMP)
320 depends on CPU_CK860
321 default n
322
323 config NR_CPUS
324 int "Maximum number of CPUs (2-32)"
325 range 2 32
326 depends on SMP
327 default "4"
328
329 config HIGHMEM
330 bool "High Memory Support"
331 depends on !CPU_CK610
332 select KMAP_LOCAL
333 default y
334
335 config DRAM_BASE
336 hex "DRAM start addr (the same with me
337 default 0x0
338
339 config HOTPLUG_CPU
340 bool "Support for hot-pluggable CPUs"
341 select GENERIC_IRQ_MIGRATION
342 depends on SMP
343 help
344 Say Y here to allow turning CPUs off
345 controlled through /sys/devices/syst
346
347 Say N if you want to disable CPU hot
348
349 config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
350 bool "Enable EFFICIENT_UNALIGNED_STRIN
351 depends on CPU_CK807 || CPU_CK810 || C
352 help
353 Say Y here to enable EFFICIENT_UNALI
354 deal with unaligned access by hardwa
355
356 endmenu
357
358 source "arch/csky/Kconfig.platforms"
359
360 source "kernel/Kconfig.hz"
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