1 /* SPDX-License-Identifier: GPL-2.0 */ !! 1 /*
>> 2 * arch/alpha/kernel/head.S
>> 3 *
>> 4 * initial boot stuff.. At this point, the bootloader has already
>> 5 * switched into OSF/1 PAL-code, and loaded us at the correct address
>> 6 * (START_ADDR). So there isn't much left for us to do: just set up
>> 7 * the kernel global pointer and jump to the kernel entry-point.
>> 8 */
2 9
3 #include <linux/linkage.h> <<
4 #include <linux/init.h> 10 #include <linux/init.h>
5 #include <asm/page.h> !! 11 #include <asm/asm-offsets.h>
6 #include <abi/entry.h> !! 12 #include <asm/pal.h>
>> 13 #include <asm/setup.h>
7 14
8 __HEAD 15 __HEAD
9 ENTRY(_start) !! 16 .globl _stext
10 SETUP_MMU !! 17 .set noreorder
11 !! 18 .globl __start
12 /* set stack point */ !! 19 .ent __start
13 lrw r6, init_thread_union + THREAD !! 20 _stext:
14 mov sp, r6 !! 21 __start:
15 !! 22 .prologue 0
16 jmpi csky_start !! 23 br $27,1f
17 END(_start) !! 24 1: ldgp $29,0($27)
>> 25 /* We need to get current_task_info loaded up... */
>> 26 lda $8,init_thread_union
>> 27 /* ... and find our stack ... */
>> 28 lda $30,0x4000 - SIZEOF_PT_REGS($8)
>> 29 /* ... and then we can start the kernel. */
>> 30 jsr $26,start_kernel
>> 31 call_pal PAL_halt
>> 32 .end __start
18 33
19 #ifdef CONFIG_SMP 34 #ifdef CONFIG_SMP
20 .align 10 !! 35 .align 3
21 ENTRY(_start_smp_secondary) !! 36 .globl __smp_callin
22 SETUP_MMU !! 37 .ent __smp_callin
23 !! 38 /* On entry here from SRM console, the HWPCB of the per-cpu
24 #ifdef CONFIG_PAGE_OFFSET_80000000 !! 39 slot for this processor has been loaded. We've arranged
25 lrw r6, secondary_msa1 !! 40 for the UNIQUE value for this process to contain the PCBB
26 ld.w r6, (r6, 0) !! 41 of the target idle task. */
27 mtcr r6, cr<31, 15> !! 42 __smp_callin:
28 #endif !! 43 .prologue 1
29 !! 44 ldgp $29,0($27) # First order of business, load the GP.
30 lrw r6, secondary_pgd !! 45
31 ld.w r6, (r6, 0) !! 46 call_pal PAL_rduniq # Grab the target PCBB.
32 mtcr r6, cr<28, 15> !! 47 mov $0,$16 # Install it.
33 mtcr r6, cr<29, 15> !! 48 call_pal PAL_swpctx
34 !! 49
35 /* set stack point */ !! 50 lda $8,0x3fff # Find "current".
36 lrw r6, secondary_stack !! 51 bic $30,$8,$8
37 ld.w r6, (r6, 0) !! 52
38 mov sp, r6 !! 53 jsr $26,smp_callin
39 !! 54 call_pal PAL_halt
40 jmpi csky_start_secondary !! 55 .end __smp_callin
41 END(_start_smp_secondary) !! 56 #endif /* CONFIG_SMP */
42 #endif !! 57
>> 58 #
>> 59 # The following two functions are needed for supporting SRM PALcode
>> 60 # on the PC164 (at least), since that PALcode manages the interrupt
>> 61 # masking, and we cannot duplicate the effort without causing problems
>> 62 #
>> 63
>> 64 .align 3
>> 65 .globl cserve_ena
>> 66 .ent cserve_ena
>> 67 cserve_ena:
>> 68 .prologue 0
>> 69 bis $16,$16,$17
>> 70 lda $16,52($31)
>> 71 call_pal PAL_cserve
>> 72 ret ($26)
>> 73 .end cserve_ena
>> 74
>> 75 .align 3
>> 76 .globl cserve_dis
>> 77 .ent cserve_dis
>> 78 cserve_dis:
>> 79 .prologue 0
>> 80 bis $16,$16,$17
>> 81 lda $16,53($31)
>> 82 call_pal PAL_cserve
>> 83 ret ($26)
>> 84 .end cserve_dis
>> 85
>> 86 #
>> 87 # It is handy, on occasion, to make halt actually just loop.
>> 88 # Putting it here means we dont have to recompile the whole
>> 89 # kernel.
>> 90 #
>> 91
>> 92 .align 3
>> 93 .globl halt
>> 94 .ent halt
>> 95 halt:
>> 96 .prologue 0
>> 97 call_pal PAL_halt
>> 98 .end halt
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