1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
>> 2 /*
>> 3 * arch/alpha/kernel/head.S
>> 4 *
>> 5 * initial boot stuff.. At this point, the bootloader has already
>> 6 * switched into OSF/1 PAL-code, and loaded us at the correct address
>> 7 * (START_ADDR). So there isn't much left for us to do: just set up
>> 8 * the kernel global pointer and jump to the kernel entry-point.
>> 9 */
2 10
3 #include <linux/linkage.h> <<
4 #include <linux/init.h> 11 #include <linux/init.h>
5 #include <asm/page.h> !! 12 #include <asm/asm-offsets.h>
6 #include <abi/entry.h> !! 13 #include <asm/pal.h>
>> 14 #include <asm/setup.h>
7 15
8 __HEAD 16 __HEAD
9 ENTRY(_start) !! 17 .globl _stext
10 SETUP_MMU !! 18 .set noreorder
11 !! 19 .globl __start
12 /* set stack point */ !! 20 .ent __start
13 lrw r6, init_thread_union + THREAD !! 21 _stext:
14 mov sp, r6 !! 22 __start:
15 !! 23 .prologue 0
16 jmpi csky_start !! 24 br $27,1f
17 END(_start) !! 25 1: ldgp $29,0($27)
>> 26 /* We need to get current_task_info loaded up... */
>> 27 lda $8,init_thread_union
>> 28 /* ... and find our stack ... */
>> 29 lda $30,0x4000 - SIZEOF_PT_REGS($8)
>> 30 /* ... and then we can start the kernel. */
>> 31 jsr $26,start_kernel
>> 32 call_pal PAL_halt
>> 33 .end __start
18 34
19 #ifdef CONFIG_SMP 35 #ifdef CONFIG_SMP
20 .align 10 !! 36 .align 3
21 ENTRY(_start_smp_secondary) !! 37 .globl __smp_callin
22 SETUP_MMU !! 38 .ent __smp_callin
23 !! 39 /* On entry here from SRM console, the HWPCB of the per-cpu
24 #ifdef CONFIG_PAGE_OFFSET_80000000 !! 40 slot for this processor has been loaded. We've arranged
25 lrw r6, secondary_msa1 !! 41 for the UNIQUE value for this process to contain the PCBB
26 ld.w r6, (r6, 0) !! 42 of the target idle task. */
27 mtcr r6, cr<31, 15> !! 43 __smp_callin:
28 #endif !! 44 .prologue 1
29 !! 45 ldgp $29,0($27) # First order of business, load the GP.
30 lrw r6, secondary_pgd !! 46
31 ld.w r6, (r6, 0) !! 47 call_pal PAL_rduniq # Grab the target PCBB.
32 mtcr r6, cr<28, 15> !! 48 mov $0,$16 # Install it.
33 mtcr r6, cr<29, 15> !! 49 call_pal PAL_swpctx
34 !! 50
35 /* set stack point */ !! 51 lda $8,0x3fff # Find "current".
36 lrw r6, secondary_stack !! 52 bic $30,$8,$8
37 ld.w r6, (r6, 0) !! 53
38 mov sp, r6 !! 54 jsr $26,smp_callin
39 !! 55 call_pal PAL_halt
40 jmpi csky_start_secondary !! 56 .end __smp_callin
41 END(_start_smp_secondary) !! 57 #endif /* CONFIG_SMP */
42 #endif !! 58
>> 59 #
>> 60 # The following two functions are needed for supporting SRM PALcode
>> 61 # on the PC164 (at least), since that PALcode manages the interrupt
>> 62 # masking, and we cannot duplicate the effort without causing problems
>> 63 #
>> 64
>> 65 .align 3
>> 66 .globl cserve_ena
>> 67 .ent cserve_ena
>> 68 cserve_ena:
>> 69 .prologue 0
>> 70 bis $16,$16,$17
>> 71 lda $16,52($31)
>> 72 call_pal PAL_cserve
>> 73 ret ($26)
>> 74 .end cserve_ena
>> 75
>> 76 .align 3
>> 77 .globl cserve_dis
>> 78 .ent cserve_dis
>> 79 cserve_dis:
>> 80 .prologue 0
>> 81 bis $16,$16,$17
>> 82 lda $16,53($31)
>> 83 call_pal PAL_cserve
>> 84 ret ($26)
>> 85 .end cserve_dis
>> 86
>> 87 #
>> 88 # It is handy, on occasion, to make halt actually just loop.
>> 89 # Putting it here means we dont have to recompile the whole
>> 90 # kernel.
>> 91 #
>> 92
>> 93 .align 3
>> 94 .globl halt
>> 95 .ent halt
>> 96 halt:
>> 97 .prologue 0
>> 98 call_pal PAL_halt
>> 99 .end halt
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