1 /* SPDX-License-Identifier: GPL-2.0 */ !! 1 #include <asm-generic/vmlinux.lds.h>
2 2
3 #include <asm/vmlinux.lds.h> !! 3 #undef mips /* CPP really sucks for this job */
4 #include <asm/page.h> !! 4 #define mips mips
5 #include <asm/memory.h> !! 5 OUTPUT_ARCH(mips)
6 !! 6 ENTRY(kernel_entry)
7 OUTPUT_ARCH(csky) !! 7 jiffies = JIFFIES;
8 ENTRY(_start) !! 8 SECTIONS
9 !! 9 {
10 #ifndef __cskyBE__ !! 10 #ifdef CONFIG_BOOT_ELF64
11 jiffies = jiffies_64; !! 11 /* Read-only sections, merged into text segment: */
12 #else !! 12 /* . = 0xc000000000000000; */
13 jiffies = jiffies_64 + 4; !! 13
>> 14 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
>> 15 /* . = 0xc00000000001c000; */
>> 16
>> 17 /* Set the vaddr for the text segment to a value
>> 18 >= 0xa800 0000 0001 9000 if no symmon is going to configured
>> 19 >= 0xa800 0000 0030 0000 otherwise */
>> 20
>> 21 /* . = 0xa800000000300000; */
>> 22 /* . = 0xa800000000300000; */
>> 23 . = 0xffffffff80300000;
14 #endif 24 #endif
>> 25 . = LOADADDR;
>> 26 /* read-only */
>> 27 _text = .; /* Text and read-only data */
>> 28 .text : {
>> 29 *(.text)
>> 30 *(.fixup)
>> 31 *(.gnu.warning)
>> 32 } =0
>> 33
>> 34 _etext = .; /* End of text section */
>> 35
>> 36 . = ALIGN(16); /* Exception table */
>> 37 __start___ex_table = .;
>> 38 __ex_table : { *(__ex_table) }
>> 39 __stop___ex_table = .;
>> 40
>> 41 __start___dbe_table = .; /* Exception table for data bus errors */
>> 42 __dbe_table : { *(__dbe_table) }
>> 43 __stop___dbe_table = .;
>> 44
>> 45 RODATA
>> 46
>> 47 . = ALIGN(64);
>> 48
>> 49 /* writeable */
>> 50 .data : { /* Data */
>> 51 *(.data)
>> 52
>> 53 /* Align the initial ramdisk image (INITRD) on page boundaries. */
>> 54 . = ALIGN(4096);
>> 55 __rd_start = .;
>> 56 *(.initrd)
>> 57 . = ALIGN(4096);
>> 58 __rd_end = .;
>> 59
>> 60 CONSTRUCTORS
>> 61 }
>> 62 _gp = . + 0x8000;
>> 63 .lit8 : { *(.lit8) }
>> 64 .lit4 : { *(.lit4) }
>> 65 /* We want the small data sections together, so single-instruction offsets
>> 66 can access them all, and initialized data all before uninitialized, so
>> 67 we can shorten the on-disk segment size. */
>> 68 .sdata : { *(.sdata) }
>> 69
>> 70 . = ALIGN(4096);
>> 71 __nosave_begin = .;
>> 72 .data_nosave : { *(.data.nosave) }
>> 73 . = ALIGN(4096);
>> 74 __nosave_end = .;
>> 75
>> 76 . = ALIGN(4096);
>> 77 .data.page_aligned : { *(.data.idt) }
15 78
16 #define VBR_BASE \ !! 79 . = ALIGN(32);
17 . = ALIGN(1024); \ !! 80 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
18 vec_base = .; \ <<
19 . += 512; <<
20 81
21 SECTIONS !! 82 _edata = .; /* End of data section */
22 { <<
23 . = PAGE_OFFSET + PHYS_OFFSET_OFFSET; <<
24 83
25 _start = .; !! 84 #ifdef CONFIG_MIPS32
26 HEAD_TEXT_SECTION !! 85 . = ALIGN(8192); /* init_task */
27 . = ALIGN(PAGE_SIZE); <<
28 <<
29 .text : AT(ADDR(.text) - LOAD_OFFSET) <<
30 _text = .; <<
31 _stext = .; <<
32 VBR_BASE <<
33 IRQENTRY_TEXT <<
34 SOFTIRQENTRY_TEXT <<
35 TEXT_TEXT <<
36 SCHED_TEXT <<
37 LOCK_TEXT <<
38 KPROBES_TEXT <<
39 *(.fixup) <<
40 *(.gnu.warning) <<
41 } = 0 <<
42 _etext = .; <<
43 <<
44 /* __init_begin __init_end must be pag <<
45 . = ALIGN(PAGE_SIZE); <<
46 __init_begin = .; <<
47 INIT_TEXT_SECTION(PAGE_SIZE) <<
48 INIT_DATA_SECTION(PAGE_SIZE) <<
49 PERCPU_SECTION(L1_CACHE_BYTES) <<
50 . = ALIGN(PAGE_SIZE); <<
51 __init_end = .; <<
52 <<
53 _sdata = .; <<
54 RO_DATA(PAGE_SIZE) <<
55 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THR <<
56 _edata = .; <<
57 <<
58 #ifdef CONFIG_HAVE_TCM <<
59 .tcm_start : { <<
60 . = ALIGN(PAGE_SIZE); <<
61 __tcm_start = .; <<
62 } <<
63 <<
64 .text_data_tcm FIXADDR_TCM : AT(__tcm_ <<
65 { <<
66 . = ALIGN(4); <<
67 __stcm_text_data = .; <<
68 *(.tcm.text) <<
69 *(.tcm.rodata) <<
70 #ifndef CONFIG_HAVE_DTCM <<
71 *(.tcm.data) <<
72 #endif <<
73 . = ALIGN(4); <<
74 __etcm_text_data = .; <<
75 } <<
76 <<
77 . = ADDR(.tcm_start) + SIZEOF(.tcm_sta <<
78 <<
79 #ifdef CONFIG_HAVE_DTCM <<
80 #define ITCM_SIZE CONFIG_ITCM_NR <<
81 <<
82 .dtcm_start : { <<
83 __dtcm_start = .; <<
84 } <<
85 <<
86 .data_tcm FIXADDR_TCM + ITCM_SIZE : AT <<
87 { <<
88 . = ALIGN(4); <<
89 __stcm_data = .; <<
90 *(.tcm.data) <<
91 . = ALIGN(4); <<
92 __etcm_data = .; <<
93 } <<
94 <<
95 . = ADDR(.dtcm_start) + SIZEOF(.data_t <<
96 <<
97 .tcm_end : AT(ADDR(.dtcm_start) + SIZE <<
98 #else <<
99 .tcm_end : AT(ADDR(.tcm_start) + SIZEO <<
100 #endif 86 #endif
101 . = ALIGN(PAGE_SIZE); !! 87 #ifdef CONFIG_MIPS64
102 __tcm_end = .; !! 88 . = ALIGN(16384); /* init_task */
103 } <<
104 #endif 89 #endif
>> 90 . = . + MAPPED_OFFSET; /* for CONFIG_MAPPED_KERNEL */
>> 91 .data.init_task : { *(.data.init_task) }
105 92
106 EXCEPTION_TABLE(L1_CACHE_BYTES) !! 93 /* will be freed after init */
107 BSS_SECTION(L1_CACHE_BYTES, PAGE_SIZE, !! 94 . = ALIGN(4096); /* Init code and data */
108 _end = . ; !! 95 __init_begin = .;
109 !! 96 /* /DISCARD/ doesn't work for .reginfo */
110 STABS_DEBUG !! 97 .reginfo : { *(.reginfo) }
111 DWARF_DEBUG !! 98 .init.text : {
112 ELF_DETAILS !! 99 _sinittext = .;
113 !! 100 *(.init.text)
114 DISCARDS !! 101 _einittext = .;
>> 102 }
>> 103 .init.data : { *(.init.data) }
>> 104 . = ALIGN(16);
>> 105 __setup_start = .;
>> 106 .init.setup : { *(.init.setup) }
>> 107 __setup_end = .;
>> 108 __start___param = .;
>> 109 __param : { *(__param) }
>> 110 __stop___param = .;
>> 111 __initcall_start = .;
>> 112 .initcall.init : {
>> 113 *(.initcall1.init)
>> 114 *(.initcall2.init)
>> 115 *(.initcall3.init)
>> 116 *(.initcall4.init)
>> 117 *(.initcall5.init)
>> 118 *(.initcall6.init)
>> 119 *(.initcall7.init)
>> 120 }
>> 121 __initcall_end = .;
>> 122 __con_initcall_start = .;
>> 123 .con_initcall.init : { *(.con_initcall.init) }
>> 124 __con_initcall_end = .;
>> 125 SECURITY_INIT
>> 126 . = ALIGN(4096);
>> 127 __initramfs_start = .;
>> 128 .init.ramfs : { *(.init.ramfs) }
>> 129 __initramfs_end = .;
>> 130 . = ALIGN(32);
>> 131 __per_cpu_start = .;
>> 132 .data.percpu : { *(.data.percpu) }
>> 133 __per_cpu_end = .;
>> 134 . = ALIGN(4096);
>> 135 __init_end = .;
>> 136 /* freed after init ends here */
>> 137
>> 138 __bss_start = .; /* BSS */
>> 139 .sbss : {
>> 140 *(.sbss)
>> 141 *(.scommon)
>> 142 }
>> 143 .bss : {
>> 144 *(.bss)
>> 145 *(COMMON)
>> 146 }
>> 147 __bss_stop = .;
>> 148
>> 149 _end = . ;
>> 150
>> 151 /* Sections to be discarded */
>> 152 /DISCARD/ : {
>> 153 *(.exit.text)
>> 154 *(.exit.data)
>> 155 *(.exitcall.exit)
>> 156 }
>> 157
>> 158 /* This is the MIPS specific mdebug section. */
>> 159 .mdebug : { *(.mdebug) }
>> 160 /* These are needed for ELF backends which have not yet been
>> 161 converted to the new style linker. */
>> 162 .stab 0 : { *(.stab) }
>> 163 .stabstr 0 : { *(.stabstr) }
>> 164 /* DWARF debug sections.
>> 165 Symbols in the .debug DWARF section are relative to the beginning of the
>> 166 section so we begin .debug at 0. It's not clear yet what needs to happen
>> 167 for the others. */
>> 168 .debug 0 : { *(.debug) }
>> 169 .debug_srcinfo 0 : { *(.debug_srcinfo) }
>> 170 .debug_aranges 0 : { *(.debug_aranges) }
>> 171 .debug_pubnames 0 : { *(.debug_pubnames) }
>> 172 .debug_sfnames 0 : { *(.debug_sfnames) }
>> 173 .line 0 : { *(.line) }
>> 174 /* These must appear regardless of . */
>> 175 .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
>> 176 .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
>> 177 .comment : { *(.comment) }
>> 178 .note : { *(.note) }
115 } 179 }
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