1 /* SPDX-License-Identifier: GPL-2.0 */ !! 1 #include <asm/asm-offsets.h> >> 2 #include <asm/thread_info.h> 2 3 3 #include <asm/vmlinux.lds.h> !! 4 #define PAGE_SIZE _PAGE_SIZE 4 #include <asm/page.h> << 5 #include <asm/memory.h> << 6 5 7 OUTPUT_ARCH(csky) !! 6 /* 8 ENTRY(_start) !! 7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will 9 !! 8 * ensure that it has .bss alignment (64K). 10 #ifndef __cskyBE__ !! 9 */ 11 jiffies = jiffies_64; !! 10 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir) >> 11 >> 12 #include <asm-generic/vmlinux.lds.h> >> 13 >> 14 #undef mips >> 15 #define mips mips >> 16 OUTPUT_ARCH(mips) >> 17 ENTRY(kernel_entry) >> 18 PHDRS { >> 19 text PT_LOAD FLAGS(7); /* RWX */ >> 20 #ifndef CONFIG_CAVIUM_OCTEON_SOC >> 21 note PT_NOTE FLAGS(4); /* R__ */ >> 22 #endif /* CAVIUM_OCTEON_SOC */ >> 23 } >> 24 >> 25 #ifdef CONFIG_32BIT >> 26 #ifdef CONFIG_CPU_LITTLE_ENDIAN >> 27 jiffies = jiffies_64; >> 28 #else >> 29 jiffies = jiffies_64 + 4; >> 30 #endif 12 #else 31 #else 13 jiffies = jiffies_64 + 4; !! 32 jiffies = jiffies_64; 14 #endif 33 #endif 15 34 16 #define VBR_BASE \ << 17 . = ALIGN(1024); \ << 18 vec_base = .; \ << 19 . += 512; << 20 << 21 SECTIONS 35 SECTIONS 22 { 36 { 23 . = PAGE_OFFSET + PHYS_OFFSET_OFFSET; !! 37 #ifdef CONFIG_BOOT_ELF64 >> 38 /* Read-only sections, merged into text segment: */ >> 39 /* . = 0xc000000000000000; */ >> 40 >> 41 /* This is the value for an Origin kernel, taken from an IRIX kernel. */ >> 42 /* . = 0xc00000000001c000; */ >> 43 >> 44 /* Set the vaddr for the text segment to a value >> 45 * >= 0xa800 0000 0001 9000 if no symmon is going to configured >> 46 * >= 0xa800 0000 0030 0000 otherwise >> 47 */ 24 48 25 _start = .; !! 49 /* . = 0xa800000000300000; */ 26 HEAD_TEXT_SECTION !! 50 . = 0xffffffff80300000; 27 . = ALIGN(PAGE_SIZE); !! 51 #endif 28 !! 52 . = LINKER_LOAD_ADDRESS; 29 .text : AT(ADDR(.text) - LOAD_OFFSET) !! 53 /* read-only */ 30 _text = .; !! 54 _text = .; /* Text and read-only data */ 31 _stext = .; !! 55 .text : { 32 VBR_BASE << 33 IRQENTRY_TEXT << 34 SOFTIRQENTRY_TEXT << 35 TEXT_TEXT 56 TEXT_TEXT 36 SCHED_TEXT 57 SCHED_TEXT >> 58 CPUIDLE_TEXT 37 LOCK_TEXT 59 LOCK_TEXT 38 KPROBES_TEXT 60 KPROBES_TEXT >> 61 IRQENTRY_TEXT >> 62 SOFTIRQENTRY_TEXT >> 63 *(.text.*) 39 *(.fixup) 64 *(.fixup) 40 *(.gnu.warning) 65 *(.gnu.warning) 41 } = 0 !! 66 } :text = 0 42 _etext = .; !! 67 _etext = .; /* End of text section */ 43 << 44 /* __init_begin __init_end must be pag << 45 . = ALIGN(PAGE_SIZE); << 46 __init_begin = .; << 47 INIT_TEXT_SECTION(PAGE_SIZE) << 48 INIT_DATA_SECTION(PAGE_SIZE) << 49 PERCPU_SECTION(L1_CACHE_BYTES) << 50 . = ALIGN(PAGE_SIZE); << 51 __init_end = .; << 52 68 53 _sdata = .; !! 69 EXCEPTION_TABLE(16) 54 RO_DATA(PAGE_SIZE) << 55 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THR << 56 _edata = .; << 57 70 58 #ifdef CONFIG_HAVE_TCM !! 71 /* Exception table for data bus errors */ 59 .tcm_start : { !! 72 __dbe_table : { 60 . = ALIGN(PAGE_SIZE); !! 73 __start___dbe_table = .; 61 __tcm_start = .; !! 74 *(__dbe_table) >> 75 __stop___dbe_table = .; 62 } 76 } 63 77 64 .text_data_tcm FIXADDR_TCM : AT(__tcm_ !! 78 #ifdef CONFIG_CAVIUM_OCTEON_SOC 65 { !! 79 #define NOTES_HEADER 66 . = ALIGN(4); !! 80 #else /* CONFIG_CAVIUM_OCTEON_SOC */ 67 __stcm_text_data = .; !! 81 #define NOTES_HEADER :note 68 *(.tcm.text) !! 82 #endif /* CONFIG_CAVIUM_OCTEON_SOC */ 69 *(.tcm.rodata) !! 83 NOTES :text NOTES_HEADER 70 #ifndef CONFIG_HAVE_DTCM !! 84 .dummy : { *(.dummy) } :text 71 *(.tcm.data) !! 85 72 #endif !! 86 _sdata = .; /* Start of data section */ 73 . = ALIGN(4); !! 87 RODATA 74 __etcm_text_data = .; !! 88 >> 89 /* writeable */ >> 90 .data : { /* Data */ >> 91 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ >> 92 >> 93 INIT_TASK_DATA(THREAD_SIZE) >> 94 NOSAVE_DATA >> 95 PAGE_ALIGNED_DATA(PAGE_SIZE) >> 96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) >> 97 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) >> 98 DATA_DATA >> 99 CONSTRUCTORS >> 100 } >> 101 _gp = . + 0x8000; >> 102 .lit8 : { >> 103 *(.lit8) >> 104 } >> 105 .lit4 : { >> 106 *(.lit4) 75 } 107 } >> 108 /* We want the small data sections together, so single-instruction offsets >> 109 can access them all, and initialized data all before uninitialized, so >> 110 we can shorten the on-disk segment size. */ >> 111 .sdata : { >> 112 *(.sdata) >> 113 } >> 114 _edata = .; /* End of data section */ 76 115 77 . = ADDR(.tcm_start) + SIZEOF(.tcm_sta !! 116 /* will be freed after init */ >> 117 . = ALIGN(PAGE_SIZE); /* Init code and data */ >> 118 __init_begin = .; >> 119 INIT_TEXT_SECTION(PAGE_SIZE) >> 120 INIT_DATA_SECTION(16) 78 121 79 #ifdef CONFIG_HAVE_DTCM !! 122 . = ALIGN(4); 80 #define ITCM_SIZE CONFIG_ITCM_NR !! 123 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { >> 124 __mips_machines_start = .; >> 125 *(.mips.machines.init) >> 126 __mips_machines_end = .; >> 127 } 81 128 82 .dtcm_start : { !! 129 /* .exit.text is discarded at runtime, not link time, to deal with 83 __dtcm_start = .; !! 130 * references from .rodata >> 131 */ >> 132 .exit.text : { >> 133 EXIT_TEXT 84 } 134 } >> 135 .exit.data : { >> 136 EXIT_DATA >> 137 } >> 138 #ifdef CONFIG_SMP >> 139 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT) >> 140 #endif 85 141 86 .data_tcm FIXADDR_TCM + ITCM_SIZE : AT !! 142 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB 87 { !! 143 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) { 88 . = ALIGN(4); !! 144 *(.appended_dtb) 89 __stcm_data = .; !! 145 KEEP(*(.appended_dtb)) 90 *(.tcm.data) << 91 . = ALIGN(4); << 92 __etcm_data = .; << 93 } 146 } >> 147 #endif 94 148 95 . = ADDR(.dtcm_start) + SIZEOF(.data_t !! 149 #ifdef CONFIG_RELOCATABLE >> 150 . = ALIGN(4); 96 151 97 .tcm_end : AT(ADDR(.dtcm_start) + SIZE !! 152 .data.reloc : { 98 #else !! 153 _relocation_start = .; 99 .tcm_end : AT(ADDR(.tcm_start) + SIZEO !! 154 /* 100 #endif !! 155 * Space for relocation table 101 . = ALIGN(PAGE_SIZE); !! 156 * This needs to be filled so that the 102 __tcm_end = .; !! 157 * relocs tool can overwrite the content. >> 158 * An invalid value is left at the start of the >> 159 * section to abort relocation if the table >> 160 * has not been filled in. >> 161 */ >> 162 LONG(0xFFFFFFFF); >> 163 FILL(0); >> 164 . += CONFIG_RELOCATION_TABLE_SIZE - 4; >> 165 _relocation_end = .; 103 } 166 } 104 #endif 167 #endif 105 168 106 EXCEPTION_TABLE(L1_CACHE_BYTES) !! 169 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB 107 BSS_SECTION(L1_CACHE_BYTES, PAGE_SIZE, !! 170 __appended_dtb = .; >> 171 /* leave space for appended DTB */ >> 172 . += 0x100000; >> 173 #endif >> 174 /* >> 175 * Align to 64K in attempt to eliminate holes before the >> 176 * .bss..swapper_pg_dir section at the start of .bss. This >> 177 * also satisfies PAGE_SIZE alignment as the largest page size >> 178 * allowed is 64K. >> 179 */ >> 180 . = ALIGN(0x10000); >> 181 __init_end = .; >> 182 /* freed after init ends here */ >> 183 >> 184 /* >> 185 * Force .bss to 64K alignment so that .bss..swapper_pg_dir >> 186 * gets that alignment. .sbss should be empty, so there will be >> 187 * no holes after __init_end. */ >> 188 BSS_SECTION(0, 0x10000, 8) >> 189 108 _end = . ; 190 _end = . ; 109 191 >> 192 /* These mark the ABI of the kernel for debuggers. */ >> 193 .mdebug.abi32 : { >> 194 KEEP(*(.mdebug.abi32)) >> 195 } >> 196 .mdebug.abi64 : { >> 197 KEEP(*(.mdebug.abi64)) >> 198 } >> 199 >> 200 /* This is the MIPS specific mdebug section. */ >> 201 .mdebug : { >> 202 *(.mdebug) >> 203 } >> 204 110 STABS_DEBUG 205 STABS_DEBUG 111 DWARF_DEBUG 206 DWARF_DEBUG 112 ELF_DETAILS << 113 207 >> 208 /* These must appear regardless of . */ >> 209 .gptab.sdata : { >> 210 *(.gptab.data) >> 211 *(.gptab.sdata) >> 212 } >> 213 .gptab.sbss : { >> 214 *(.gptab.bss) >> 215 *(.gptab.sbss) >> 216 } >> 217 >> 218 /* Sections to be discarded */ 114 DISCARDS 219 DISCARDS >> 220 /DISCARD/ : { >> 221 /* ABI crap starts here */ >> 222 *(.MIPS.abiflags) >> 223 *(.MIPS.options) >> 224 *(.options) >> 225 *(.pdr) >> 226 *(.reginfo) >> 227 *(.eh_frame) >> 228 } 115 } 229 }
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