Linux/arch/hexagon/kernel/head.S

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

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1 /* SPDX-License-Identifier: GPL-2.0-only */ !! 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 2 /* 3 * Early kernel startup code for Hexagon !! 3 * arch/alpha/kernel/head.S 4 * 4 * 5 * Copyright (c) 2010-2013, The Linux Foundati !! 5 * initial boot stuff.. At this point, the bootloader has already >> 6 * switched into OSF/1 PAL-code, and loaded us at the correct address >> 7 * (START_ADDR). So there isn't much left for us to do: just set up >> 8 * the kernel global pointer and jump to the kernel entry-point. 6 */ 9 */ 7 10 8 #include <linux/linkage.h> << 9 #include <linux/init.h> 11 #include <linux/init.h> 10 #include <asm/asm-offsets.h> 12 #include <asm/asm-offsets.h> 11 #include <asm/mem-layout.h> !! 13 #include <asm/pal.h> 12 #include <asm/vm_mmu.h> !! 14 #include <asm/setup.h> 13 #include <asm/page.h> !! 15 14 #include <asm/hexagon_vm.h> !! 16 __HEAD 15 !! 17 .globl _stext 16 #define SEGTABLE_ENTRIES #0x0e0 !! 18 .set noreorder 17 !! 19 .globl __start 18 __INIT !! 20 .ent __start 19 ENTRY(stext) !! 21 _stext: 20 /* !! 22 __start: 21 * VMM will already have set up true v !! 23 .prologue 0 22 * To set up initial kernel identity m !! 24 br $27,1f 23 * the VMM a pointer to some canonical !! 25 1: ldgp $29,0($27) 24 * this implementation, we're assuming !! 26 /* We need to get current_task_info loaded up... */ 25 * them precompiled. Generate value in !! 27 lda $8,init_thread_union 26 * it again shortly. !! 28 /* ... and find our stack ... */ 27 */ !! 29 lda $30,0x4000 - SIZEOF_PT_REGS($8) 28 r24.L = #LO(swapper_pg_dir) !! 30 /* ... and then we can start the kernel. */ 29 r24.H = #HI(swapper_pg_dir) !! 31 jsr $26,start_kernel 30 !! 32 call_pal PAL_halt 31 /* !! 33 .end __start 32 * Symbol is kernel segment address, b !! 34 33 * the logical/physical address. !! 35 #ifdef CONFIG_SMP 34 */ !! 36 .align 3 35 r25 = pc; !! 37 .globl __smp_callin 36 r2.h = #0xffc0; !! 38 .ent __smp_callin 37 r2.l = #0x0000; !! 39 /* On entry here from SRM console, the HWPCB of the per-cpu 38 r25 = and(r2,r25); /* R25 holds !! 40 slot for this processor has been loaded. We've arranged 39 r1.h = #HI(PAGE_OFFSET); !! 41 for the UNIQUE value for this process to contain the PCBB 40 r1.l = #LO(PAGE_OFFSET); !! 42 of the target idle task. */ 41 r24 = sub(r24,r1); /* swapper_pg_ !! 43 __smp_callin: 42 r24 = add(r24,r25); /* + PHYS_OFFS !! 44 .prologue 1 43 !! 45 ldgp $29,0($27) # First order of business, load the GP. 44 r0 = r24; /* aka __pa(swapper_pg_dir) !! 46 45 !! 47 call_pal PAL_rduniq # Grab the target PCBB. 46 /* !! 48 mov $0,$16 # Install it. 47 * Initialize page dir to make the vir !! 49 call_pal PAL_swpctx 48 * addresses where the kernel was load !! 50 49 * Done in 4MB chunks. !! 51 lda $8,0x3fff # Find "current". 50 */ !! 52 bic $30,$8,$8 51 #define PTE_BITS ( __HVM_PTE_R | __HVM_PTE_W | !! 53 52 | __HEXAGON_C_WB_L2 << 6 !! 54 jsr $26,smp_callin 53 | __HVM_PDE_S_4MB) !! 55 call_pal PAL_halt 54 !! 56 .end __smp_callin 55 /* !! 57 #endif /* CONFIG_SMP */ 56 * Get number of VA=PA entries; only r !! 58 57 * to hyperspace; gets blown away imme !! 59 # 58 */ !! 60 # The following two functions are needed for supporting SRM PALcode 59 !! 61 # on the PC164 (at least), since that PALcode manages the interrupt 60 { !! 62 # masking, and we cannot duplicate the effort without causing problems 61 r1.l = #LO(_end); !! 63 # 62 r2.l = #LO(stext); !! 64 63 r3 = #1; !! 65 .align 3 64 } !! 66 .globl cserve_ena 65 { !! 67 .ent cserve_ena 66 r1.h = #HI(_end); !! 68 cserve_ena: 67 r2.h = #HI(stext); !! 69 .prologue 0 68 r3 = asl(r3, #22); !! 70 bis $16,$16,$17 69 } !! 71 lda $16,52($31) 70 { !! 72 call_pal PAL_cserve 71 r1 = sub(r1, r2); !! 73 ret ($26) 72 r3 = add(r3, #-1); !! 74 .end cserve_ena 73 } /* r1 = _end - stext */ !! 75 74 r1 = add(r1, r3); /* + (4M-1) */ !! 76 .align 3 75 r26 = lsr(r1, #22); /* / 4M = # of en !! 77 .globl cserve_dis 76 !! 78 .ent cserve_dis 77 r1 = r25; !! 79 cserve_dis: 78 r2.h = #0xffc0; !! 80 .prologue 0 79 r2.l = #0x0000; /* round back !! 81 bis $16,$16,$17 80 r1 = and(r1,r2); !! 82 lda $16,53($31) 81 r2 = lsr(r1, #22) /* 4MB page nu !! 83 call_pal PAL_cserve 82 r2 = asl(r2, #2) /* times sizeo !! 84 ret ($26) 83 r0 = add(r0,r2) /* r0 = addres !! 85 .end cserve_dis 84 r2 = #PTE_BITS !! 86 85 r1 = add(r1,r2) /* r1 = 4MB PT !! 87 # 86 r2.h = #0x0040 !! 88 # It is handy, on occasion, to make halt actually just loop. 87 r2.l = #0x0000 /* 4MB increme !! 89 # Putting it here means we dont have to recompile the whole 88 loop0(1f,r26); !! 90 # kernel. 89 1: !! 91 # 90 memw(r0 ++ #4) = r1 !! 92 91 { r1 = add(r1, r2); } :endloop0 !! 93 .align 3 92 !! 94 .globl halt 93 /* Also need to overwrite the initial !! 95 .ent halt 94 /* PAGE_OFFSET >> (4MB shift - 4 byte !! 96 halt: 95 R1.H = #HI(PAGE_OFFSET >> (22 - 2)) !! 97 .prologue 0 96 R1.L = #LO(PAGE_OFFSET >> (22 - 2)) !! 98 call_pal PAL_halt 97 !! 99 .end halt 98 r0 = add(r1, r24); /* advance to << 99 r1 = r25; << 100 r2.h = #0xffc0; << 101 r2.l = #0x0000; /* round back << 102 r1 = and(r1,r2); /* for huge pa << 103 r2 = #PTE_BITS << 104 r1 = add(r1,r2); << 105 r2.h = #0x0040 << 106 r2.l = #0x0000 /* 4MB increme << 107 << 108 loop0(1f,SEGTABLE_ENTRIES); << 109 1: << 110 memw(r0 ++ #4) = r1; << 111 { r1 = add(r1,r2); } :endloop0 << 112 << 113 r0 = r24; << 114 << 115 /* << 116 * The subroutine wrapper around the v << 117 * no memory, so we should be able to << 118 * Note that in this version, R1 and R << 119 * vm_ops.S << 120 */ << 121 r1 = #VM_TRANS_TYPE_TABLE << 122 call __vmnewmap; << 123 << 124 /* Jump into virtual address range. << 125 << 126 r31.h = #hi(__head_s_vaddr_target) << 127 r31.l = #lo(__head_s_vaddr_target) << 128 jumpr r31 << 129 << 130 /* Insert trippy space effects. */ << 131 << 132 __head_s_vaddr_target: << 133 /* << 134 * Tear down VA=PA translation now tha << 135 * in kernel virtual space. << 136 */ << 137 r0 = #__HVM_PDE_S_INVALID << 138 << 139 r1.h = #0xffc0; << 140 r1.l = #0x0000; << 141 r2 = r25; /* phys_offset << 142 r2 = and(r1,r2); << 143 << 144 r1.l = #lo(swapper_pg_dir) << 145 r1.h = #hi(swapper_pg_dir) << 146 r2 = lsr(r2, #22) /* 4MB page nu << 147 r2 = asl(r2, #2) /* times sizeo << 148 r1 = add(r1,r2); << 149 loop0(1f,r26) << 150 << 151 1: << 152 { << 153 memw(R1 ++ #4) = R0 << 154 }:endloop0 << 155 << 156 r0 = r24 << 157 r1 = #VM_TRANS_TYPE_TABLE << 158 call __vmnewmap << 159 << 160 /* Go ahead and install the trap0 ret << 161 r0.h = #hi(_K_provisional_vec) << 162 r0.l = #lo(_K_provisional_vec) << 163 call __vmsetvec << 164 << 165 /* << 166 * OK, at this point we should start t << 167 * we're going to enter C code and sta << 168 * in all sorts of places. << 169 * This means: << 170 * SGP needs to be OK << 171 * Need to lock shared resources << 172 * A bunch of other things that w << 173 * all kinds of painful bugs << 174 */ << 175 << 176 /* << 177 * Stack pointer should be pointed at << 178 * thread stack, which should have bee << 179 * So uhhhhh... << 180 * It's accessible via the init_thread << 181 * of a thread_info struct and a stack << 182 * of the stack is not for you. The e << 183 * is simply init_thread_union + THREA << 184 */ << 185 << 186 {r29.H = #HI(init_thread_union); r0.H << 187 {r29.L = #LO(init_thread_union); r0.L << 188 << 189 /* initialize the register used to po << 190 /* Fixme: THREADINFO_REG can't be R2 << 191 {r29 = add(r29,r0); THREADINFO_REG = r << 192 << 193 /* Hack: zero bss; */ << 194 { r0.L = #LO(__bss_start); r1 = #0; r << 195 { r0.H = #HI(__bss_start); r << 196 << 197 r2 = sub(r2,r0); << 198 call memset; << 199 << 200 /* Set PHYS_OFFSET; should be in R25 << 201 #ifdef CONFIG_HEXAGON_PHYS_OFFSET << 202 r0.l = #LO(__phys_offset); << 203 r0.h = #HI(__phys_offset); << 204 memw(r0) = r25; << 205 #endif << 206 << 207 /* Time to make the doughnuts. */ << 208 call start_kernel << 209 << 210 /* << 211 * Should not reach here. << 212 */ << 213 1: << 214 jump 1b << 215 << 216 .p2align PAGE_SHIFT << 217 ENTRY(external_cmdline_buffer) << 218 .fill _PAGE_SIZE,1,0 << 219 << 220 .data << 221 .p2align PAGE_SHIFT << 222 ENTRY(empty_zero_page) << 223 .fill _PAGE_SIZE,1,0 <<

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Linux/arch/hexagon/kernel/head.S

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Differences between /arch/hexagon/kernel/head.S (Version linux-6.12-rc7) and /arch/alpha/kernel/head.S (Version linux-5.16.20)

TOMOYO Linux Cross Reference Linux/arch/hexagon/kernel/head.S

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Differences between /arch/hexagon/kernel/head.S (Version linux-6.12-rc7) and /arch/alpha/kernel/head.S (Version linux-5.16.20)

TOMOYO Linux Cross Reference
Linux/arch/hexagon/kernel/head.S