1 /* SPDX-License-Identifier: GPL-2.0-only */ !! 1 /* SPDX-License-Identifier: GPL-2.0 */ >> 2 #include <asm/asm-offsets.h> >> 3 #include <asm/thread_info.h> >> 4 >> 5 #define PAGE_SIZE _PAGE_SIZE >> 6 2 /* 7 /* 3 * Linker script for Hexagon kernel !! 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will 4 * !! 9 * ensure that it has .bss alignment (64K). 5 * Copyright (c) 2010-2014, The Linux Foundati << 6 */ 10 */ >> 11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir) 7 12 8 #include <asm-generic/vmlinux.lds.h> !! 13 /* Cavium Octeon should not have a separate PT_NOTE Program Header. */ 9 #include <asm/asm-offsets.h> /* Most of th !! 14 #ifndef CONFIG_CAVIUM_OCTEON_SOC 10 #include <asm/mem-layout.h> /* except for !! 15 #define EMITS_PT_NOTE 11 #include <asm/cache.h> /* and now we !! 16 #endif 12 #include <asm/thread_info.h> /* and we nee << 13 << 14 OUTPUT_ARCH(hexagon) << 15 ENTRY(stext) << 16 17 17 jiffies = jiffies_64; !! 18 #define RUNTIME_DISCARD_EXIT 18 19 19 /* !! 20 #include <asm-generic/vmlinux.lds.h> 20 See asm-generic/vmlinux.lds.h for expansion of << 21 See asm-generic/sections.h for seemingly requi << 22 */ << 23 21 24 #define PAGE_SIZE _PAGE_SIZE !! 22 #undef mips >> 23 #define mips mips >> 24 OUTPUT_ARCH(mips) >> 25 ENTRY(kernel_entry) >> 26 PHDRS { >> 27 text PT_LOAD FLAGS(7); /* RWX */ >> 28 #ifndef CONFIG_CAVIUM_OCTEON_SOC >> 29 note PT_NOTE FLAGS(4); /* R__ */ >> 30 #endif /* CAVIUM_OCTEON_SOC */ >> 31 } >> 32 >> 33 #ifdef CONFIG_32BIT >> 34 #ifdef CONFIG_CPU_LITTLE_ENDIAN >> 35 jiffies = jiffies_64; >> 36 #else >> 37 jiffies = jiffies_64 + 4; >> 38 #endif >> 39 #else >> 40 jiffies = jiffies_64; >> 41 #endif 25 42 26 SECTIONS 43 SECTIONS 27 { 44 { 28 . = PAGE_OFFSET; !! 45 #ifdef CONFIG_BOOT_ELF64 29 !! 46 /* Read-only sections, merged into text segment: */ 30 __init_begin = .; !! 47 /* . = 0xc000000000000000; */ 31 HEAD_TEXT_SECTION !! 48 32 INIT_TEXT_SECTION(PAGE_SIZE) !! 49 /* This is the value for an Origin kernel, taken from an IRIX kernel. */ 33 PERCPU_SECTION(L1_CACHE_BYTES) !! 50 /* . = 0xc00000000001c000; */ 34 __init_end = .; !! 51 35 !! 52 /* Set the vaddr for the text segment to a value 36 . = ALIGN(_PAGE_SIZE); !! 53 * >= 0xa800 0000 0001 9000 if no symmon is going to configured 37 _stext = .; !! 54 * >= 0xa800 0000 0030 0000 otherwise 38 .text : AT(ADDR(.text)) { !! 55 */ 39 _text = .; !! 56 >> 57 /* . = 0xa800000000300000; */ >> 58 . = 0xffffffff80300000; >> 59 #endif >> 60 . = LINKER_LOAD_ADDRESS; >> 61 /* read-only */ >> 62 _text = .; /* Text and read-only data */ >> 63 .text : { 40 TEXT_TEXT 64 TEXT_TEXT 41 IRQENTRY_TEXT << 42 SOFTIRQENTRY_TEXT << 43 SCHED_TEXT 65 SCHED_TEXT >> 66 CPUIDLE_TEXT 44 LOCK_TEXT 67 LOCK_TEXT 45 KPROBES_TEXT 68 KPROBES_TEXT >> 69 IRQENTRY_TEXT >> 70 SOFTIRQENTRY_TEXT 46 *(.fixup) 71 *(.fixup) >> 72 *(.gnu.warning) >> 73 . = ALIGN(16); >> 74 *(.got) /* Global offset table */ >> 75 } :text = 0 >> 76 _etext = .; /* End of text section */ >> 77 >> 78 EXCEPTION_TABLE(16) >> 79 >> 80 /* Exception table for data bus errors */ >> 81 __dbe_table : { >> 82 __start___dbe_table = .; >> 83 KEEP(*(__dbe_table)) >> 84 __stop___dbe_table = .; >> 85 } >> 86 >> 87 _sdata = .; /* Start of data section */ >> 88 RO_DATA(4096) >> 89 >> 90 /* writeable */ >> 91 .data : { /* Data */ >> 92 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ >> 93 >> 94 INIT_TASK_DATA(THREAD_SIZE) >> 95 NOSAVE_DATA >> 96 PAGE_ALIGNED_DATA(PAGE_SIZE) >> 97 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) >> 98 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) >> 99 DATA_DATA >> 100 CONSTRUCTORS >> 101 } >> 102 BUG_TABLE >> 103 _gp = . + 0x8000; >> 104 .lit8 : { >> 105 *(.lit8) 47 } 106 } 48 _etext = .; !! 107 .lit4 : { >> 108 *(.lit4) >> 109 } >> 110 /* We want the small data sections together, so single-instruction offsets >> 111 can access them all, and initialized data all before uninitialized, so >> 112 we can shorten the on-disk segment size. */ >> 113 .sdata : { >> 114 *(.sdata) >> 115 } >> 116 _edata = .; /* End of data section */ 49 117 50 INIT_DATA_SECTION(PAGE_SIZE) !! 118 /* will be freed after init */ >> 119 . = ALIGN(PAGE_SIZE); /* Init code and data */ >> 120 __init_begin = .; >> 121 INIT_TEXT_SECTION(PAGE_SIZE) >> 122 INIT_DATA_SECTION(16) 51 123 52 _sdata = .; !! 124 . = ALIGN(4); 53 RW_DATA(32,PAGE_SIZE,_THREAD_S !! 125 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { 54 RO_DATA(PAGE_SIZE) !! 126 __mips_machines_start = .; 55 _edata = .; !! 127 KEEP(*(.mips.machines.init)) >> 128 __mips_machines_end = .; >> 129 } 56 130 57 EXCEPTION_TABLE(16) !! 131 /* .exit.text is discarded at runtime, not link time, to deal with >> 132 * references from .rodata >> 133 */ >> 134 .exit.text : { >> 135 EXIT_TEXT >> 136 } >> 137 .exit.data : { >> 138 EXIT_DATA >> 139 } >> 140 #ifdef CONFIG_SMP >> 141 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT) >> 142 #endif >> 143 >> 144 .rel.dyn : ALIGN(8) { >> 145 *(.rel) >> 146 *(.rel*) >> 147 } >> 148 >> 149 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB >> 150 STRUCT_ALIGN(); >> 151 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) { >> 152 *(.appended_dtb) >> 153 KEEP(*(.appended_dtb)) >> 154 } >> 155 #endif >> 156 >> 157 #ifdef CONFIG_RELOCATABLE >> 158 . = ALIGN(4); 58 159 59 BSS_SECTION(_PAGE_SIZE, _PAGE_SIZE, _P !! 160 .data.reloc : { >> 161 _relocation_start = .; >> 162 /* >> 163 * Space for relocation table >> 164 * This needs to be filled so that the >> 165 * relocs tool can overwrite the content. >> 166 * An invalid value is left at the start of the >> 167 * section to abort relocation if the table >> 168 * has not been filled in. >> 169 */ >> 170 LONG(0xFFFFFFFF); >> 171 FILL(0); >> 172 . += CONFIG_RELOCATION_TABLE_SIZE - 4; >> 173 _relocation_end = .; >> 174 } >> 175 #endif >> 176 >> 177 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB >> 178 .fill : { >> 179 FILL(0); >> 180 BYTE(0); >> 181 STRUCT_ALIGN(); >> 182 } >> 183 __appended_dtb = .; >> 184 /* leave space for appended DTB */ >> 185 . += 0x100000; >> 186 #endif >> 187 /* >> 188 * Align to 64K in attempt to eliminate holes before the >> 189 * .bss..swapper_pg_dir section at the start of .bss. This >> 190 * also satisfies PAGE_SIZE alignment as the largest page size >> 191 * allowed is 64K. >> 192 */ >> 193 . = ALIGN(0x10000); >> 194 __init_end = .; >> 195 /* freed after init ends here */ >> 196 >> 197 /* >> 198 * Force .bss to 64K alignment so that .bss..swapper_pg_dir >> 199 * gets that alignment. .sbss should be empty, so there will be >> 200 * no holes after __init_end. */ >> 201 BSS_SECTION(0, 0x10000, 8) >> 202 >> 203 _end = . ; >> 204 >> 205 /* These mark the ABI of the kernel for debuggers. */ >> 206 .mdebug.abi32 : { >> 207 KEEP(*(.mdebug.abi32)) >> 208 } >> 209 .mdebug.abi64 : { >> 210 KEEP(*(.mdebug.abi64)) >> 211 } 60 212 61 _end = .; !! 213 /* This is the MIPS specific mdebug section. */ >> 214 .mdebug : { >> 215 *(.mdebug) >> 216 } 62 217 63 STABS_DEBUG 218 STABS_DEBUG 64 DWARF_DEBUG 219 DWARF_DEBUG 65 ELF_DETAILS 220 ELF_DETAILS 66 .hexagon.attributes 0 : { *(.hexagon.a << 67 221 >> 222 /* These must appear regardless of . */ >> 223 .gptab.sdata : { >> 224 *(.gptab.data) >> 225 *(.gptab.sdata) >> 226 } >> 227 .gptab.sbss : { >> 228 *(.gptab.bss) >> 229 *(.gptab.sbss) >> 230 } >> 231 >> 232 /* Sections to be discarded */ 68 DISCARDS 233 DISCARDS >> 234 /DISCARD/ : { >> 235 /* ABI crap starts here */ >> 236 *(.MIPS.abiflags) >> 237 *(.MIPS.options) >> 238 *(.gnu.attributes) >> 239 *(.options) >> 240 *(.pdr) >> 241 *(.reginfo) >> 242 } 69 } 243 }
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