1 /* SPDX-License-Identifier: GPL-2.0-only */ !! 1 /* libgcc1 routines for 68000 w/o floating-point hardware.
2 /* !! 2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3 * Copyright (c) 2021, The Linux Foundation. A !! 3
4 */ !! 4 This file is part of GNU CC.
5 !! 5
6 #include <linux/linkage.h> !! 6 GNU CC is free software; you can redistribute it and/or modify it
7 !! 7 under the terms of the GNU General Public License as published by the
8 SYM_FUNC_START(__hexagon_udivsi3) !! 8 Free Software Foundation; either version 2, or (at your option) any
9 { !! 9 later version.
10 r2 = cl0(r0) !! 10
11 r3 = cl0(r1) !! 11 In addition to the permissions in the GNU General Public License, the
12 r5:4 = combine(#1,#0) !! 12 Free Software Foundation gives you unlimited permission to link the
13 p0 = cmp.gtu(r1,r0) !! 13 compiled version of this file with other programs, and to distribute
14 } !! 14 those programs without any restriction coming from the use of this
15 { !! 15 file. (The General Public License restrictions do apply in other
16 r6 = sub(r3,r2) !! 16 respects; for example, they cover modification of the file, and
17 r4 = r1 !! 17 distribution when not linked into another program.)
18 r1:0 = combine(r0,r4) !! 18
19 if (p0) jumpr r31 !! 19 This file is distributed in the hope that it will be useful, but
20 } !! 20 WITHOUT ANY WARRANTY; without even the implied warranty of
21 { !! 21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 r3:2 = vlslw(r5:4,r6) !! 22 General Public License for more details. */
23 loop0(1f,r6) !! 23
24 } !! 24 /* As a special exception, if you link this library with files
25 .falign !! 25 compiled with GCC to produce an executable, this does not cause
26 1: !! 26 the resulting executable to be covered by the GNU General Public License.
27 { !! 27 This exception does not however invalidate any other reasons why
28 p0 = cmp.gtu(r2,r1) !! 28 the executable file might be covered by the GNU General Public License. */
29 if (!p0.new) r1 = sub(r1,r2) !! 29
30 if (!p0.new) r0 = add(r0,r3) !! 30 /* Use this one for any 680x0; assumes no floating point hardware.
31 r3:2 = vlsrw(r3:2,#1) !! 31 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
32 }:endloop0 !! 32 Some of this code comes from MINIX, via the folks at ericsson.
33 { !! 33 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
34 p0 = cmp.gtu(r2,r1) !! 34 */
35 if (!p0.new) r0 = add(r0,r3) !! 35 #include <linux/export.h>
36 jumpr r31 !! 36 /* These are predefined by new versions of GNU cpp. */
37 } !! 37
38 SYM_FUNC_END(__hexagon_udivsi3) !! 38 #ifndef __USER_LABEL_PREFIX__
>> 39 #define __USER_LABEL_PREFIX__ _
>> 40 #endif
>> 41
>> 42 #ifndef __REGISTER_PREFIX__
>> 43 #define __REGISTER_PREFIX__
>> 44 #endif
>> 45
>> 46 #ifndef __IMMEDIATE_PREFIX__
>> 47 #define __IMMEDIATE_PREFIX__ #
>> 48 #endif
>> 49
>> 50 /* ANSI concatenation macros. */
>> 51
>> 52 #define CONCAT1(a, b) CONCAT2(a, b)
>> 53 #define CONCAT2(a, b) a ## b
>> 54
>> 55 /* Use the right prefix for global labels. */
>> 56
>> 57 #define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
>> 58
>> 59 /* Use the right prefix for registers. */
>> 60
>> 61 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
>> 62
>> 63 /* Use the right prefix for immediate values. */
>> 64
>> 65 #define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
>> 66
>> 67 #define d0 REG (d0)
>> 68 #define d1 REG (d1)
>> 69 #define d2 REG (d2)
>> 70 #define d3 REG (d3)
>> 71 #define d4 REG (d4)
>> 72 #define d5 REG (d5)
>> 73 #define d6 REG (d6)
>> 74 #define d7 REG (d7)
>> 75 #define a0 REG (a0)
>> 76 #define a1 REG (a1)
>> 77 #define a2 REG (a2)
>> 78 #define a3 REG (a3)
>> 79 #define a4 REG (a4)
>> 80 #define a5 REG (a5)
>> 81 #define a6 REG (a6)
>> 82 #define fp REG (fp)
>> 83 #define sp REG (sp)
>> 84
>> 85 .text
>> 86 .proc
>> 87 .globl SYM (__udivsi3)
>> 88 SYM (__udivsi3):
>> 89 #if !(defined(__mcf5200__) || defined(__mcoldfire__))
>> 90 movel d2, sp@-
>> 91 movel sp@(12), d1 /* d1 = divisor */
>> 92 movel sp@(8), d0 /* d0 = dividend */
>> 93
>> 94 cmpl IMM (0x10000), d1 /* divisor >= 2 ^ 16 ? */
>> 95 jcc L3 /* then try next algorithm */
>> 96 movel d0, d2
>> 97 clrw d2
>> 98 swap d2
>> 99 divu d1, d2 /* high quotient in lower word */
>> 100 movew d2, d0 /* save high quotient */
>> 101 swap d0
>> 102 movew sp@(10), d2 /* get low dividend + high rest */
>> 103 divu d1, d2 /* low quotient */
>> 104 movew d2, d0
>> 105 jra L6
>> 106
>> 107 L3: movel d1, d2 /* use d2 as divisor backup */
>> 108 L4: lsrl IMM (1), d1 /* shift divisor */
>> 109 lsrl IMM (1), d0 /* shift dividend */
>> 110 cmpl IMM (0x10000), d1 /* still divisor >= 2 ^ 16 ? */
>> 111 jcc L4
>> 112 divu d1, d0 /* now we have 16 bit divisor */
>> 113 andl IMM (0xffff), d0 /* mask out divisor, ignore remainder */
>> 114
>> 115 /* Multiply the 16 bit tentative quotient with the 32 bit divisor. Because of
>> 116 the operand ranges, this might give a 33 bit product. If this product is
>> 117 greater than the dividend, the tentative quotient was too large. */
>> 118 movel d2, d1
>> 119 mulu d0, d1 /* low part, 32 bits */
>> 120 swap d2
>> 121 mulu d0, d2 /* high part, at most 17 bits */
>> 122 swap d2 /* align high part with low part */
>> 123 tstw d2 /* high part 17 bits? */
>> 124 jne L5 /* if 17 bits, quotient was too large */
>> 125 addl d2, d1 /* add parts */
>> 126 jcs L5 /* if sum is 33 bits, quotient was too large */
>> 127 cmpl sp@(8), d1 /* compare the sum with the dividend */
>> 128 jls L6 /* if sum > dividend, quotient was too large */
>> 129 L5: subql IMM (1), d0 /* adjust quotient */
>> 130
>> 131 L6: movel sp@+, d2
>> 132 rts
>> 133
>> 134 #else /* __mcf5200__ || __mcoldfire__ */
>> 135
>> 136 /* Coldfire implementation of non-restoring division algorithm from
>> 137 Hennessy & Patterson, Appendix A. */
>> 138 link a6,IMM (-12)
>> 139 moveml d2-d4,sp@
>> 140 movel a6@(8),d0
>> 141 movel a6@(12),d1
>> 142 clrl d2 | clear p
>> 143 moveq IMM (31),d4
>> 144 L1: addl d0,d0 | shift reg pair (p,a) one bit left
>> 145 addxl d2,d2
>> 146 movl d2,d3 | subtract b from p, store in tmp.
>> 147 subl d1,d3
>> 148 jcs L2 | if no carry,
>> 149 bset IMM (0),d0 | set the low order bit of a to 1,
>> 150 movl d3,d2 | and store tmp in p.
>> 151 L2: subql IMM (1),d4
>> 152 jcc L1
>> 153 moveml sp@,d2-d4 | restore data registers
>> 154 unlk a6 | and return
>> 155 rts
>> 156 #endif /* __mcf5200__ || __mcoldfire__ */
>> 157 EXPORT_SYMBOL(__udivsi3)
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