1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2023 Loongson Technology Corp
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/interrupt-controller/irq
9 #include <dt-bindings/clock/loongson,ls2k-clk.
10
11 / {
12 #address-cells = <2>;
13 #size-cells = <2>;
14
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu0: cpu@0 {
20 compatible = "loongson
21 device_type = "cpu";
22 reg = <0x0>;
23 clocks = <&clk LOONGSO
24 };
25 };
26
27 ref_100m: clock-ref-100m {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <100000000>;
31 clock-output-names = "ref_100m
32 };
33
34 cpuintc: interrupt-controller {
35 compatible = "loongson,cpu-int
36 #interrupt-cells = <1>;
37 interrupt-controller;
38 };
39
40 thermal-zones {
41 cpu-thermal {
42 polling-delay-passive
43 polling-delay = <5000>
44 thermal-sensors = <&ts
45
46 trips {
47 cpu-alert {
48 temper
49 hyster
50 type =
51 };
52
53 cpu-crit {
54 temper
55 hyster
56 type =
57 };
58 };
59 };
60 };
61
62 bus@10000000 {
63 compatible = "simple-bus";
64 ranges = <0x0 0x10000000 0x0 0
65 <0x0 0x02000000 0x0 0
66 <0x0 0x20000000 0x0 0
67 <0x0 0x40000000 0x0 0
68 <0xfe 0x0 0xfe 0x0 0x
69 #address-cells = <2>;
70 #size-cells = <2>;
71
72 isa@16400000 {
73 compatible = "isa";
74 #size-cells = <1>;
75 #address-cells = <2>;
76 ranges = <1 0x0 0x0 0x
77 };
78
79 clk: clock-controller@1fe10400
80 compatible = "loongson
81 reg = <0x0 0x1fe10400
82 #clock-cells = <1>;
83 clocks = <&ref_100m>;
84 clock-names = "ref_100
85 };
86
87 dma-controller@1fe10c00 {
88 compatible = "loongson
89 reg = <0 0x1fe10c00 0
90 interrupt-parent = <&e
91 interrupts = <67>;
92 clocks = <&clk LOONGSO
93 #dma-cells = <1>;
94 status = "disabled";
95 };
96
97 dma-controller@1fe10c10 {
98 compatible = "loongson
99 reg = <0 0x1fe10c10 0
100 interrupt-parent = <&e
101 interrupts = <68>;
102 clocks = <&clk LOONGSO
103 #dma-cells = <1>;
104 status = "disabled";
105 };
106
107 dma-controller@1fe10c20 {
108 compatible = "loongson
109 reg = <0 0x1fe10c20 0
110 interrupt-parent = <&e
111 interrupts = <69>;
112 clocks = <&clk LOONGSO
113 #dma-cells = <1>;
114 status = "disabled";
115 };
116
117 dma-controller@1fe10c30 {
118 compatible = "loongson
119 reg = <0 0x1fe10c30 0
120 interrupt-parent = <&e
121 interrupts = <70>;
122 clocks = <&clk LOONGSO
123 #dma-cells = <1>;
124 status = "disabled";
125 };
126
127 liointc0: interrupt-controller
128 compatible = "loongson
129 reg = <0x0 0x1fe11400
130 <0x0 0x1fe11040
131 reg-names = "main", "i
132
133 interrupt-controller;
134 #interrupt-cells = <2>
135 interrupt-parent = <&c
136 interrupts = <2>;
137 interrupt-names = "int
138
139 loongson,parent_int_ma
140
141
142
143 };
144
145 liointc1: interrupt-controller
146 compatible = "loongson
147 reg = <0x0 0x1fe11440
148 <0x0 0x1fe11048
149 reg-names = "main", "i
150
151 interrupt-controller;
152 #interrupt-cells = <2>
153 interrupt-parent = <&c
154 interrupts = <4>;
155 interrupt-names = "int
156
157 loongson,parent_int_ma
158
159
160
161 };
162
163 eiointc: interrupt-controller@
164 compatible = "loongson
165 reg = <0x0 0x1fe11600
166 interrupt-controller;
167 #interrupt-cells = <1>
168 interrupt-parent = <&c
169 interrupts = <3>;
170 };
171
172 gmac0: ethernet@1f020000 {
173 compatible = "snps,dwm
174 reg = <0x0 0x1f020000
175 interrupt-parent = <&l
176 interrupts = <12 IRQ_T
177 interrupt-names = "mac
178 status = "disabled";
179 };
180
181 gmac1: ethernet@1f030000 {
182 compatible = "snps,dwm
183 reg = <0x0 0x1f030000
184 interrupt-parent = <&l
185 interrupts = <14 IRQ_T
186 interrupt-names = "mac
187 status = "disabled";
188 };
189
190 sata: sata@1f040000 {
191 compatible = "snps,spe
192 reg = <0x0 0x1f040000
193 interrupt-parent = <&e
194 interrupts = <75>;
195 status = "disabled";
196 };
197
198 ehci0: usb@1f050000 {
199 compatible = "generic-
200 reg = <0x0 0x1f050000
201 interrupt-parent = <&e
202 interrupts = <71>;
203 status = "disabled";
204 };
205
206 ohci0: usb@1f058000 {
207 compatible = "generic-
208 reg = <0x0 0x1f058000
209 interrupt-parent = <&e
210 interrupts = <72>;
211 status = "disabled";
212 };
213
214 tsensor: thermal-sensor@1fe115
215 compatible = "loongson
216 reg = <0x0 0x1fe11500
217 interrupt-parent = <&l
218 interrupts = <7 IRQ_TY
219 #thermal-sensor-cells
220 };
221
222 uart0: serial@1ff40800 {
223 compatible = "ns16550a
224 reg = <0x0 0x1ff40800
225 clock-frequency = <100
226 interrupt-parent = <&e
227 interrupts = <2>;
228 no-loopback-test;
229 status = "disabled";
230 };
231
232 i2c0: i2c@1ff48000 {
233 compatible = "loongson
234 reg = <0x0 0x1ff48000
235 interrupt-parent = <&e
236 interrupts = <14>;
237 status = "disabled";
238 };
239
240 i2c@1ff48800 {
241 compatible = "loongson
242 reg = <0x0 0x1ff48800
243 interrupt-parent = <&e
244 interrupts = <15>;
245 status = "disabled";
246 };
247
248 i2c@1ff49000 {
249 compatible = "loongson
250 reg = <0x0 0x1ff49000
251 interrupt-parent = <&e
252 interrupts = <16>;
253 status = "disabled";
254 };
255
256 i2c@1ff49800 {
257 compatible = "loongson
258 reg = <0x0 0x1ff49800
259 interrupt-parent = <&e
260 interrupts = <17>;
261 status = "disabled";
262 };
263
264 i2c@1ff4a000 {
265 compatible = "loongson
266 reg = <0x0 0x1ff4a000
267 interrupt-parent = <&e
268 interrupts = <18>;
269 status = "disabled";
270 };
271
272 i2c@1ff4a800 {
273 compatible = "loongson
274 reg = <0x0 0x1ff4a800
275 interrupt-parent = <&e
276 interrupts = <19>;
277 status = "disabled";
278 };
279
280 pmc: power-management@1ff6c000
281 compatible = "loongson
282 reg = <0x0 0x1ff6c000
283 interrupt-parent = <&e
284 interrupts = <56>;
285 loongson,suspend-addre
286
287 syscon-reboot {
288 compatible = "
289 offset = <0x30
290 mask = <0x1>;
291 };
292
293 syscon-poweroff {
294 compatible = "
295 regmap = <&pmc
296 offset = <0x14
297 mask = <0x3c00
298 value = <0x3c0
299 };
300 };
301
302 rtc0: rtc@1ff6c100 {
303 compatible = "loongson
304 reg = <0x0 0x1ff6c100
305 interrupt-parent = <&e
306 interrupts = <35>;
307 status = "disabled";
308 };
309
310 pcie@1a000000 {
311 compatible = "loongson
312 reg = <0x0 0x1a000000
313 <0xfe 0x0 0x0 0x
314 #address-cells = <3>;
315 #size-cells = <2>;
316 device_type = "pci";
317 bus-range = <0x0 0x5>;
318 ranges = <0x01000000 0
319 <0x02000000 0
320
321 pcie@0,0 {
322 reg = <0x0000
323 #address-cells
324 #size-cells =
325 device_type =
326 interrupt-pare
327 #interrupt-cel
328 interrupt-map-
329 interrupt-map
330 ranges;
331 };
332
333 pcie@1,0 {
334 reg = <0x0800
335 #address-cells
336 #size-cells =
337 device_type =
338 interrupt-pare
339 #interrupt-cel
340 interrupt-map-
341 interrupt-map
342 ranges;
343 };
344 };
345 };
346 };
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