1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2023 Loongson Technology Corp
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/interrupt-controller/irq
9 #include <dt-bindings/clock/loongson,ls2k-clk.
10 #include <dt-bindings/gpio/gpio.h>
11
12 / {
13 #address-cells = <2>;
14 #size-cells = <2>;
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 cpu0: cpu@0 {
21 compatible = "loongson
22 device_type = "cpu";
23 reg= <0x0>;
24 clocks = <&clk LOONGSO
25 };
26
27 cpu1: cpu@1 {
28 compatible = "loongson
29 device_type = "cpu";
30 reg = <0x1>;
31 clocks = <&clk LOONGSO
32 };
33 };
34
35 ref_100m: clock-ref-100m {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <100000000>;
39 clock-output-names = "ref_100m
40 };
41
42 cpuintc: interrupt-controller {
43 compatible = "loongson,cpu-int
44 #interrupt-cells = <1>;
45 interrupt-controller;
46 };
47
48 /* i2c of the dvi eeprom edid */
49 i2c-gpio-0 {
50 compatible = "i2c-gpio";
51 scl-gpios = <&gpio0 0 (GPIO_AC
52 sda-gpios = <&gpio0 1 (GPIO_AC
53 i2c-gpio,delay-us = <5>;
54 #address-cells = <1>;
55 #size-cells = <0>;
56 status = "disabled";
57 };
58
59 /* i2c of the eeprom edid */
60 i2c-gpio-1 {
61 compatible = "i2c-gpio";
62 scl-gpios = <&gpio0 33 (GPIO_A
63 sda-gpios = <&gpio0 32 (GPIO_A
64 i2c-gpio,delay-us = <5>;
65 #address-cells = <1>;
66 #size-cells = <0>;
67 status = "disabled";
68 };
69
70 thermal-zones {
71 cpu-thermal {
72 polling-delay-passive
73 polling-delay = <5000>
74 thermal-sensors = <&ts
75
76 trips {
77 cpu_alert: cpu
78 temper
79 hyster
80 type =
81 };
82
83 cpu_crit: cpu-
84 temper
85 hyster
86 type =
87 };
88 };
89 };
90 };
91
92 bus@10000000 {
93 compatible = "simple-bus";
94 ranges = <0x0 0x10000000 0x0 0
95 <0x0 0x02000000 0x0 0
96 <0x0 0x20000000 0x0 0
97 <0x0 0x40000000 0x0 0
98 <0xfe 0x0 0xfe 0x0 0x
99 #address-cells = <2>;
100 #size-cells = <2>;
101 dma-coherent;
102
103 isa@18000000 {
104 compatible = "isa";
105 #size-cells = <1>;
106 #address-cells = <2>;
107 ranges = <1 0x0 0x0 0x
108 };
109
110 liointc0: interrupt-controller
111 compatible = "loongson
112 reg = <0x0 0x1fe01400
113 <0x0 0x1fe01040
114 <0x0 0x1fe01140
115 reg-names = "main", "i
116 interrupt-controller;
117 #interrupt-cells = <2>
118 interrupt-parent = <&c
119 interrupts = <2>;
120 interrupt-names = "int
121 loongson,parent_int_ma
122
123
124
125 };
126
127 liointc1: interrupt-controller
128 compatible = "loongson
129 reg = <0x0 0x1fe01440
130 <0x0 0x1fe01048
131 <0x0 0x1fe01148
132 reg-names = "main", "i
133 interrupt-controller;
134 #interrupt-cells = <2>
135 interrupt-parent = <&c
136 interrupts = <3>;
137 interrupt-names = "int
138 loongson,parent_int_ma
139
140
141
142 };
143
144 chipid@1fe00000 {
145 compatible = "loongson
146 reg = <0x0 0x1fe00000
147 little-endian;
148 };
149
150 pctrl: pinctrl@1fe00420 {
151 compatible = "loongson
152 reg = <0x0 0x1fe00420
153 status = "disabled";
154 };
155
156 clk: clock-controller@1fe00480
157 compatible = "loongson
158 reg = <0x0 0x1fe00480
159 #clock-cells = <1>;
160 clocks = <&ref_100m>;
161 clock-names = "ref_100
162 };
163
164 gpio0: gpio@1fe00500 {
165 compatible = "loongson
166 reg = <0x0 0x1fe00500
167 ngpios = <64>;
168 #gpio-cells = <2>;
169 gpio-controller;
170 gpio-ranges = <&pctrl
171 <&pctrl
172 <&pctrl
173 <&pctrl
174 interrupt-parent = <&l
175 interrupts = <28 IRQ_T
176 <29 IRQ_T
177 <30 IRQ_T
178 <30 IRQ_T
179 <26 IRQ_T
180 <26 IRQ_T
181 <26 IRQ_T
182 <26 IRQ_T
183 <26 IRQ_T
184 <26 IRQ_T
185 <26 IRQ_T
186 <26 IRQ_T
187 <26 IRQ_T
188 <26 IRQ_T
189 <26 IRQ_T
190 <>,
191 <26 IRQ_T
192 <26 IRQ_T
193 <26 IRQ_T
194 <26 IRQ_T
195 <26 IRQ_T
196 <26 IRQ_T
197 <26 IRQ_T
198 <26 IRQ_T
199 <26 IRQ_T
200 <26 IRQ_T
201 <26 IRQ_T
202 <26 IRQ_T
203 <26 IRQ_T
204 <26 IRQ_T
205 <26 IRQ_T
206 <26 IRQ_T
207 <27 IRQ_T
208 <27 IRQ_T
209 <27 IRQ_T
210 <27 IRQ_T
211 <27 IRQ_T
212 <>,
213 <27 IRQ_T
214 <27 IRQ_T
215 <27 IRQ_T
216 <27 IRQ_T
217 <>,
218 <>,
219 <27 IRQ_T
220 <27 IRQ_T
221 <27 IRQ_T
222 <27 IRQ_T
223 <27 IRQ_T
224 <27 IRQ_T
225 <27 IRQ_T
226 <27 IRQ_T
227 <27 IRQ_T
228 <27 IRQ_T
229 <27 IRQ_T
230 <27 IRQ_T
231 <27 IRQ_T
232 <27 IRQ_T
233 <27 IRQ_T
234 <27 IRQ_T
235 <27 IRQ_T
236 <27 IRQ_T
237 <27 IRQ_T
238 <27 IRQ_T
239 };
240
241 tsensor: thermal-sensor@1fe015
242 compatible = "loongson
243 reg = <0x0 0x1fe01500
244 interrupt-parent = <&l
245 interrupts = <7 IRQ_TY
246 #thermal-sensor-cells
247 };
248
249 dma-controller@1fe00c00 {
250 compatible = "loongson
251 reg = <0x0 0x1fe00c00
252 interrupt-parent = <&l
253 interrupts = <12 IRQ_T
254 clocks = <&clk LOONGSO
255 #dma-cells = <1>;
256 status = "disabled";
257 };
258
259 dma-controller@1fe00c10 {
260 compatible = "loongson
261 reg = <0x0 0x1fe00c10
262 interrupt-parent = <&l
263 interrupts = <13 IRQ_T
264 clocks = <&clk LOONGSO
265 #dma-cells = <1>;
266 status = "disabled";
267 };
268
269 dma-controller@1fe00c20 {
270 compatible = "loongson
271 reg = <0x0 0x1fe00c20
272 interrupt-parent = <&l
273 interrupts = <14 IRQ_T
274 clocks = <&clk LOONGSO
275 #dma-cells = <1>;
276 status = "disabled";
277 };
278
279 dma-controller@1fe00c30 {
280 compatible = "loongson
281 reg = <0x0 0x1fe00c30
282 interrupt-parent = <&l
283 interrupts = <15 IRQ_T
284 clocks = <&clk LOONGSO
285 #dma-cells = <1>;
286 status = "disabled";
287 };
288
289 dma-controller@1fe00c40 {
290 compatible = "loongson
291 reg = <0x0 0x1fe00c40
292 interrupt-parent = <&l
293 interrupts = <16 IRQ_T
294 clocks = <&clk LOONGSO
295 #dma-cells = <1>;
296 status = "disabled";
297 };
298
299 uart0: serial@1fe20000 {
300 compatible = "ns16550a
301 reg = <0x0 0x1fe20000
302 clock-frequency = <125
303 interrupt-parent = <&l
304 interrupts = <0x0 IRQ_
305 no-loopback-test;
306 status = "disabled";
307 };
308
309 i2c2: i2c@1fe21000 {
310 compatible = "loongson
311 reg = <0x0 0x1fe21000
312 interrupt-parent = <&l
313 interrupts = <22 IRQ_T
314 status = "disabled";
315 };
316
317 i2c3: i2c@1fe21800 {
318 compatible = "loongson
319 reg = <0x0 0x1fe21800
320 interrupt-parent = <&l
321 interrupts = <23 IRQ_T
322 status = "disabled";
323 };
324
325 pmc: power-management@1fe27000
326 compatible = "loongson
327 reg = <0x0 0x1fe27000
328 interrupt-parent = <&l
329 interrupts = <11 IRQ_T
330 loongson,suspend-addre
331
332 syscon-reboot {
333 compatible = "
334 offset = <0x30
335 mask = <0x1>;
336 };
337
338 syscon-poweroff {
339 compatible = "
340 regmap = <&pmc
341 offset = <0x14
342 mask = <0x3c00
343 value = <0x3c0
344 };
345 };
346
347 rtc0: rtc@1fe27800 {
348 compatible = "loongson
349 reg = <0x0 0x1fe27800
350 interrupt-parent = <&l
351 interrupts = <8 IRQ_TY
352 status = "disabled";
353 };
354
355 spi0: spi@1fff0220 {
356 compatible = "loongson
357 reg = <0x0 0x1fff0220
358 clocks = <&clk LOONGSO
359 status = "disabled";
360 };
361
362 pcie@1a000000 {
363 compatible = "loongson
364 reg = <0x0 0x1a000000
365 <0xfe 0x0 0x0 0x
366 #address-cells = <3>;
367 #size-cells = <2>;
368 device_type = "pci";
369 bus-range = <0x0 0xff>
370 ranges = <0x01000000 0
371 <0x02000000 0
372
373 gmac0: ethernet@3,0 {
374 reg = <0x1800
375 interrupt-pare
376 interrupts = <
377 <
378 interrupt-name
379 status = "disa
380 };
381
382 gmac1: ethernet@3,1 {
383 reg = <0x1900
384 interrupt-pare
385 interrupts = <
386 <
387 interrupt-name
388 status = "disa
389 };
390
391 ehci0: usb@4,1 {
392 reg = <0x2100
393 interrupt-pare
394 interrupts = <
395 status = "disa
396 };
397
398 ohci0: usb@4,2 {
399 reg = <0x2200
400 interrupt-pare
401 interrupts = <
402 status = "disa
403 };
404
405 display@6,0 {
406 reg = <0x3000
407 interrupt-pare
408 interrupts = <
409 status = "disa
410 };
411
412 hda@7,0 {
413 reg = <0x3800
414 interrupt-pare
415 interrupts = <
416 status = "disa
417 };
418
419 sata: sata@8,0 {
420 reg = <0x4000
421 interrupt-pare
422 interrupts = <
423 status = "disa
424 };
425
426 pcie@9,0 {
427 reg = <0x4800
428 #address-cells
429 #size-cells =
430 device_type =
431 #interrupt-cel
432 interrupt-map-
433 interrupt-map
434 ranges;
435 };
436
437 pcie@a,0 {
438 reg = <0x5000
439 #address-cells
440 #size-cells =
441 device_type =
442 interrupt-pare
443 #interrupt-cel
444 interrupt-map-
445 interrupt-map
446 ranges;
447 };
448
449 pcie@b,0 {
450 reg = <0x5800
451 #address-cells
452 #size-cells =
453 device_type =
454 interrupt-pare
455 #interrupt-cel
456 interrupt-map-
457 interrupt-map
458 ranges;
459 };
460
461 pcie@c,0 {
462 reg = <0x6000
463 #address-cells
464 #size-cells =
465 device_type =
466 interrupt-pare
467 #interrupt-cel
468 interrupt-map-
469 interrupt-map
470 ranges;
471 };
472
473 pcie@d,0 {
474 reg = <0x6800
475 #address-cells
476 #size-cells =
477 device_type =
478 interrupt-pare
479 #interrupt-cel
480 interrupt-map-
481 interrupt-map
482 ranges;
483 };
484
485 pcie@e,0 {
486 reg = <0x7000
487 #address-cells
488 #size-cells =
489 device_type =
490 interrupt-pare
491 #interrupt-cel
492 interrupt-map-
493 interrupt-map
494 ranges;
495 };
496 };
497 };
498 };
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