1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2023 Loongson Technology Corp
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/interrupt-controller/irq
9 #include <dt-bindings/clock/loongson,ls2k-clk.
10
11 / {
12 #address-cells = <2>;
13 #size-cells = <2>;
14
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu0: cpu@1 {
20 compatible = "loongson
21 device_type = "cpu";
22 reg = <0x0>;
23 clocks = <&clk LOONGSO
24 };
25
26 cpu1: cpu@2 {
27 compatible = "loongson
28 device_type = "cpu";
29 reg = <0x1>;
30 clocks = <&clk LOONGSO
31 };
32 };
33
34 ref_100m: clock-ref-100m {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <100000000>;
38 clock-output-names = "ref_100m
39 };
40
41 cpuintc: interrupt-controller {
42 compatible = "loongson,cpu-int
43 #interrupt-cells = <1>;
44 interrupt-controller;
45 };
46
47 thermal-zones {
48 cpu-thermal {
49 polling-delay-passive
50 polling-delay = <5000>
51 thermal-sensors = <&ts
52
53 trips {
54 cpu-alert {
55 temper
56 hyster
57 type =
58 };
59
60 cpu-crit {
61 temper
62 hyster
63 type =
64 };
65 };
66 };
67 };
68
69 bus@10000000 {
70 compatible = "simple-bus";
71 ranges = <0x0 0x10000000 0x0 0
72 <0x0 0x02000000 0x0 0
73 <0x0 0x40000000 0x0 0
74 <0xfe 0x0 0xfe 0x0 0x
75 #address-cells = <2>;
76 #size-cells = <2>;
77
78 isa@18400000 {
79 compatible = "isa";
80 #size-cells = <1>;
81 #address-cells = <2>;
82 ranges = <1 0x0 0x0 0x
83 };
84
85 clk: clock-controller@10010480
86 compatible = "loongson
87 reg = <0x0 0x10010480
88 #clock-cells = <1>;
89 clocks = <&ref_100m>;
90 clock-names = "ref_100
91 };
92
93 pmc: power-management@100d0000
94 compatible = "loongson
95 reg = <0x0 0x100d0000
96 interrupt-parent = <&e
97 interrupts = <47>;
98 loongson,suspend-addre
99
100 syscon-reboot {
101 compatible = "
102 offset = <0x30
103 mask = <0x1>;
104 };
105
106 syscon-poweroff {
107 compatible = "
108 regmap = <&pmc
109 offset = <0x14
110 mask = <0x3c00
111 value = <0x3c0
112 };
113 };
114
115 tsensor: thermal-sensor@1fe014
116 compatible = "loongson
117 reg = <0x0 0x1fe01460
118 <0x0 0x1fe0019c
119 interrupt-parent = <&l
120 interrupts = <7 IRQ_TY
121 #thermal-sensor-cells
122 };
123
124 liointc: interrupt-controller@
125 compatible = "loongson
126 reg = <0x0 0x1fe01400
127
128 interrupt-controller;
129 #interrupt-cells = <2>
130 interrupt-parent = <&c
131 interrupts = <2>;
132 interrupt-names = "int
133 loongson,parent_int_ma
134
135
136
137 };
138
139 eiointc: interrupt-controller@
140 compatible = "loongson
141 reg = <0x0 0x1fe01600
142 interrupt-controller;
143 #interrupt-cells = <1>
144 interrupt-parent = <&c
145 interrupts = <3>;
146 };
147
148 pic: interrupt-controller@1000
149 compatible = "loongson
150 reg = <0x0 0x10000000
151 interrupt-controller;
152 #interrupt-cells = <2>
153 loongson,pic-base-vec
154 interrupt-parent = <&e
155 };
156
157 msi: msi-controller@1fe01140 {
158 compatible = "loongson
159 reg = <0x0 0x1fe01140
160 interrupt-controller;
161 #interrupt-cells = <1>
162 msi-controller;
163 loongson,msi-base-vec
164 loongson,msi-num-vecs
165 interrupt-parent = <&e
166 };
167
168 rtc0: rtc@100d0100 {
169 compatible = "loongson
170 reg = <0x0 0x100d0100
171 interrupt-parent = <&p
172 interrupts = <52 IRQ_T
173 status = "disabled";
174 };
175
176 uart0: serial@1fe001e0 {
177 compatible = "ns16550a
178 reg = <0x0 0x1fe001e0
179 clock-frequency = <100
180 interrupt-parent = <&l
181 interrupts = <10 IRQ_T
182 no-loopback-test;
183 status = "disabled";
184 };
185
186 pcie@1a000000 {
187 compatible = "loongson
188 reg = <0x0 0x1a000000
189 <0xfe 0x0 0x0 0x
190 #address-cells = <3>;
191 #size-cells = <2>;
192 device_type = "pci";
193 msi-parent = <&msi>;
194 bus-range = <0x0 0xff>
195 ranges = <0x01000000 0
196 <0x02000000 0
197
198 gmac0: ethernet@3,0 {
199 reg = <0x1800
200 interrupts = <
201 <
202 interrupt-name
203 interrupt-pare
204 status = "disa
205 };
206
207 gmac1: ethernet@3,1 {
208 reg = <0x1900
209 interrupts = <
210 <
211 interrupt-name
212 interrupt-pare
213 status = "disa
214 };
215
216 gmac2: ethernet@3,2 {
217 reg = <0x1a00
218 interrupts = <
219 <
220 interrupt-name
221 interrupt-pare
222 status = "disa
223 };
224
225 xhci0: usb@4,0 {
226 reg = <0x2000
227 interrupts = <
228 interrupt-pare
229 status = "disa
230 };
231
232 xhci1: usb@19,0 {
233 reg = <0xc800
234 interrupts = <
235 interrupt-pare
236 status = "disa
237 };
238
239 display@6,1 {
240 reg = <0x3100
241 interrupts = <
242 interrupt-pare
243 status = "disa
244 };
245
246 hda@7,0 {
247 reg = <0x3800
248 interrupts = <
249 interrupt-pare
250 status = "disa
251 };
252
253 sata: sata@8,0 {
254 reg = <0x4000
255 interrupts = <
256 interrupt-pare
257 status = "disa
258 };
259
260 pcie@9,0 {
261 reg = <0x4800
262 #address-cells
263 #size-cells =
264 device_type =
265 interrupt-pare
266 #interrupt-cel
267 interrupt-map-
268 interrupt-map
269 ranges;
270 };
271
272 pcie@a,0 {
273 reg = <0x5000
274 #address-cells
275 #size-cells =
276 device_type =
277 interrupt-pare
278 #interrupt-cel
279 interrupt-map-
280 interrupt-map
281 ranges;
282 };
283
284 pcie@b,0 {
285 reg = <0x5800
286 #address-cells
287 #size-cells =
288 device_type =
289 interrupt-pare
290 #interrupt-cel
291 interrupt-map-
292 interrupt-map
293 ranges;
294 };
295
296 pcie@c,0 {
297 reg = <0x6000
298 #address-cells
299 #size-cells =
300 device_type =
301 interrupt-pare
302 #interrupt-cel
303 interrupt-map-
304 interrupt-map
305 ranges;
306 };
307
308 pcie@d,0 {
309 reg = <0x6800
310 #address-cells
311 #size-cells =
312 device_type =
313 interrupt-pare
314 #interrupt-cel
315 interrupt-map-
316 interrupt-map
317 ranges;
318 };
319
320 pcie@e,0 {
321 reg = <0x7000
322 #address-cells
323 #size-cells =
324 device_type =
325 interrupt-pare
326 #interrupt-cel
327 interrupt-map-
328 interrupt-map
329 ranges;
330 };
331
332 pcie@f,0 {
333 reg = <0x7800
334 #address-cells
335 #size-cells =
336 device_type =
337 interrupt-pare
338 #interrupt-cel
339 interrupt-map-
340 interrupt-map
341 ranges;
342 };
343
344 pcie@10,0 {
345 reg = <0x8000
346 #address-cells
347 #size-cells =
348 device_type =
349 interrupt-pare
350 #interrupt-cel
351 interrupt-map-
352 interrupt-map
353 ranges;
354 };
355 };
356 };
357 };
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