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Linux/arch/loongarch/include/asm/cacheops.h

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Diff markup

Differences between /arch/loongarch/include/asm/cacheops.h (Architecture sparc64) and /arch/ppc/include/asm-ppc/cacheops.h (Architecture ppc)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 
  2 /*                                                
  3  * Cache operations for the cache instruction.    
  4  *                                                
  5  * Copyright (C) 2020-2022 Loongson Technology    
  6  */                                               
  7 #ifndef __ASM_CACHEOPS_H                          
  8 #define __ASM_CACHEOPS_H                          
  9                                                   
 10 /*                                                
 11  * Most cache ops are split into a 3 bit field    
 12  * bit field identifying the cache operation.     
 13  */                                               
 14 #define CacheOp_Cache                   0x07      
 15 #define CacheOp_Op                      0x18      
 16                                                   
 17 #define Cache_LEAF0                     0x00      
 18 #define Cache_LEAF1                     0x01      
 19 #define Cache_LEAF2                     0x02      
 20 #define Cache_LEAF3                     0x03      
 21 #define Cache_LEAF4                     0x04      
 22 #define Cache_LEAF5                     0x05      
 23                                                   
 24 #define Index_Invalidate                0x08      
 25 #define Index_Writeback_Inv             0x08      
 26 #define Hit_Invalidate                  0x10      
 27 #define Hit_Writeback_Inv               0x10      
 28 #define CacheOp_User_Defined            0x18      
 29                                                   
 30 #define Index_Writeback_Inv_LEAF0       (Cache    
 31 #define Index_Writeback_Inv_LEAF1       (Cache    
 32 #define Index_Writeback_Inv_LEAF2       (Cache    
 33 #define Index_Writeback_Inv_LEAF3       (Cache    
 34 #define Index_Writeback_Inv_LEAF4       (Cache    
 35 #define Index_Writeback_Inv_LEAF5       (Cache    
 36 #define Hit_Writeback_Inv_LEAF0         (Cache    
 37 #define Hit_Writeback_Inv_LEAF1         (Cache    
 38 #define Hit_Writeback_Inv_LEAF2         (Cache    
 39 #define Hit_Writeback_Inv_LEAF3         (Cache    
 40 #define Hit_Writeback_Inv_LEAF4         (Cache    
 41 #define Hit_Writeback_Inv_LEAF5         (Cache    
 42                                                   
 43 #endif  /* __ASM_CACHEOPS_H */                    
 44                                                   

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