1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linu !! 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* !! 2 #ifndef _UAPI_M68K_PTRACE_H 3 * Author: Hanlu Li <lihanlu@loongson.cn> !! 3 #define _UAPI_M68K_PTRACE_H 4 * Huacai Chen <chenhuacai@loongson.cn !! 4 5 * !! 5 #define PT_D1 0 6 * Copyright (C) 2020-2022 Loongson Technology !! 6 #define PT_D2 1 7 */ !! 7 #define PT_D3 2 8 #ifndef _UAPI_ASM_PTRACE_H !! 8 #define PT_D4 3 9 #define _UAPI_ASM_PTRACE_H !! 9 #define PT_D5 4 10 !! 10 #define PT_D6 5 11 #include <linux/types.h> !! 11 #define PT_D7 6 12 !! 12 #define PT_A0 7 13 #ifndef __KERNEL__ !! 13 #define PT_A1 8 14 #include <stdint.h> !! 14 #define PT_A2 9 >> 15 #define PT_A3 10 >> 16 #define PT_A4 11 >> 17 #define PT_A5 12 >> 18 #define PT_A6 13 >> 19 #define PT_D0 14 >> 20 #define PT_USP 15 >> 21 #define PT_ORIG_D0 16 >> 22 #define PT_SR 17 >> 23 #define PT_PC 18 >> 24 >> 25 #ifndef __ASSEMBLY__ >> 26 >> 27 /* this struct defines the way the registers are stored on the >> 28 stack during a system call. */ >> 29 >> 30 struct pt_regs { >> 31 long d1; >> 32 long d2; >> 33 long d3; >> 34 long d4; >> 35 long d5; >> 36 long a0; >> 37 long a1; >> 38 long a2; >> 39 long d0; >> 40 long orig_d0; >> 41 long stkadj; >> 42 #ifdef __mcoldfire__ >> 43 unsigned format : 4; /* frame format specifier */ >> 44 unsigned vector : 12; /* vector offset */ >> 45 unsigned short sr; >> 46 unsigned long pc; >> 47 #else >> 48 unsigned short sr; >> 49 unsigned long pc; >> 50 unsigned format : 4; /* frame format specifier */ >> 51 unsigned vector : 12; /* vector offset */ 15 #endif 52 #endif >> 53 }; 16 54 17 /* 55 /* 18 * For PTRACE_{POKE,PEEK}USR. 0 - 31 are GPRs, !! 56 * This is the extended stack used by signal handlers and the context 19 * 32 is syscall's original ARG0, 33 is PC, 34 !! 57 * switcher: it's pushed after the normal "struct pt_regs". 20 */ 58 */ 21 #define GPR_BASE 0 !! 59 struct switch_stack { 22 #define GPR_NUM 32 !! 60 unsigned long d6; 23 #define GPR_END (GPR_BASE + GPR_NUM - !! 61 unsigned long d7; 24 #define ARG0 (GPR_END + 1) !! 62 unsigned long a3; 25 #define PC (GPR_END + 2) !! 63 unsigned long a4; 26 #define BADVADDR (GPR_END + 3) !! 64 unsigned long a5; 27 !! 65 unsigned long a6; 28 #define NUM_FPU_REGS 32 !! 66 unsigned long retpc; 29 << 30 struct user_pt_regs { << 31 /* Main processor registers. */ << 32 unsigned long regs[32]; << 33 << 34 /* Original syscall arg0. */ << 35 unsigned long orig_a0; << 36 << 37 /* Special CSR registers. */ << 38 unsigned long csr_era; << 39 unsigned long csr_badv; << 40 unsigned long reserved[10]; << 41 } __attribute__((aligned(8))); << 42 << 43 struct user_fp_state { << 44 uint64_t fpr[32]; << 45 uint64_t fcc; << 46 uint32_t fcsr; << 47 }; 67 }; 48 68 49 struct user_lsx_state { !! 69 /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ 50 /* 32 registers, 128 bits width per re !! 70 #define PTRACE_GETREGS 12 51 uint64_t vregs[32*2]; !! 71 #define PTRACE_SETREGS 13 52 }; !! 72 #define PTRACE_GETFPREGS 14 >> 73 #define PTRACE_SETFPREGS 15 53 74 54 struct user_lasx_state { !! 75 #define PTRACE_GET_THREAD_AREA 25 55 /* 32 registers, 256 bits width per re << 56 uint64_t vregs[32*4]; << 57 }; << 58 76 59 struct user_lbt_state { !! 77 #define PTRACE_GETFDPIC 31 60 uint64_t scr[4]; << 61 uint32_t eflags; << 62 uint32_t ftop; << 63 }; << 64 78 65 struct user_watch_state { !! 79 #define PTRACE_SINGLEBLOCK 33 /* resume execution until next branch */ 66 uint64_t dbg_info; << 67 struct { << 68 uint64_t addr; << 69 uint64_t mask; << 70 uint32_t ctrl; << 71 uint32_t pad; << 72 } dbg_regs[8]; << 73 }; << 74 80 75 #define PTRACE_SYSEMU 0x1f !! 81 #define PTRACE_GETFDPIC_EXEC 0 76 #define PTRACE_SYSEMU_SINGLESTEP 0x20 !! 82 #define PTRACE_GETFDPIC_INTERP 1 77 83 78 #endif /* _UAPI_ASM_PTRACE_H */ !! 84 #endif /* __ASSEMBLY__ */ >> 85 #endif /* _UAPI_M68K_PTRACE_H */ 79 86
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