1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linu !! 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* 2 /*
3 * Author: Hanlu Li <lihanlu@loongson.cn> !! 3 * This file is subject to the terms and conditions of the GNU General Public
4 * Huacai Chen <chenhuacai@loongson.cn !! 4 * License. See the file "COPYING" in the main directory of this archive
>> 5 * for more details.
5 * 6 *
6 * Copyright (C) 2020-2022 Loongson Technology !! 7 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle
>> 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
7 */ 9 */
8 #ifndef _UAPI_ASM_PTRACE_H 10 #ifndef _UAPI_ASM_PTRACE_H
9 #define _UAPI_ASM_PTRACE_H 11 #define _UAPI_ASM_PTRACE_H
10 12
11 #include <linux/types.h> 13 #include <linux/types.h>
12 14
13 #ifndef __KERNEL__ !! 15 /* 0 - 31 are integer registers, 32 - 63 are fp registers. */
14 #include <stdint.h> !! 16 #define FPR_BASE 32
15 #endif !! 17 #define PC 64
>> 18 #define CAUSE 65
>> 19 #define BADVADDR 66
>> 20 #define MMHI 67
>> 21 #define MMLO 68
>> 22 #define FPC_CSR 69
>> 23 #define FPC_EIR 70
>> 24 #define DSP_BASE 71 /* 3 more hi / lo register pairs */
>> 25 #define DSP_CONTROL 77
>> 26 #define ACX 78
16 27
17 /* 28 /*
18 * For PTRACE_{POKE,PEEK}USR. 0 - 31 are GPRs, !! 29 * This struct defines the registers as used by PTRACE_{GET,SET}REGS. The
19 * 32 is syscall's original ARG0, 33 is PC, 34 !! 30 * format is the same for both 32- and 64-bit processes. Registers for 32-bit
>> 31 * processes are sign extended.
20 */ 32 */
21 #define GPR_BASE 0 !! 33 #ifdef __KERNEL__
22 #define GPR_NUM 32 <<
23 #define GPR_END (GPR_BASE + GPR_NUM - <<
24 #define ARG0 (GPR_END + 1) <<
25 #define PC (GPR_END + 2) <<
26 #define BADVADDR (GPR_END + 3) <<
27 <<
28 #define NUM_FPU_REGS 32 <<
29 <<
30 struct user_pt_regs { 34 struct user_pt_regs {
31 /* Main processor registers. */ !! 35 #else
32 unsigned long regs[32]; !! 36 struct pt_regs {
33 !! 37 #endif
34 /* Original syscall arg0. */ !! 38 /* Saved main processor registers. */
35 unsigned long orig_a0; !! 39 __u64 regs[32];
36 <<
37 /* Special CSR registers. */ <<
38 unsigned long csr_era; <<
39 unsigned long csr_badv; <<
40 unsigned long reserved[10]; <<
41 } __attribute__((aligned(8))); <<
42 <<
43 struct user_fp_state { <<
44 uint64_t fpr[32]; <<
45 uint64_t fcc; <<
46 uint32_t fcsr; <<
47 }; <<
48 40
49 struct user_lsx_state { !! 41 /* Saved special registers. */
50 /* 32 registers, 128 bits width per re !! 42 __u64 lo;
51 uint64_t vregs[32*2]; !! 43 __u64 hi;
>> 44 __u64 cp0_epc;
>> 45 __u64 cp0_badvaddr;
>> 46 __u64 cp0_status;
>> 47 __u64 cp0_cause;
>> 48 } __attribute__ ((aligned (8)));
>> 49
>> 50 /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
>> 51 #define PTRACE_GETREGS 12
>> 52 #define PTRACE_SETREGS 13
>> 53 #define PTRACE_GETFPREGS 14
>> 54 #define PTRACE_SETFPREGS 15
>> 55 /* #define PTRACE_GETFPXREGS 18 */
>> 56 /* #define PTRACE_SETFPXREGS 19 */
>> 57
>> 58 #define PTRACE_OLDSETOPTIONS 21
>> 59
>> 60 #define PTRACE_GET_THREAD_AREA 25
>> 61 #define PTRACE_SET_THREAD_AREA 26
>> 62
>> 63 /* Calls to trace a 64bit program from a 32bit program. */
>> 64 #define PTRACE_PEEKTEXT_3264 0xc0
>> 65 #define PTRACE_PEEKDATA_3264 0xc1
>> 66 #define PTRACE_POKETEXT_3264 0xc2
>> 67 #define PTRACE_POKEDATA_3264 0xc3
>> 68 #define PTRACE_GET_THREAD_AREA_3264 0xc4
>> 69
>> 70 /* Read and write watchpoint registers. */
>> 71 enum pt_watch_style {
>> 72 pt_watch_style_mips32,
>> 73 pt_watch_style_mips64
52 }; 74 };
>> 75 struct mips32_watch_regs {
>> 76 unsigned int watchlo[8];
>> 77 /* Lower 16 bits of watchhi. */
>> 78 unsigned short watchhi[8];
>> 79 /* Valid mask and I R W bits.
>> 80 * bit 0 -- 1 if W bit is usable.
>> 81 * bit 1 -- 1 if R bit is usable.
>> 82 * bit 2 -- 1 if I bit is usable.
>> 83 * bits 3 - 11 -- Valid watchhi mask bits.
>> 84 */
>> 85 unsigned short watch_masks[8];
>> 86 /* The number of valid watch register pairs. */
>> 87 unsigned int num_valid;
>> 88 } __attribute__((aligned(8)));
53 89
54 struct user_lasx_state { !! 90 struct mips64_watch_regs {
55 /* 32 registers, 256 bits width per re !! 91 unsigned long long watchlo[8];
56 uint64_t vregs[32*4]; !! 92 unsigned short watchhi[8];
57 }; !! 93 unsigned short watch_masks[8];
>> 94 unsigned int num_valid;
>> 95 } __attribute__((aligned(8)));
58 96
59 struct user_lbt_state { !! 97 struct pt_watch_regs {
60 uint64_t scr[4]; !! 98 enum pt_watch_style style;
61 uint32_t eflags; !! 99 union {
62 uint32_t ftop; !! 100 struct mips32_watch_regs mips32;
>> 101 struct mips64_watch_regs mips64;
>> 102 };
63 }; 103 };
64 104
65 struct user_watch_state { !! 105 #define PTRACE_GET_WATCH_REGS 0xd0
66 uint64_t dbg_info; !! 106 #define PTRACE_SET_WATCH_REGS 0xd1
67 struct { <<
68 uint64_t addr; <<
69 uint64_t mask; <<
70 uint32_t ctrl; <<
71 uint32_t pad; <<
72 } dbg_regs[8]; <<
73 }; <<
74 107
75 #define PTRACE_SYSEMU 0x1f <<
76 #define PTRACE_SYSEMU_SINGLESTEP 0x20 <<
77 108
78 #endif /* _UAPI_ASM_PTRACE_H */ 109 #endif /* _UAPI_ASM_PTRACE_H */
79 110
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