1 /* SPDX-License-Identifier: GPL-2.0 */ !! 1 /* ld script for sparc32/sparc64 kernel */ 2 #include <linux/sizes.h> !! 2 3 #include <asm/asm-offsets.h> !! 3 #include <asm-generic/vmlinux.lds.h> >> 4 >> 5 #include <asm/page.h> 4 #include <asm/thread_info.h> 6 #include <asm/thread_info.h> 5 #include <asm/orc_lookup.h> << 6 7 7 #define PAGE_SIZE _PAGE_SIZE !! 8 #ifdef CONFIG_SPARC32 8 #define RO_EXCEPTION_TABLE_ALIGN 4 !! 9 #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS 9 #define PHYSADDR_MASK 0xffff !! 10 #define TEXTSTART 0xf0004000 10 !! 11 11 /* !! 12 #define SMP_CACHE_BYTES_SHIFT 5 12 * Put .bss..swapper_pg_dir as the first thing !! 13 13 * ensure that it has .bss alignment (64K). !! 14 #else 14 */ !! 15 #define SMP_CACHE_BYTES_SHIFT 6 15 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_ !! 16 #define INITIAL_ADDRESS 0x4000 >> 17 #define TEXTSTART 0x0000000000404000 16 18 17 #include <asm-generic/vmlinux.lds.h> !! 19 #endif 18 #include "image-vars.h" << 19 20 20 /* !! 21 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) 21 * Max avaliable Page Size is 64K, so we set S << 22 * field of EFI application to 64K. << 23 */ << 24 PECOFF_FILE_ALIGN = 0x200; << 25 PECOFF_SEGMENT_ALIGN = 0x10000; << 26 << 27 OUTPUT_ARCH(loongarch) << 28 ENTRY(kernel_entry) << 29 PHDRS { << 30 text PT_LOAD FLAGS(7); /* RWX */ << 31 note PT_NOTE FLAGS(4); /* R__ */ << 32 } << 33 22 34 jiffies = jiffies_64; !! 23 #ifdef CONFIG_SPARC32 >> 24 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") >> 25 OUTPUT_ARCH(sparc) >> 26 ENTRY(_start) >> 27 jiffies = jiffies_64 + 4; >> 28 #else >> 29 /* sparc64 */ >> 30 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc") >> 31 OUTPUT_ARCH(sparc:v9a) >> 32 ENTRY(_start) >> 33 jiffies = jiffies_64; >> 34 #endif 35 35 36 SECTIONS 36 SECTIONS 37 { 37 { 38 . = VMLINUX_LOAD_ADDRESS; !! 38 /* swapper_low_pmd_dir is sparc64 only */ 39 !! 39 swapper_low_pmd_dir = 0x0000000000402000; 40 _text = .; !! 40 . = INITIAL_ADDRESS; 41 HEAD_TEXT_SECTION !! 41 .text TEXTSTART : 42 !! 42 { 43 . = ALIGN(PECOFF_SEGMENT_ALIGN); !! 43 _text = .; 44 _stext = .; !! 44 HEAD_TEXT 45 .text : { << 46 TEXT_TEXT 45 TEXT_TEXT 47 SCHED_TEXT 46 SCHED_TEXT 48 LOCK_TEXT 47 LOCK_TEXT 49 KPROBES_TEXT 48 KPROBES_TEXT 50 IRQENTRY_TEXT << 51 SOFTIRQENTRY_TEXT << 52 *(.fixup) << 53 *(.gnu.warning) 49 *(.gnu.warning) 54 } :text = 0 !! 50 } = 0 55 . = ALIGN(PECOFF_SEGMENT_ALIGN); << 56 _etext = .; 51 _etext = .; 57 52 58 . = ALIGN(PECOFF_SEGMENT_ALIGN); !! 53 RO_DATA(PAGE_SIZE) 59 __init_begin = .; !! 54 .data1 : { 60 __inittext_begin = .; !! 55 *(.data1) 61 << 62 INIT_TEXT_SECTION(PAGE_SIZE) << 63 .exit.text : { << 64 EXIT_TEXT << 65 } 56 } >> 57 RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE) 66 58 67 . = ALIGN(PECOFF_SEGMENT_ALIGN); !! 59 /* End of data section */ 68 __inittext_end = .; !! 60 _edata = .; 69 61 70 __initdata_begin = .; !! 62 .fixup : { 71 !! 63 __start___fixup = .; 72 /* !! 64 *(.fixup) 73 * struct alt_inst entries. From the h !! 65 __stop___fixup = .; 74 * "Alternative instructions for diffe << 75 * Think locking instructions on spinl << 76 */ << 77 . = ALIGN(4); << 78 .altinstructions : AT(ADDR(.altinstruc << 79 __alt_instructions = .; << 80 *(.altinstructions) << 81 __alt_instructions_end = .; << 82 } 66 } >> 67 EXCEPTION_TABLE(16) >> 68 NOTES 83 69 >> 70 . = ALIGN(PAGE_SIZE); >> 71 __init_begin = ALIGN(PAGE_SIZE); >> 72 INIT_TEXT_SECTION(PAGE_SIZE) >> 73 __init_text_end = .; 84 INIT_DATA_SECTION(16) 74 INIT_DATA_SECTION(16) 85 .exit.data : { << 86 EXIT_DATA << 87 } << 88 75 89 #ifdef CONFIG_SMP !! 76 . = ALIGN(4); 90 PERCPU_SECTION(1 << CONFIG_L1_CACHE_SH !! 77 .tsb_ldquad_phys_patch : { 91 #endif !! 78 __tsb_ldquad_phys_patch = .; 92 !! 79 *(.tsb_ldquad_phys_patch) 93 .init.bss : { !! 80 __tsb_ldquad_phys_patch_end = .; 94 *(.init.bss) << 95 } 81 } 96 . = ALIGN(PECOFF_SEGMENT_ALIGN); << 97 __initdata_end = .; << 98 << 99 __init_end = .; << 100 82 101 _sdata = .; !! 83 .tsb_phys_patch : { 102 RO_DATA(4096) !! 84 __tsb_phys_patch = .; 103 !! 85 *(.tsb_phys_patch) 104 .got : ALIGN(16) { *(.got) } !! 86 __tsb_phys_patch_end = .; 105 .plt : ALIGN(16) { *(.plt) } << 106 .got.plt : ALIGN(16) { *(.got.plt) } << 107 << 108 RW_DATA(1 << CONFIG_L1_CACHE_SHIFT, PA << 109 << 110 .rela.dyn : ALIGN(8) { << 111 __rela_dyn_begin = .; << 112 *(.rela.dyn) *(.rela*) << 113 __rela_dyn_end = .; << 114 } << 115 << 116 #ifdef CONFIG_RELR << 117 .relr.dyn : ALIGN(8) { << 118 __relr_dyn_begin = .; << 119 *(.relr.dyn) << 120 __relr_dyn_end = .; << 121 } 87 } 122 #endif << 123 88 124 .data.rel : { *(.data.rel*) } !! 89 .cpuid_patch : { 125 !! 90 __cpuid_patch = .; 126 #ifdef CONFIG_RELOCATABLE !! 91 *(.cpuid_patch) 127 . = ALIGN(8); !! 92 __cpuid_patch_end = .; 128 .la_abs : AT(ADDR(.la_abs) - LOAD_OFFS << 129 __la_abs_begin = .; << 130 *(.la_abs) << 131 __la_abs_end = .; << 132 } 93 } 133 #endif << 134 94 135 ORC_UNWIND_TABLE !! 95 .sun4v_1insn_patch : { 136 !! 96 __sun4v_1insn_patch = .; 137 .sdata : { !! 97 *(.sun4v_1insn_patch) 138 *(.sdata) !! 98 __sun4v_1insn_patch_end = .; >> 99 } >> 100 .sun4v_2insn_patch : { >> 101 __sun4v_2insn_patch = .; >> 102 *(.sun4v_2insn_patch) >> 103 __sun4v_2insn_patch_end = .; 139 } 104 } 140 .edata_padding : { BYTE(0); . = ALIGN( << 141 _edata = .; << 142 105 143 BSS_SECTION(0, SZ_64K, 8) !! 106 PERCPU(PAGE_SIZE) 144 . = ALIGN(PECOFF_SEGMENT_ALIGN); << 145 107 146 _end = .; !! 108 . = ALIGN(PAGE_SIZE); >> 109 __init_end = .; >> 110 BSS_SECTION(0, 0, 0) >> 111 _end = . ; 147 112 148 STABS_DEBUG 113 STABS_DEBUG 149 DWARF_DEBUG 114 DWARF_DEBUG 150 ELF_DETAILS << 151 << 152 #ifdef CONFIG_EFI_STUB << 153 /* header symbols */ << 154 _kernel_entry = ABSOLUTE(kernel_entry << 155 _kernel_asize = ABSOLUTE(_end - _text) << 156 _kernel_fsize = ABSOLUTE(_edata - _tex << 157 _kernel_vsize = ABSOLUTE(_end - __init << 158 _kernel_rsize = ABSOLUTE(_edata - __in << 159 #endif << 160 << 161 .gptab.sdata : { << 162 *(.gptab.data) << 163 *(.gptab.sdata) << 164 } << 165 .gptab.sbss : { << 166 *(.gptab.bss) << 167 *(.gptab.sbss) << 168 } << 169 115 170 DISCARDS 116 DISCARDS 171 /DISCARD/ : { << 172 *(.dynamic .dynsym .dynstr .ha << 173 *(.gnu.attributes) << 174 *(.options) << 175 *(.eh_frame) << 176 } << 177 } 117 }
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