1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <linux/sizes.h> !! 2 /* ld script for sparc32/sparc64 kernel */
3 #include <asm/asm-offsets.h> !! 3
>> 4 #include <asm-generic/vmlinux.lds.h>
>> 5
>> 6 #include <asm/page.h>
4 #include <asm/thread_info.h> 7 #include <asm/thread_info.h>
5 #include <asm/orc_lookup.h> <<
6 8
7 #define PAGE_SIZE _PAGE_SIZE !! 9 #ifdef CONFIG_SPARC32
8 #define RO_EXCEPTION_TABLE_ALIGN 4 !! 10 #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS
9 #define PHYSADDR_MASK 0xffff !! 11 #define TEXTSTART 0xf0004000
10 !! 12
11 /* !! 13 #define SMP_CACHE_BYTES_SHIFT 5
12 * Put .bss..swapper_pg_dir as the first thing !! 14
13 * ensure that it has .bss alignment (64K). !! 15 #else
14 */ !! 16 #define SMP_CACHE_BYTES_SHIFT 6
15 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_ !! 17 #define INITIAL_ADDRESS 0x4000
>> 18 #define TEXTSTART 0x0000000000404000
16 19
17 #include <asm-generic/vmlinux.lds.h> !! 20 #endif
18 #include "image-vars.h" <<
19 21
20 /* !! 22 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
21 * Max avaliable Page Size is 64K, so we set S <<
22 * field of EFI application to 64K. <<
23 */ <<
24 PECOFF_FILE_ALIGN = 0x200; <<
25 PECOFF_SEGMENT_ALIGN = 0x10000; <<
26 <<
27 OUTPUT_ARCH(loongarch) <<
28 ENTRY(kernel_entry) <<
29 PHDRS { <<
30 text PT_LOAD FLAGS(7); /* RWX */ <<
31 note PT_NOTE FLAGS(4); /* R__ */ <<
32 } <<
33 23
34 jiffies = jiffies_64; !! 24 #ifdef CONFIG_SPARC32
>> 25 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
>> 26 OUTPUT_ARCH(sparc)
>> 27 ENTRY(_start)
>> 28 jiffies = jiffies_64 + 4;
>> 29 #else
>> 30 /* sparc64 */
>> 31 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
>> 32 OUTPUT_ARCH(sparc:v9a)
>> 33 ENTRY(_start)
>> 34 jiffies = jiffies_64;
>> 35 #endif
>> 36
>> 37 #ifdef CONFIG_SPARC64
>> 38 ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
>> 39 #endif
35 40
36 SECTIONS 41 SECTIONS
37 { 42 {
38 . = VMLINUX_LOAD_ADDRESS; !! 43 #ifdef CONFIG_SPARC64
39 !! 44 swapper_pg_dir = 0x0000000000402000;
40 _text = .; !! 45 #endif
41 HEAD_TEXT_SECTION !! 46 . = INITIAL_ADDRESS;
42 !! 47 .text TEXTSTART :
43 . = ALIGN(PECOFF_SEGMENT_ALIGN); !! 48 {
44 _stext = .; !! 49 _text = .;
45 .text : { !! 50 HEAD_TEXT
46 TEXT_TEXT 51 TEXT_TEXT
47 SCHED_TEXT 52 SCHED_TEXT
>> 53 CPUIDLE_TEXT
48 LOCK_TEXT 54 LOCK_TEXT
49 KPROBES_TEXT 55 KPROBES_TEXT
50 IRQENTRY_TEXT 56 IRQENTRY_TEXT
51 SOFTIRQENTRY_TEXT 57 SOFTIRQENTRY_TEXT
52 *(.fixup) <<
53 *(.gnu.warning) 58 *(.gnu.warning)
54 } :text = 0 !! 59 } = 0
55 . = ALIGN(PECOFF_SEGMENT_ALIGN); <<
56 _etext = .; 60 _etext = .;
57 61
58 . = ALIGN(PECOFF_SEGMENT_ALIGN); !! 62 RO_DATA(PAGE_SIZE)
59 __init_begin = .; <<
60 __inittext_begin = .; <<
61 <<
62 INIT_TEXT_SECTION(PAGE_SIZE) <<
63 .exit.text : { <<
64 EXIT_TEXT <<
65 } <<
66 63
67 . = ALIGN(PECOFF_SEGMENT_ALIGN); !! 64 /* Start of data section */
68 __inittext_end = .; !! 65 _sdata = .;
69 <<
70 __initdata_begin = .; <<
71 <<
72 /* <<
73 * struct alt_inst entries. From the h <<
74 * "Alternative instructions for diffe <<
75 * Think locking instructions on spinl <<
76 */ <<
77 . = ALIGN(4); <<
78 .altinstructions : AT(ADDR(.altinstruc <<
79 __alt_instructions = .; <<
80 *(.altinstructions) <<
81 __alt_instructions_end = .; <<
82 } <<
83 66
84 INIT_DATA_SECTION(16) !! 67 .data1 : {
85 .exit.data : { !! 68 *(.data1)
86 EXIT_DATA <<
87 } 69 }
>> 70 RW_DATA(SMP_CACHE_BYTES, 0, THREAD_SIZE)
88 71
89 #ifdef CONFIG_SMP !! 72 /* End of data section */
90 PERCPU_SECTION(1 << CONFIG_L1_CACHE_SH !! 73 _edata = .;
91 #endif <<
92 74
93 .init.bss : { !! 75 .fixup : {
94 *(.init.bss) !! 76 __start___fixup = .;
>> 77 *(.fixup)
>> 78 __stop___fixup = .;
95 } 79 }
96 . = ALIGN(PECOFF_SEGMENT_ALIGN); !! 80 EXCEPTION_TABLE(16)
97 __initdata_end = .; <<
98 <<
99 __init_end = .; <<
100 <<
101 _sdata = .; <<
102 RO_DATA(4096) <<
103 <<
104 .got : ALIGN(16) { *(.got) } <<
105 .plt : ALIGN(16) { *(.plt) } <<
106 .got.plt : ALIGN(16) { *(.got.plt) } <<
107 <<
108 RW_DATA(1 << CONFIG_L1_CACHE_SHIFT, PA <<
109 81
110 .rela.dyn : ALIGN(8) { !! 82 . = ALIGN(PAGE_SIZE);
111 __rela_dyn_begin = .; !! 83 __init_begin = ALIGN(PAGE_SIZE);
112 *(.rela.dyn) *(.rela*) !! 84 INIT_TEXT_SECTION(PAGE_SIZE)
113 __rela_dyn_end = .; !! 85 __init_text_end = .;
114 } !! 86 INIT_DATA_SECTION(16)
115 87
116 #ifdef CONFIG_RELR !! 88 . = ALIGN(4);
117 .relr.dyn : ALIGN(8) { !! 89 .tsb_ldquad_phys_patch : {
118 __relr_dyn_begin = .; !! 90 __tsb_ldquad_phys_patch = .;
119 *(.relr.dyn) !! 91 *(.tsb_ldquad_phys_patch)
120 __relr_dyn_end = .; !! 92 __tsb_ldquad_phys_patch_end = .;
>> 93 }
>> 94
>> 95 .tsb_phys_patch : {
>> 96 __tsb_phys_patch = .;
>> 97 *(.tsb_phys_patch)
>> 98 __tsb_phys_patch_end = .;
>> 99 }
>> 100
>> 101 .cpuid_patch : {
>> 102 __cpuid_patch = .;
>> 103 *(.cpuid_patch)
>> 104 __cpuid_patch_end = .;
>> 105 }
>> 106
>> 107 .sun4v_1insn_patch : {
>> 108 __sun4v_1insn_patch = .;
>> 109 *(.sun4v_1insn_patch)
>> 110 __sun4v_1insn_patch_end = .;
>> 111 }
>> 112 .sun4v_2insn_patch : {
>> 113 __sun4v_2insn_patch = .;
>> 114 *(.sun4v_2insn_patch)
>> 115 __sun4v_2insn_patch_end = .;
>> 116 }
>> 117 .leon_1insn_patch : {
>> 118 __leon_1insn_patch = .;
>> 119 *(.leon_1insn_patch)
>> 120 __leon_1insn_patch_end = .;
>> 121 }
>> 122 .swapper_tsb_phys_patch : {
>> 123 __swapper_tsb_phys_patch = .;
>> 124 *(.swapper_tsb_phys_patch)
>> 125 __swapper_tsb_phys_patch_end = .;
>> 126 }
>> 127 .swapper_4m_tsb_phys_patch : {
>> 128 __swapper_4m_tsb_phys_patch = .;
>> 129 *(.swapper_4m_tsb_phys_patch)
>> 130 __swapper_4m_tsb_phys_patch_end = .;
>> 131 }
>> 132 .popc_3insn_patch : {
>> 133 __popc_3insn_patch = .;
>> 134 *(.popc_3insn_patch)
>> 135 __popc_3insn_patch_end = .;
>> 136 }
>> 137 .popc_6insn_patch : {
>> 138 __popc_6insn_patch = .;
>> 139 *(.popc_6insn_patch)
>> 140 __popc_6insn_patch_end = .;
>> 141 }
>> 142 .pause_3insn_patch : {
>> 143 __pause_3insn_patch = .;
>> 144 *(.pause_3insn_patch)
>> 145 __pause_3insn_patch_end = .;
>> 146 }
>> 147 .sun_m7_1insn_patch : {
>> 148 __sun_m7_1insn_patch = .;
>> 149 *(.sun_m7_1insn_patch)
>> 150 __sun_m7_1insn_patch_end = .;
>> 151 }
>> 152 .sun_m7_2insn_patch : {
>> 153 __sun_m7_2insn_patch = .;
>> 154 *(.sun_m7_2insn_patch)
>> 155 __sun_m7_2insn_patch_end = .;
>> 156 }
>> 157 .get_tick_patch : {
>> 158 __get_tick_patch = .;
>> 159 *(.get_tick_patch)
>> 160 __get_tick_patch_end = .;
>> 161 }
>> 162 .pud_huge_patch : {
>> 163 __pud_huge_patch = .;
>> 164 *(.pud_huge_patch)
>> 165 __pud_huge_patch_end = .;
>> 166 }
>> 167 .fast_win_ctrl_1insn_patch : {
>> 168 __fast_win_ctrl_1insn_patch = .;
>> 169 *(.fast_win_ctrl_1insn_patch)
>> 170 __fast_win_ctrl_1insn_patch_end = .;
121 } 171 }
122 #endif !! 172 PERCPU_SECTION(SMP_CACHE_BYTES)
123 <<
124 .data.rel : { *(.data.rel*) } <<
125 173
126 #ifdef CONFIG_RELOCATABLE !! 174 . = ALIGN(PAGE_SIZE);
127 . = ALIGN(8); !! 175 .exit.text : {
128 .la_abs : AT(ADDR(.la_abs) - LOAD_OFFS !! 176 EXIT_TEXT
129 __la_abs_begin = .; <<
130 *(.la_abs) <<
131 __la_abs_end = .; <<
132 } 177 }
133 #endif <<
134 <<
135 ORC_UNWIND_TABLE <<
136 178
137 .sdata : { !! 179 .exit.data : {
138 *(.sdata) !! 180 EXIT_DATA
139 } 181 }
140 .edata_padding : { BYTE(0); . = ALIGN( <<
141 _edata = .; <<
142 <<
143 BSS_SECTION(0, SZ_64K, 8) <<
144 . = ALIGN(PECOFF_SEGMENT_ALIGN); <<
145 182
146 _end = .; !! 183 . = ALIGN(PAGE_SIZE);
>> 184 __init_end = .;
>> 185 BSS_SECTION(0, 0, 0)
>> 186 _end = . ;
147 187
148 STABS_DEBUG 188 STABS_DEBUG
149 DWARF_DEBUG 189 DWARF_DEBUG
150 ELF_DETAILS 190 ELF_DETAILS
151 191
152 #ifdef CONFIG_EFI_STUB <<
153 /* header symbols */ <<
154 _kernel_entry = ABSOLUTE(kernel_entry <<
155 _kernel_asize = ABSOLUTE(_end - _text) <<
156 _kernel_fsize = ABSOLUTE(_edata - _tex <<
157 _kernel_vsize = ABSOLUTE(_end - __init <<
158 _kernel_rsize = ABSOLUTE(_edata - __in <<
159 #endif <<
160 <<
161 .gptab.sdata : { <<
162 *(.gptab.data) <<
163 *(.gptab.sdata) <<
164 } <<
165 .gptab.sbss : { <<
166 *(.gptab.bss) <<
167 *(.gptab.sbss) <<
168 } <<
169 <<
170 DISCARDS 192 DISCARDS
171 /DISCARD/ : { <<
172 *(.dynamic .dynsym .dynstr .ha <<
173 *(.gnu.attributes) <<
174 *(.options) <<
175 *(.eh_frame) <<
176 } <<
177 } 193 }
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