1 # SPDX-License-Identifier: GPL-2.0 <<
2 comment "Processor Type" 1 comment "Processor Type"
3 2
4 choice 3 choice
5 prompt "CPU family support" 4 prompt "CPU family support"
6 default M68KCLASSIC if MMU 5 default M68KCLASSIC if MMU
7 default COLDFIRE if !MMU 6 default COLDFIRE if !MMU
8 help 7 help
9 The Freescale (was Motorola) M68K fa 8 The Freescale (was Motorola) M68K family of processors implements
10 the full 68000 processor instruction 9 the full 68000 processor instruction set.
11 The Freescale ColdFire family of pro 10 The Freescale ColdFire family of processors is a modern derivative
12 of the 68000 processor family. They 11 of the 68000 processor family. They are mainly targeted at embedded
13 applications, and are all System-On- 12 applications, and are all System-On-Chip (SOC) devices, as opposed
14 to stand alone CPUs. They implement 13 to stand alone CPUs. They implement a subset of the original 68000
15 processor instruction set. 14 processor instruction set.
16 If you anticipate running this kerne 15 If you anticipate running this kernel on a computer with a classic
17 MC68xxx processor, select M68KCLASSI 16 MC68xxx processor, select M68KCLASSIC.
18 If you anticipate running this kerne 17 If you anticipate running this kernel on a computer with a ColdFire
19 processor, select COLDFIRE. 18 processor, select COLDFIRE.
20 19
21 config M68KCLASSIC 20 config M68KCLASSIC
22 bool "Classic M68K CPU family support" 21 bool "Classic M68K CPU family support"
23 select HAVE_ARCH_PFN_VALID <<
24 22
25 config COLDFIRE 23 config COLDFIRE
26 bool "Coldfire CPU family support" 24 bool "Coldfire CPU family support"
>> 25 select ARCH_REQUIRE_GPIOLIB
>> 26 select ARCH_HAVE_CUSTOM_GPIO_H
27 select CPU_HAS_NO_BITFIELDS 27 select CPU_HAS_NO_BITFIELDS
28 select CPU_HAS_NO_CAS <<
29 select CPU_HAS_NO_MULDIV64 28 select CPU_HAS_NO_MULDIV64
30 select GENERIC_CSUM 29 select GENERIC_CSUM
31 select GPIOLIB !! 30 select HAVE_CLK
32 select HAVE_LEGACY_CLK <<
33 select HAVE_PAGE_SIZE_8KB if !MMU <<
34 31
35 endchoice 32 endchoice
36 33
37 if M68KCLASSIC 34 if M68KCLASSIC
38 35
39 config M68000 36 config M68000
40 def_bool y !! 37 bool "MC68000"
41 depends on !MMU 38 depends on !MMU
42 select CPU_HAS_NO_BITFIELDS 39 select CPU_HAS_NO_BITFIELDS
43 select CPU_HAS_NO_CAS <<
44 select CPU_HAS_NO_MULDIV64 40 select CPU_HAS_NO_MULDIV64
45 select CPU_HAS_NO_UNALIGNED 41 select CPU_HAS_NO_UNALIGNED
46 select GENERIC_CSUM 42 select GENERIC_CSUM
47 select CPU_NO_EFFICIENT_FFS <<
48 select HAVE_ARCH_HASH <<
49 select HAVE_PAGE_SIZE_4KB <<
50 select LEGACY_TIMER_TICK <<
51 help 43 help
52 The Freescale (was Motorola) 68000 C 44 The Freescale (was Motorola) 68000 CPU is the first generation of
53 the well known M68K family of proces 45 the well known M68K family of processors. The CPU core as well as
54 being available as a stand alone CPU 46 being available as a stand alone CPU was also used in many
55 System-On-Chip devices (eg 68328, 68 47 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
56 a paging MMU. 48 a paging MMU.
57 49
>> 50 config MCPU32
>> 51 bool
>> 52 select CPU_HAS_NO_BITFIELDS
>> 53 select CPU_HAS_NO_UNALIGNED
>> 54 help
>> 55 The Freescale (was then Motorola) CPU32 is a CPU core that is
>> 56 based on the 68020 processor. For the most part it is used in
>> 57 System-On-Chip parts, and does not contain a paging MMU.
>> 58
58 config M68020 59 config M68020
59 bool "68020 support" 60 bool "68020 support"
60 depends on MMU 61 depends on MMU
61 select FPU <<
62 select CPU_HAS_ADDRESS_SPACES 62 select CPU_HAS_ADDRESS_SPACES
63 help 63 help
64 If you anticipate running this kerne 64 If you anticipate running this kernel on a computer with a MC68020
65 processor, say Y. Otherwise, say N. 65 processor, say Y. Otherwise, say N. Note that the 68020 requires a
66 68851 MMU (Memory Management Unit) t 66 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
67 Sun 3, which provides its own versio 67 Sun 3, which provides its own version.
68 68
69 config M68030 69 config M68030
70 bool "68030 support" 70 bool "68030 support"
71 depends on MMU && !MMU_SUN3 71 depends on MMU && !MMU_SUN3
72 select FPU <<
73 select CPU_HAS_ADDRESS_SPACES 72 select CPU_HAS_ADDRESS_SPACES
74 help 73 help
75 If you anticipate running this kerne 74 If you anticipate running this kernel on a computer with a MC68030
76 processor, say Y. Otherwise, say N. 75 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
77 work, as it does not include an MMU 76 work, as it does not include an MMU (Memory Management Unit).
78 77
79 config M68040 78 config M68040
80 bool "68040 support" 79 bool "68040 support"
81 depends on MMU && !MMU_SUN3 80 depends on MMU && !MMU_SUN3
82 select FPU <<
83 select CPU_HAS_ADDRESS_SPACES 81 select CPU_HAS_ADDRESS_SPACES
84 help 82 help
85 If you anticipate running this kerne 83 If you anticipate running this kernel on a computer with a MC68LC040
86 or MC68040 processor, say Y. Otherwi 84 or MC68040 processor, say Y. Otherwise, say N. Note that an
87 MC68EC040 will not work, as it does 85 MC68EC040 will not work, as it does not include an MMU (Memory
88 Management Unit). 86 Management Unit).
89 87
90 config M68060 88 config M68060
91 bool "68060 support" 89 bool "68060 support"
92 depends on MMU && !MMU_SUN3 90 depends on MMU && !MMU_SUN3
93 select FPU <<
94 select CPU_HAS_ADDRESS_SPACES 91 select CPU_HAS_ADDRESS_SPACES
95 help 92 help
96 If you anticipate running this kerne 93 If you anticipate running this kernel on a computer with a MC68060
97 processor, say Y. Otherwise, say N. 94 processor, say Y. Otherwise, say N.
98 95
99 config M68328 96 config M68328
100 bool !! 97 bool "MC68328"
101 depends on !MMU 98 depends on !MMU
102 select M68000 99 select M68000
103 help 100 help
104 Motorola 68328 processor support. 101 Motorola 68328 processor support.
105 102
106 config M68EZ328 103 config M68EZ328
107 bool !! 104 bool "MC68EZ328"
108 depends on !MMU 105 depends on !MMU
109 select M68000 106 select M68000
110 help 107 help
111 Motorola 68EX328 processor support. 108 Motorola 68EX328 processor support.
112 109
113 config M68VZ328 110 config M68VZ328
114 bool !! 111 bool "MC68VZ328"
115 depends on !MMU 112 depends on !MMU
116 select M68000 113 select M68000
117 help 114 help
118 Motorola 68VZ328 processor support. 115 Motorola 68VZ328 processor support.
119 116
>> 117 config M68360
>> 118 bool "MC68360"
>> 119 depends on !MMU
>> 120 select MCPU32
>> 121 help
>> 122 Motorola 68360 processor support.
>> 123
120 endif # M68KCLASSIC 124 endif # M68KCLASSIC
121 125
122 if COLDFIRE 126 if COLDFIRE
123 127
124 choice <<
125 prompt "ColdFire SoC type" <<
126 default M520x <<
127 help <<
128 Select the type of ColdFire System-o <<
129 to build for. <<
130 <<
131 config M5206 128 config M5206
132 bool "MCF5206" 129 bool "MCF5206"
133 depends on !MMU 130 depends on !MMU
134 select COLDFIRE_SW_A7 131 select COLDFIRE_SW_A7
135 select COLDFIRE_TIMERS <<
136 select HAVE_MBAR 132 select HAVE_MBAR
137 select CPU_NO_EFFICIENT_FFS <<
138 help 133 help
139 Motorola ColdFire 5206 processor sup 134 Motorola ColdFire 5206 processor support.
140 135
141 config M5206e 136 config M5206e
142 bool "MCF5206e" 137 bool "MCF5206e"
143 depends on !MMU 138 depends on !MMU
144 select COLDFIRE_SW_A7 139 select COLDFIRE_SW_A7
145 select COLDFIRE_TIMERS <<
146 select HAVE_MBAR 140 select HAVE_MBAR
147 select CPU_NO_EFFICIENT_FFS <<
148 help 141 help
149 Motorola ColdFire 5206e processor su 142 Motorola ColdFire 5206e processor support.
150 143
151 config M520x 144 config M520x
152 bool "MCF520x" 145 bool "MCF520x"
153 depends on !MMU 146 depends on !MMU
154 select COLDFIRE_PIT_TIMER !! 147 select GENERIC_CLOCKEVENTS
155 select HAVE_CACHE_SPLIT 148 select HAVE_CACHE_SPLIT
156 help 149 help
157 Freescale Coldfire 5207/5208 process !! 150 Freescale Coldfire 5207/5208 processor support.
158 151
159 config M523x 152 config M523x
160 bool "MCF523x" 153 bool "MCF523x"
161 depends on !MMU 154 depends on !MMU
162 select COLDFIRE_PIT_TIMER !! 155 select GENERIC_CLOCKEVENTS
163 select HAVE_CACHE_SPLIT 156 select HAVE_CACHE_SPLIT
164 select HAVE_IPSBAR 157 select HAVE_IPSBAR
165 help 158 help
166 Freescale Coldfire 5230/1/2/4/5 proc 159 Freescale Coldfire 5230/1/2/4/5 processor support
167 160
168 config M5249 161 config M5249
169 bool "MCF5249" 162 bool "MCF5249"
170 depends on !MMU 163 depends on !MMU
171 select COLDFIRE_SW_A7 164 select COLDFIRE_SW_A7
172 select COLDFIRE_TIMERS <<
173 select HAVE_MBAR 165 select HAVE_MBAR
174 select CPU_NO_EFFICIENT_FFS <<
175 help 166 help
176 Motorola ColdFire 5249 processor sup 167 Motorola ColdFire 5249 processor support.
177 168
178 config M525x 169 config M525x
179 bool "MCF525x" 170 bool "MCF525x"
180 depends on !MMU 171 depends on !MMU
181 select COLDFIRE_SW_A7 172 select COLDFIRE_SW_A7
182 select COLDFIRE_TIMERS <<
183 select HAVE_MBAR 173 select HAVE_MBAR
184 select CPU_NO_EFFICIENT_FFS <<
185 help 174 help
186 Freescale (Motorola) Coldfire 5251/5 175 Freescale (Motorola) Coldfire 5251/5253 processor support.
187 176
>> 177 config M527x
>> 178 bool
>> 179
188 config M5271 180 config M5271
189 bool "MCF5271" 181 bool "MCF5271"
190 depends on !MMU 182 depends on !MMU
191 select COLDFIRE_PIT_TIMER <<
192 select M527x 183 select M527x
193 select HAVE_CACHE_SPLIT 184 select HAVE_CACHE_SPLIT
194 select HAVE_IPSBAR 185 select HAVE_IPSBAR
>> 186 select GENERIC_CLOCKEVENTS
195 help 187 help
196 Freescale (Motorola) ColdFire 5270/5 188 Freescale (Motorola) ColdFire 5270/5271 processor support.
197 189
198 config M5272 190 config M5272
199 bool "MCF5272" 191 bool "MCF5272"
200 depends on !MMU 192 depends on !MMU
201 select COLDFIRE_SW_A7 193 select COLDFIRE_SW_A7
202 select COLDFIRE_TIMERS <<
203 select HAVE_MBAR 194 select HAVE_MBAR
204 select CPU_NO_EFFICIENT_FFS <<
205 help 195 help
206 Motorola ColdFire 5272 processor sup 196 Motorola ColdFire 5272 processor support.
207 197
208 config M5275 198 config M5275
209 bool "MCF5275" 199 bool "MCF5275"
210 depends on !MMU 200 depends on !MMU
211 select COLDFIRE_PIT_TIMER <<
212 select M527x 201 select M527x
213 select HAVE_CACHE_SPLIT 202 select HAVE_CACHE_SPLIT
214 select HAVE_IPSBAR 203 select HAVE_IPSBAR
>> 204 select GENERIC_CLOCKEVENTS
215 help 205 help
216 Freescale (Motorola) ColdFire 5274/5 206 Freescale (Motorola) ColdFire 5274/5275 processor support.
217 207
218 config M528x 208 config M528x
219 bool "MCF528x" 209 bool "MCF528x"
220 depends on !MMU 210 depends on !MMU
221 select COLDFIRE_PIT_TIMER !! 211 select GENERIC_CLOCKEVENTS
222 select HAVE_CACHE_SPLIT 212 select HAVE_CACHE_SPLIT
223 select HAVE_IPSBAR 213 select HAVE_IPSBAR
224 help 214 help
225 Motorola ColdFire 5280/5282 processo 215 Motorola ColdFire 5280/5282 processor support.
226 216
227 config M5307 217 config M5307
228 bool "MCF5307" 218 bool "MCF5307"
229 depends on !MMU 219 depends on !MMU
230 select COLDFIRE_TIMERS <<
231 select COLDFIRE_SW_A7 220 select COLDFIRE_SW_A7
232 select HAVE_CACHE_CB 221 select HAVE_CACHE_CB
233 select HAVE_MBAR 222 select HAVE_MBAR
234 select CPU_NO_EFFICIENT_FFS <<
235 help 223 help
236 Motorola ColdFire 5307 processor sup 224 Motorola ColdFire 5307 processor support.
237 225
>> 226 config M53xx
>> 227 bool
>> 228
238 config M532x 229 config M532x
239 bool "MCF532x" 230 bool "MCF532x"
240 depends on !MMU 231 depends on !MMU
241 select COLDFIRE_TIMERS <<
242 select M53xx 232 select M53xx
243 select HAVE_CACHE_CB 233 select HAVE_CACHE_CB
244 help 234 help
245 Freescale (Motorola) ColdFire 532x p 235 Freescale (Motorola) ColdFire 532x processor support.
246 236
247 config M537x 237 config M537x
248 bool "MCF537x" 238 bool "MCF537x"
249 depends on !MMU 239 depends on !MMU
250 select COLDFIRE_TIMERS <<
251 select M53xx 240 select M53xx
252 select HAVE_CACHE_CB 241 select HAVE_CACHE_CB
253 help 242 help
254 Freescale ColdFire 537x processor su 243 Freescale ColdFire 537x processor support.
255 244
256 config M5407 245 config M5407
257 bool "MCF5407" 246 bool "MCF5407"
258 depends on !MMU 247 depends on !MMU
259 select COLDFIRE_SW_A7 248 select COLDFIRE_SW_A7
260 select COLDFIRE_TIMERS <<
261 select HAVE_CACHE_CB 249 select HAVE_CACHE_CB
262 select HAVE_MBAR 250 select HAVE_MBAR
263 select CPU_NO_EFFICIENT_FFS <<
264 help 251 help
265 Motorola ColdFire 5407 processor sup 252 Motorola ColdFire 5407 processor support.
266 253
>> 254 config M54xx
>> 255 bool
>> 256
267 config M547x 257 config M547x
268 bool "MCF547x" 258 bool "MCF547x"
269 select M54xx 259 select M54xx
270 select COLDFIRE_SLTIMERS <<
271 select MMU_COLDFIRE if MMU 260 select MMU_COLDFIRE if MMU
272 select FPU if MMU <<
273 select HAVE_CACHE_CB 261 select HAVE_CACHE_CB
274 select HAVE_MBAR 262 select HAVE_MBAR
275 select CPU_NO_EFFICIENT_FFS <<
276 help 263 help
277 Freescale ColdFire 5470/5471/5472/54 264 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
278 265
279 config M548x 266 config M548x
280 bool "MCF548x" 267 bool "MCF548x"
281 select COLDFIRE_SLTIMERS <<
282 select MMU_COLDFIRE if MMU 268 select MMU_COLDFIRE if MMU
283 select FPU if MMU <<
284 select M54xx 269 select M54xx
285 select HAVE_CACHE_CB 270 select HAVE_CACHE_CB
286 select HAVE_MBAR 271 select HAVE_MBAR
287 select CPU_NO_EFFICIENT_FFS <<
288 help 272 help
289 Freescale ColdFire 5480/5481/5482/54 273 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
290 274
291 config M5441x 275 config M5441x
292 bool "MCF5441x" 276 bool "MCF5441x"
293 select COLDFIRE_PIT_TIMER !! 277 depends on !MMU
294 select MMU_COLDFIRE if MMU !! 278 select GENERIC_CLOCKEVENTS
295 select HAVE_CACHE_CB 279 select HAVE_CACHE_CB
296 help 280 help
297 Freescale Coldfire 54410/54415/54416 281 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
298 282
299 endchoice <<
300 <<
301 config M527x <<
302 bool <<
303 <<
304 config M53xx <<
305 bool <<
306 <<
307 config M54xx <<
308 select HAVE_PCI <<
309 bool <<
310 <<
311 config COLDFIRE_PIT_TIMER <<
312 bool <<
313 <<
314 config COLDFIRE_TIMERS <<
315 bool <<
316 select LEGACY_TIMER_TICK <<
317 <<
318 config COLDFIRE_SLTIMERS <<
319 bool <<
320 select LEGACY_TIMER_TICK <<
321 <<
322 endif # COLDFIRE 283 endif # COLDFIRE
323 284
>> 285
324 comment "Processor Specific Options" 286 comment "Processor Specific Options"
325 287
326 config M68KFPU_EMU 288 config M68KFPU_EMU
327 bool "Math emulation support" 289 bool "Math emulation support"
328 depends on M68KCLASSIC && FPU !! 290 depends on MMU
329 help 291 help
330 At some point in the future, this wi 292 At some point in the future, this will cause floating-point math
331 instructions to be emulated by the k 293 instructions to be emulated by the kernel on machines that lack a
332 floating-point math coprocessor. Th 294 floating-point math coprocessor. Thrill-seekers and chronically
333 sleep-deprived psychotic hacker type 295 sleep-deprived psychotic hacker types can say Y now, everyone else
334 should probably wait a while. 296 should probably wait a while.
335 297
336 config M68KFPU_EMU_EXTRAPREC 298 config M68KFPU_EMU_EXTRAPREC
337 bool "Math emulation extra precision" 299 bool "Math emulation extra precision"
338 depends on M68KFPU_EMU 300 depends on M68KFPU_EMU
339 help 301 help
340 The fpu uses normally a few bit more 302 The fpu uses normally a few bit more during calculations for
341 correct rounding, the emulator can ( 303 correct rounding, the emulator can (often) do the same but this
342 extra calculation can cost quite som 304 extra calculation can cost quite some time, so you can disable
343 it here. The emulator will then "onl 305 it here. The emulator will then "only" calculate with a 64 bit
344 mantissa and round slightly incorrec 306 mantissa and round slightly incorrect, what is more than enough
345 for normal usage. 307 for normal usage.
346 308
347 config M68KFPU_EMU_ONLY 309 config M68KFPU_EMU_ONLY
348 bool "Math emulation only kernel" 310 bool "Math emulation only kernel"
349 depends on M68KFPU_EMU 311 depends on M68KFPU_EMU
350 help 312 help
351 This option prevents any floating-po 313 This option prevents any floating-point instructions from being
352 compiled into the kernel, thereby th 314 compiled into the kernel, thereby the kernel doesn't save any
353 floating point context anymore durin 315 floating point context anymore during task switches, so this
354 kernel will only be usable on machin 316 kernel will only be usable on machines without a floating-point
355 math coprocessor. This makes the ker 317 math coprocessor. This makes the kernel a bit faster as no tests
356 needs to be executed whether a float 318 needs to be executed whether a floating-point instruction in the
357 kernel should be executed or not. 319 kernel should be executed or not.
358 320
359 config ADVANCED 321 config ADVANCED
360 bool "Advanced configuration options" 322 bool "Advanced configuration options"
361 depends on MMU 323 depends on MMU
362 help !! 324 ---help---
363 This gives you access to some advanc 325 This gives you access to some advanced options for the CPU. The
364 defaults should be fine for most use 326 defaults should be fine for most users, but these options may make
365 it possible for you to improve perfo 327 it possible for you to improve performance somewhat if you know what
366 you are doing. 328 you are doing.
367 329
368 Note that the answer to this questio 330 Note that the answer to this question won't directly affect the
369 kernel: saying N will just cause the 331 kernel: saying N will just cause the configurator to skip all
370 the questions about these options. 332 the questions about these options.
371 333
372 Most users should say N to this ques 334 Most users should say N to this question.
373 335
374 config RMW_INSNS 336 config RMW_INSNS
375 bool "Use read-modify-write instructio 337 bool "Use read-modify-write instructions"
376 depends on ADVANCED && !CPU_HAS_NO_CAS !! 338 depends on ADVANCED
377 help !! 339 ---help---
378 This allows to use certain instructi 340 This allows to use certain instructions that work with indivisible
379 read-modify-write bus cycles. While 341 read-modify-write bus cycles. While this is faster than the
380 workaround of disabling interrupts, 342 workaround of disabling interrupts, it can conflict with DMA
381 ( = direct memory access) on many Am 343 ( = direct memory access) on many Amiga systems, and it is also said
382 to destabilize other machines. It is 344 to destabilize other machines. It is very likely that this will
383 cause serious problems on any Amiga 345 cause serious problems on any Amiga or Atari Medusa if set. The only
384 configuration where it should work a 346 configuration where it should work are 68030-based Ataris, where it
385 apparently improves performance. But 347 apparently improves performance. But you've been warned! Unless you
386 really know what you are doing, say 348 really know what you are doing, say N. Try Y only if you're quite
387 adventurous. 349 adventurous.
388 350
389 config SINGLE_MEMORY_CHUNK 351 config SINGLE_MEMORY_CHUNK
390 bool "Use one physical chunk of memory 352 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
391 depends on MMU 353 depends on MMU
392 default y if SUN3 || MMU_COLDFIRE !! 354 default y if SUN3
>> 355 select NEED_MULTIPLE_NODES
393 help 356 help
394 Ignore all but the first contiguous 357 Ignore all but the first contiguous chunk of physical memory for VM
395 purposes. This will save a few byte 358 purposes. This will save a few bytes kernel size and may speed up
396 some operations. !! 359 some operations. Say N if not sure.
397 When this option os set to N, you ma <<
398 order" to save memory that could be <<
399 Say N if not sure. <<
400 <<
401 config ARCH_FORCE_MAX_ORDER <<
402 int "Order of maximal physically conti <<
403 depends on !SINGLE_MEMORY_CHUNK <<
404 default "10" <<
405 help <<
406 The kernel page allocator limits the <<
407 contiguous allocations. The limit is <<
408 defines the maximal power of two of <<
409 allocated as a single contiguous blo <<
410 overriding the default setting when <<
411 large blocks of physically contiguou <<
412 <<
413 For systems that have holes in their <<
414 value also defines the minimal size <<
415 freeing unused memory map. <<
416 360
417 Don't change if unsure. !! 361 config ARCH_DISCONTIGMEM_ENABLE
>> 362 def_bool MMU && !SINGLE_MEMORY_CHUNK
418 363
419 config 060_WRITETHROUGH 364 config 060_WRITETHROUGH
420 bool "Use write-through caching for 68 365 bool "Use write-through caching for 68060 supervisor accesses"
421 depends on ADVANCED && M68060 366 depends on ADVANCED && M68060
422 help !! 367 ---help---
423 The 68060 generally uses copyback ca 368 The 68060 generally uses copyback caching of recently accessed data.
424 Copyback caching means that memory w 369 Copyback caching means that memory writes will be held in an on-chip
425 cache and only written back to memor 370 cache and only written back to memory some time later. Saying Y
426 here will force supervisor (kernel) 371 here will force supervisor (kernel) accesses to use writethrough
427 caching. Writethrough caching means 372 caching. Writethrough caching means that data is written to memory
428 straight away, so that cache and mem 373 straight away, so that cache and memory data always agree.
429 Writethrough caching is less efficie 374 Writethrough caching is less efficient, but is needed for some
430 drivers on 68060 based systems where 375 drivers on 68060 based systems where the 68060 bus snooping signal
431 is hardwired on. The 53c710 SCSI dr 376 is hardwired on. The 53c710 SCSI driver is known to suffer from
432 this problem. 377 this problem.
433 378
434 config M68K_L2_CACHE 379 config M68K_L2_CACHE
435 bool 380 bool
436 depends on MAC 381 depends on MAC
437 default y 382 default y
438 383
439 config CPU_HAS_NO_BITFIELDS !! 384 config NODES_SHIFT
440 bool !! 385 int
>> 386 default "3"
>> 387 depends on !SINGLE_MEMORY_CHUNK
441 388
442 config CPU_HAS_NO_CAS !! 389 config CPU_HAS_NO_BITFIELDS
443 bool 390 bool
444 391
445 config CPU_HAS_NO_MULDIV64 392 config CPU_HAS_NO_MULDIV64
446 bool 393 bool
447 394
448 config CPU_HAS_NO_UNALIGNED 395 config CPU_HAS_NO_UNALIGNED
449 bool 396 bool
450 397
451 config CPU_HAS_ADDRESS_SPACES 398 config CPU_HAS_ADDRESS_SPACES
452 bool 399 bool
453 select ALTERNATE_USER_ADDRESS_SPACE <<
454 400
455 config FPU 401 config FPU
456 bool 402 bool
457 403
458 config COLDFIRE_SW_A7 404 config COLDFIRE_SW_A7
459 bool 405 bool
460 406
461 config HAVE_CACHE_SPLIT 407 config HAVE_CACHE_SPLIT
462 bool 408 bool
463 409
464 config HAVE_CACHE_CB 410 config HAVE_CACHE_CB
465 bool 411 bool
466 412
467 config HAVE_MBAR 413 config HAVE_MBAR
468 bool 414 bool
469 415
470 config HAVE_IPSBAR 416 config HAVE_IPSBAR
471 bool 417 bool
472 418
>> 419 config CLOCK_SET
>> 420 bool "Enable setting the CPU clock frequency"
>> 421 depends on COLDFIRE
>> 422 default n
>> 423 help
>> 424 On some CPU's you do not need to know what the core CPU clock
>> 425 frequency is. On these you can disable clock setting. On some
>> 426 traditional 68K parts, and on all ColdFire parts you need to set
>> 427 the appropriate CPU clock frequency. On these devices many of the
>> 428 onboard peripherals derive their timing from the master CPU clock
>> 429 frequency.
>> 430
473 config CLOCK_FREQ 431 config CLOCK_FREQ
474 int "Set the core clock frequency" 432 int "Set the core clock frequency"
475 default "25000000" if M5206 <<
476 default "54000000" if M5206e <<
477 default "166666666" if M520x <<
478 default "140000000" if M5249 <<
479 default "150000000" if M527x || M523x <<
480 default "90000000" if M5307 <<
481 default "50000000" if M5407 <<
482 default "266000000" if M54xx <<
483 default "66666666" 433 default "66666666"
484 depends on COLDFIRE !! 434 depends on CLOCK_SET
485 help 435 help
486 Define the CPU clock frequency in us 436 Define the CPU clock frequency in use. This is the core clock
487 frequency, it may or may not be the 437 frequency, it may or may not be the same as the external clock
488 crystal fitted to your board. Some p 438 crystal fitted to your board. Some processors have an internal
489 PLL and can have their frequency pro 439 PLL and can have their frequency programmed at run time, others
490 use internal dividers. In general th 440 use internal dividers. In general the kernel won't setup a PLL
491 if it is fitted (there are some exce 441 if it is fitted (there are some exceptions). This value will be
492 specific to the exact CPU that you a 442 specific to the exact CPU that you are using.
493 443
494 config OLDMASK 444 config OLDMASK
495 bool "Old mask 5307 (1H55J) silicon" 445 bool "Old mask 5307 (1H55J) silicon"
496 depends on M5307 446 depends on M5307
497 help 447 help
498 Build support for the older revision 448 Build support for the older revision ColdFire 5307 silicon.
499 Specifically this is the 1H55J mask 449 Specifically this is the 1H55J mask revision.
500 450
501 if HAVE_CACHE_SPLIT 451 if HAVE_CACHE_SPLIT
502 choice 452 choice
503 prompt "Split Cache Configuration" 453 prompt "Split Cache Configuration"
504 default CACHE_I 454 default CACHE_I
505 455
506 config CACHE_I 456 config CACHE_I
507 bool "Instruction" 457 bool "Instruction"
508 help 458 help
509 Use all of the ColdFire CPU cache me 459 Use all of the ColdFire CPU cache memory as an instruction cache.
510 460
511 config CACHE_D 461 config CACHE_D
512 bool "Data" 462 bool "Data"
513 help 463 help
514 Use all of the ColdFire CPU cache me 464 Use all of the ColdFire CPU cache memory as a data cache.
515 465
516 config CACHE_BOTH 466 config CACHE_BOTH
517 bool "Both" 467 bool "Both"
518 help 468 help
519 Split the ColdFire CPU cache, and us 469 Split the ColdFire CPU cache, and use half as an instruction cache
520 and half as a data cache. 470 and half as a data cache.
521 endchoice 471 endchoice
522 endif # HAVE_CACHE_SPLIT !! 472 endif
523 473
524 if HAVE_CACHE_CB 474 if HAVE_CACHE_CB
525 choice 475 choice
526 prompt "Data cache mode" 476 prompt "Data cache mode"
527 default CACHE_WRITETHRU 477 default CACHE_WRITETHRU
528 478
529 config CACHE_WRITETHRU 479 config CACHE_WRITETHRU
530 bool "Write-through" 480 bool "Write-through"
531 help 481 help
532 The ColdFire CPU cache is set into W 482 The ColdFire CPU cache is set into Write-through mode.
533 483
534 config CACHE_COPYBACK 484 config CACHE_COPYBACK
535 bool "Copy-back" 485 bool "Copy-back"
536 help 486 help
537 The ColdFire CPU cache is set into C 487 The ColdFire CPU cache is set into Copy-back mode.
538 endchoice 488 endchoice
539 endif # HAVE_CACHE_CB !! 489 endif
540 <<
541 # Coldfire cores that do not have a data cache <<
542 config COLDFIRE_COHERENT_DMA <<
543 bool <<
544 default y <<
545 depends on COLDFIRE <<
546 depends on !HAVE_CACHE_CB && !CACHE_D <<
547 490
548 config M68K_NONCOHERENT_DMA <<
549 bool <<
550 default y <<
551 depends on HAS_DMA && !COLDFIRE_COHERE <<
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