1 # SPDX-License-Identifier: GPL-2.0
2 comment "Processor Type"
3
4 choice
5 prompt "CPU family support"
6 default M68KCLASSIC if MMU
7 default COLDFIRE if !MMU
8 help
9 The Freescale (was Motorola) M68K fa
10 the full 68000 processor instruction
11 The Freescale ColdFire family of pro
12 of the 68000 processor family. They
13 applications, and are all System-On-
14 to stand alone CPUs. They implement
15 processor instruction set.
16 If you anticipate running this kerne
17 MC68xxx processor, select M68KCLASSI
18 If you anticipate running this kerne
19 processor, select COLDFIRE.
20
21 config M68KCLASSIC
22 bool "Classic M68K CPU family support"
23 select HAVE_ARCH_PFN_VALID
24
25 config COLDFIRE
26 bool "Coldfire CPU family support"
27 select CPU_HAS_NO_BITFIELDS
28 select CPU_HAS_NO_CAS
29 select CPU_HAS_NO_MULDIV64
30 select GENERIC_CSUM
31 select GPIOLIB
32 select HAVE_LEGACY_CLK
33 select HAVE_PAGE_SIZE_8KB if !MMU
34
35 endchoice
36
37 if M68KCLASSIC
38
39 config M68000
40 def_bool y
41 depends on !MMU
42 select CPU_HAS_NO_BITFIELDS
43 select CPU_HAS_NO_CAS
44 select CPU_HAS_NO_MULDIV64
45 select CPU_HAS_NO_UNALIGNED
46 select GENERIC_CSUM
47 select CPU_NO_EFFICIENT_FFS
48 select HAVE_ARCH_HASH
49 select HAVE_PAGE_SIZE_4KB
50 select LEGACY_TIMER_TICK
51 help
52 The Freescale (was Motorola) 68000 C
53 the well known M68K family of proces
54 being available as a stand alone CPU
55 System-On-Chip devices (eg 68328, 68
56 a paging MMU.
57
58 config M68020
59 bool "68020 support"
60 depends on MMU
61 select FPU
62 select CPU_HAS_ADDRESS_SPACES
63 help
64 If you anticipate running this kerne
65 processor, say Y. Otherwise, say N.
66 68851 MMU (Memory Management Unit) t
67 Sun 3, which provides its own versio
68
69 config M68030
70 bool "68030 support"
71 depends on MMU && !MMU_SUN3
72 select FPU
73 select CPU_HAS_ADDRESS_SPACES
74 help
75 If you anticipate running this kerne
76 processor, say Y. Otherwise, say N.
77 work, as it does not include an MMU
78
79 config M68040
80 bool "68040 support"
81 depends on MMU && !MMU_SUN3
82 select FPU
83 select CPU_HAS_ADDRESS_SPACES
84 help
85 If you anticipate running this kerne
86 or MC68040 processor, say Y. Otherwi
87 MC68EC040 will not work, as it does
88 Management Unit).
89
90 config M68060
91 bool "68060 support"
92 depends on MMU && !MMU_SUN3
93 select FPU
94 select CPU_HAS_ADDRESS_SPACES
95 help
96 If you anticipate running this kerne
97 processor, say Y. Otherwise, say N.
98
99 config M68328
100 bool
101 depends on !MMU
102 select M68000
103 help
104 Motorola 68328 processor support.
105
106 config M68EZ328
107 bool
108 depends on !MMU
109 select M68000
110 help
111 Motorola 68EX328 processor support.
112
113 config M68VZ328
114 bool
115 depends on !MMU
116 select M68000
117 help
118 Motorola 68VZ328 processor support.
119
120 endif # M68KCLASSIC
121
122 if COLDFIRE
123
124 choice
125 prompt "ColdFire SoC type"
126 default M520x
127 help
128 Select the type of ColdFire System-o
129 to build for.
130
131 config M5206
132 bool "MCF5206"
133 depends on !MMU
134 select COLDFIRE_SW_A7
135 select COLDFIRE_TIMERS
136 select HAVE_MBAR
137 select CPU_NO_EFFICIENT_FFS
138 help
139 Motorola ColdFire 5206 processor sup
140
141 config M5206e
142 bool "MCF5206e"
143 depends on !MMU
144 select COLDFIRE_SW_A7
145 select COLDFIRE_TIMERS
146 select HAVE_MBAR
147 select CPU_NO_EFFICIENT_FFS
148 help
149 Motorola ColdFire 5206e processor su
150
151 config M520x
152 bool "MCF520x"
153 depends on !MMU
154 select COLDFIRE_PIT_TIMER
155 select HAVE_CACHE_SPLIT
156 help
157 Freescale Coldfire 5207/5208 process
158
159 config M523x
160 bool "MCF523x"
161 depends on !MMU
162 select COLDFIRE_PIT_TIMER
163 select HAVE_CACHE_SPLIT
164 select HAVE_IPSBAR
165 help
166 Freescale Coldfire 5230/1/2/4/5 proc
167
168 config M5249
169 bool "MCF5249"
170 depends on !MMU
171 select COLDFIRE_SW_A7
172 select COLDFIRE_TIMERS
173 select HAVE_MBAR
174 select CPU_NO_EFFICIENT_FFS
175 help
176 Motorola ColdFire 5249 processor sup
177
178 config M525x
179 bool "MCF525x"
180 depends on !MMU
181 select COLDFIRE_SW_A7
182 select COLDFIRE_TIMERS
183 select HAVE_MBAR
184 select CPU_NO_EFFICIENT_FFS
185 help
186 Freescale (Motorola) Coldfire 5251/5
187
188 config M5271
189 bool "MCF5271"
190 depends on !MMU
191 select COLDFIRE_PIT_TIMER
192 select M527x
193 select HAVE_CACHE_SPLIT
194 select HAVE_IPSBAR
195 help
196 Freescale (Motorola) ColdFire 5270/5
197
198 config M5272
199 bool "MCF5272"
200 depends on !MMU
201 select COLDFIRE_SW_A7
202 select COLDFIRE_TIMERS
203 select HAVE_MBAR
204 select CPU_NO_EFFICIENT_FFS
205 help
206 Motorola ColdFire 5272 processor sup
207
208 config M5275
209 bool "MCF5275"
210 depends on !MMU
211 select COLDFIRE_PIT_TIMER
212 select M527x
213 select HAVE_CACHE_SPLIT
214 select HAVE_IPSBAR
215 help
216 Freescale (Motorola) ColdFire 5274/5
217
218 config M528x
219 bool "MCF528x"
220 depends on !MMU
221 select COLDFIRE_PIT_TIMER
222 select HAVE_CACHE_SPLIT
223 select HAVE_IPSBAR
224 help
225 Motorola ColdFire 5280/5282 processo
226
227 config M5307
228 bool "MCF5307"
229 depends on !MMU
230 select COLDFIRE_TIMERS
231 select COLDFIRE_SW_A7
232 select HAVE_CACHE_CB
233 select HAVE_MBAR
234 select CPU_NO_EFFICIENT_FFS
235 help
236 Motorola ColdFire 5307 processor sup
237
238 config M532x
239 bool "MCF532x"
240 depends on !MMU
241 select COLDFIRE_TIMERS
242 select M53xx
243 select HAVE_CACHE_CB
244 help
245 Freescale (Motorola) ColdFire 532x p
246
247 config M537x
248 bool "MCF537x"
249 depends on !MMU
250 select COLDFIRE_TIMERS
251 select M53xx
252 select HAVE_CACHE_CB
253 help
254 Freescale ColdFire 537x processor su
255
256 config M5407
257 bool "MCF5407"
258 depends on !MMU
259 select COLDFIRE_SW_A7
260 select COLDFIRE_TIMERS
261 select HAVE_CACHE_CB
262 select HAVE_MBAR
263 select CPU_NO_EFFICIENT_FFS
264 help
265 Motorola ColdFire 5407 processor sup
266
267 config M547x
268 bool "MCF547x"
269 select M54xx
270 select COLDFIRE_SLTIMERS
271 select MMU_COLDFIRE if MMU
272 select FPU if MMU
273 select HAVE_CACHE_CB
274 select HAVE_MBAR
275 select CPU_NO_EFFICIENT_FFS
276 help
277 Freescale ColdFire 5470/5471/5472/54
278
279 config M548x
280 bool "MCF548x"
281 select COLDFIRE_SLTIMERS
282 select MMU_COLDFIRE if MMU
283 select FPU if MMU
284 select M54xx
285 select HAVE_CACHE_CB
286 select HAVE_MBAR
287 select CPU_NO_EFFICIENT_FFS
288 help
289 Freescale ColdFire 5480/5481/5482/54
290
291 config M5441x
292 bool "MCF5441x"
293 select COLDFIRE_PIT_TIMER
294 select MMU_COLDFIRE if MMU
295 select HAVE_CACHE_CB
296 help
297 Freescale Coldfire 54410/54415/54416
298
299 endchoice
300
301 config M527x
302 bool
303
304 config M53xx
305 bool
306
307 config M54xx
308 select HAVE_PCI
309 bool
310
311 config COLDFIRE_PIT_TIMER
312 bool
313
314 config COLDFIRE_TIMERS
315 bool
316 select LEGACY_TIMER_TICK
317
318 config COLDFIRE_SLTIMERS
319 bool
320 select LEGACY_TIMER_TICK
321
322 endif # COLDFIRE
323
324 comment "Processor Specific Options"
325
326 config M68KFPU_EMU
327 bool "Math emulation support"
328 depends on M68KCLASSIC && FPU
329 help
330 At some point in the future, this wi
331 instructions to be emulated by the k
332 floating-point math coprocessor. Th
333 sleep-deprived psychotic hacker type
334 should probably wait a while.
335
336 config M68KFPU_EMU_EXTRAPREC
337 bool "Math emulation extra precision"
338 depends on M68KFPU_EMU
339 help
340 The fpu uses normally a few bit more
341 correct rounding, the emulator can (
342 extra calculation can cost quite som
343 it here. The emulator will then "onl
344 mantissa and round slightly incorrec
345 for normal usage.
346
347 config M68KFPU_EMU_ONLY
348 bool "Math emulation only kernel"
349 depends on M68KFPU_EMU
350 help
351 This option prevents any floating-po
352 compiled into the kernel, thereby th
353 floating point context anymore durin
354 kernel will only be usable on machin
355 math coprocessor. This makes the ker
356 needs to be executed whether a float
357 kernel should be executed or not.
358
359 config ADVANCED
360 bool "Advanced configuration options"
361 depends on MMU
362 help
363 This gives you access to some advanc
364 defaults should be fine for most use
365 it possible for you to improve perfo
366 you are doing.
367
368 Note that the answer to this questio
369 kernel: saying N will just cause the
370 the questions about these options.
371
372 Most users should say N to this ques
373
374 config RMW_INSNS
375 bool "Use read-modify-write instructio
376 depends on ADVANCED && !CPU_HAS_NO_CAS
377 help
378 This allows to use certain instructi
379 read-modify-write bus cycles. While
380 workaround of disabling interrupts,
381 ( = direct memory access) on many Am
382 to destabilize other machines. It is
383 cause serious problems on any Amiga
384 configuration where it should work a
385 apparently improves performance. But
386 really know what you are doing, say
387 adventurous.
388
389 config SINGLE_MEMORY_CHUNK
390 bool "Use one physical chunk of memory
391 depends on MMU
392 default y if SUN3 || MMU_COLDFIRE
393 help
394 Ignore all but the first contiguous
395 purposes. This will save a few byte
396 some operations.
397 When this option os set to N, you ma
398 order" to save memory that could be
399 Say N if not sure.
400
401 config ARCH_FORCE_MAX_ORDER
402 int "Order of maximal physically conti
403 depends on !SINGLE_MEMORY_CHUNK
404 default "10"
405 help
406 The kernel page allocator limits the
407 contiguous allocations. The limit is
408 defines the maximal power of two of
409 allocated as a single contiguous blo
410 overriding the default setting when
411 large blocks of physically contiguou
412
413 For systems that have holes in their
414 value also defines the minimal size
415 freeing unused memory map.
416
417 Don't change if unsure.
418
419 config 060_WRITETHROUGH
420 bool "Use write-through caching for 68
421 depends on ADVANCED && M68060
422 help
423 The 68060 generally uses copyback ca
424 Copyback caching means that memory w
425 cache and only written back to memor
426 here will force supervisor (kernel)
427 caching. Writethrough caching means
428 straight away, so that cache and mem
429 Writethrough caching is less efficie
430 drivers on 68060 based systems where
431 is hardwired on. The 53c710 SCSI dr
432 this problem.
433
434 config M68K_L2_CACHE
435 bool
436 depends on MAC
437 default y
438
439 config CPU_HAS_NO_BITFIELDS
440 bool
441
442 config CPU_HAS_NO_CAS
443 bool
444
445 config CPU_HAS_NO_MULDIV64
446 bool
447
448 config CPU_HAS_NO_UNALIGNED
449 bool
450
451 config CPU_HAS_ADDRESS_SPACES
452 bool
453 select ALTERNATE_USER_ADDRESS_SPACE
454
455 config FPU
456 bool
457
458 config COLDFIRE_SW_A7
459 bool
460
461 config HAVE_CACHE_SPLIT
462 bool
463
464 config HAVE_CACHE_CB
465 bool
466
467 config HAVE_MBAR
468 bool
469
470 config HAVE_IPSBAR
471 bool
472
473 config CLOCK_FREQ
474 int "Set the core clock frequency"
475 default "25000000" if M5206
476 default "54000000" if M5206e
477 default "166666666" if M520x
478 default "140000000" if M5249
479 default "150000000" if M527x || M523x
480 default "90000000" if M5307
481 default "50000000" if M5407
482 default "266000000" if M54xx
483 default "66666666"
484 depends on COLDFIRE
485 help
486 Define the CPU clock frequency in us
487 frequency, it may or may not be the
488 crystal fitted to your board. Some p
489 PLL and can have their frequency pro
490 use internal dividers. In general th
491 if it is fitted (there are some exce
492 specific to the exact CPU that you a
493
494 config OLDMASK
495 bool "Old mask 5307 (1H55J) silicon"
496 depends on M5307
497 help
498 Build support for the older revision
499 Specifically this is the 1H55J mask
500
501 if HAVE_CACHE_SPLIT
502 choice
503 prompt "Split Cache Configuration"
504 default CACHE_I
505
506 config CACHE_I
507 bool "Instruction"
508 help
509 Use all of the ColdFire CPU cache me
510
511 config CACHE_D
512 bool "Data"
513 help
514 Use all of the ColdFire CPU cache me
515
516 config CACHE_BOTH
517 bool "Both"
518 help
519 Split the ColdFire CPU cache, and us
520 and half as a data cache.
521 endchoice
522 endif # HAVE_CACHE_SPLIT
523
524 if HAVE_CACHE_CB
525 choice
526 prompt "Data cache mode"
527 default CACHE_WRITETHRU
528
529 config CACHE_WRITETHRU
530 bool "Write-through"
531 help
532 The ColdFire CPU cache is set into W
533
534 config CACHE_COPYBACK
535 bool "Copy-back"
536 help
537 The ColdFire CPU cache is set into C
538 endchoice
539 endif # HAVE_CACHE_CB
540
541 # Coldfire cores that do not have a data cache
542 config COLDFIRE_COHERENT_DMA
543 bool
544 default y
545 depends on COLDFIRE
546 depends on !HAVE_CACHE_CB && !CACHE_D
547
548 config M68K_NONCOHERENT_DMA
549 bool
550 default y
551 depends on HAS_DMA && !COLDFIRE_COHERE
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